FMMLA (non-widening)

Half-precision matrix multiply-accumulate

This instruction multiplies the 2x2 matrix of half-precision values in each 64-bit segment of the first source vector by the 2x2 matrix of half-precision values in the corresponding 64-bit segment of the second source vector. The intermediate products are rounded before they are summed, and the intermediate sum is rounded before accumulation into the 2x2 half-precision matrix held in the corresponding 64-bit segment of the addend and destination vector. This is equivalent to performing a 2-way dot product per destination element.

Advanced SIMD
(FEAT_F16MM)

313029282726252423222120191817161514131211109876543210
01001110110Rm111011RnRd
QUsizeopcode

Encoding

FMMLA <Vd>.8H, <Vn>.8H, <Vm>.8H

Decode for this encoding

if !IsFeatureImplemented(FEAT_F16MM) then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm);

Assembler Symbols

<Vd>

Is the name of the SIMD&FP third source and destination register, encoded in the "Rd" field.

<Vn>

Is the name of the first SIMD&FP source register, encoded in the "Rn" field.

<Vm>

Is the name of the second SIMD&FP source register, encoded in the "Rm" field.


2025-09_diff_tag 2025-11-28 16:29:05

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