LUTI6 (16-bit)

Lookup table read with 6-bit indices (16-bit)

This instruction copies indexed 16-bit elements from the low 512 bits of the two table vectors to the destination vector using packed 6-bit indices from a segment in the bottom three quarters of the source vector register.

This instruction is unpredicated.

This instruction requires that the Effective SVE vector length is at least 512 bits.

SVE2
(FEAT_SVE2p3 || FEAT_SME2p3)

313029282726252423222120191817161514131211109876543210
01000101i111Zm101011ZnZd

Encoding

LUTI6 <Zd>.H, { <Zn1>.H, <Zn2>.H }, <Zm>[<index>]

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2p3) && !IsFeatureImplemented(FEAT_SME2p3) then EndOfDecode(Decode_UNDEF); end; if MaxImplementedAnyVL() < 512 then EndOfDecode(Decode_UNDEF); end; let isize : integer{} = 6; let esize : integer{} = 16; let m : integer = UInt(Zm); let n : integer = UInt(Zn); let d : integer = UInt(Zd); let part : integer = UInt(i1);

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<Zn1>

Is the name of the first table vector register, encoded as "Zn".

<Zn2>

Is the name of the second table vector register, encoded as "Zn" plus 1 modulo 32.

<Zm>

Is the name of the source scalable vector register, encoded in the "Zm" field.

<index>

Is the vector segment index, in the range 0 to 1, encoded in the "i1" field.

Operation

CheckSVEEnabled(); let VL : integer{} = CurrentVL(); if VL < 512 then EndOfDecode(Decode_UNDEF); end; let elements : integer = VL DIV esize; let ibase : integer = elements * part; let indexes : bits(VL) = Z{}(m); // Only bottom 3/4 used let table : bits(1024) = Z{VL}((n+1) MOD 32)[511:0] :: Z{VL}(n+0)[511:0]; var result : bits(VL); for e = 0 to elements-1 do let index : integer = UInt(indexes[(ibase + e)*:isize]); let res : bits(esize) = table[index*:esize]; result[e*:esize] = res; end; Z{VL}(d) = result;

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2025-09_diff_tag 2025-11-28 16:29:05

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