MUL (indexed)

Multiply by indexed element

This instruction multiplies all integer elements within each 128-bit segment of the first source vector by the specified element in the corresponding second source vector segment. The results are placed in the corresponding elements of the destination vector.

The elements within the second source vector are specified using an immediate index that selects the same element position within each 128-bit vector segment. The index range is from 0 to one less than the number of elements per 128-bit segment. This instruction is unpredicated.

It has encodings from 3 classes: 16-bit , 32-bit and 64-bit

16-bit
(FEAT_SVE2 || FEAT_SME)

313029282726252423222120191817161514131211109876543210
010001000i3h1i3lZm111110ZnZd

Encoding

MUL <Zd>.H, <Zn>.H, <Zm>.H[<imm>]

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 16; let index : integer = UInt(i3h::i3l); let n : integer = UInt(Zn); let m : integer = UInt(Zm); let d : integer = UInt(Zd);

32-bit
(FEAT_SVE2 || FEAT_SME)

313029282726252423222120191817161514131211109876543210
01000100101i2Zm111110ZnZd
size

Encoding

MUL <Zd>.S, <Zn>.S, <Zm>.S[<imm>]

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 32; let index : integer = UInt(i2); let n : integer = UInt(Zn); let m : integer = UInt(Zm); let d : integer = UInt(Zd);

64-bit
(FEAT_SVE2 || FEAT_SME)

313029282726252423222120191817161514131211109876543210
01000100111i1Zm111110ZnZd
size

Encoding

MUL <Zd>.D, <Zn>.D, <Zm>.D[<imm>]

Decode for this encoding

if !IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 64; let index : integer = UInt(i1); let n : integer = UInt(Zn); let m : integer = UInt(Zm); let d : integer = UInt(Zd);

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<Zn>

Is the name of the first source scalable vector register, encoded in the "Zn" field.

<Zm>

For the "16-bit" and "32-bit" variants: is the name of the second source scalable vector register Z0-Z7, encoded in the "Zm" field.

For the "64-bit" variant: is the name of the second source scalable vector register Z0-Z15, encoded in the "Zm" field.

<imm>

For the "16-bit" variant: is the element index, in the range 0 to 7, encoded in the "i3h:i3l" fields.

For the "32-bit" variant: is the element index, in the range 0 to 3, encoded in the "i2" field.

For the "64-bit" variant: is the element index, in the range 0 to 1, encoded in the "i1" field.

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2025-09_diff_tag 2025-11-28 16:29:05

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