Signed 32-bit integer saturating extract narrow to interleaved unsigned 16-bit integer
This instruction saturates the signed integer value in each element of the pair of source vectors to unsigned integer value that is half the original source element width, and places the two-way interleaved results in the half-width destination elements.
This instruction is unpredicated.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | Zn | 0 | Zd | |||||||
| tszh | tszl | opc | |||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SME2) && !IsFeatureImplemented(FEAT_SVE2p1) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 16; let n : integer = UInt(Zn::'0'); let d : integer = UInt(Zd);
| <Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
| <Zn1> |
Is the name of the first scalable vector register of the source multi-vector group, encoded as "Zn" times 2. |
| <Zn2> |
Is the name of the second scalable vector register of the source multi-vector group, encoded as "Zn" times 2 plus 1. |
CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let elements : integer = VL DIV (2 * esize); var result : bits(VL); for e = 0 to elements-1 do for i = 0 to 1 do let operand : bits(VL) = Z{}(n+i); let element : integer = SInt(operand[e*:(2 * esize)]); result[(2*e + i)*:esize] = UnsignedSat{esize}(element); end; end; Z{VL}(d) = result;
2025-09_diff_tag 2025-11-28 16:29:05
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