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Memory set with tag setting, non-temporal
These instructions set a requested number of bytes in memory to the value in the least significant byte of the source data register and store an Allocation Tag to memory for each Tag Granule written. The Allocation Tag is calculated from the Logical Address Tag in the register that holds the first address to be set. The prologue, main, and epilogue instructions are expected to be run in succession and to appear consecutively in memory: SETGPN, then SETGMN, and then SETGEN.
SETGPN performs some preconditioning of the arguments suitable for using the SETGMN instruction, and sets an IMPLEMENTATION DEFINED portion of the requested number of bytes. SETGMN sets a further IMPLEMENTATION DEFINED portion of the remaining bytes. SETGEN sets any final remaining bytes.
The ability to set an IMPLEMENTATION DEFINED number of bytes allows an implementation to optimize how the bytes being set are divided between the different instructions.
For more information on exceptions specific to memory set instructions, see Memory Copy and Memory Set exceptions.
The architecture supports two algorithms for the memory set: option A and option B. Which algorithm is used is IMPLEMENTATION DEFINED.
Portable software should not assume that the choice of algorithm is constant.
For SETGPN:
On completion of SETGPN, option A:
On completion of SETGPN, option B:
For SETGMN, option A, when PSTATE.C = '0':
For SETGMN, option B, when PSTATE.C = '1':
For SETGEN, option A, when PSTATE.C = '0':
For SETGEN, option B, when PSTATE.C = '1':
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| sz | 0 | 1 | 1 | 1 | 0 | 1 | 1 | 1 | 0 | Rs | x | x | 1 | 0 | 0 | 1 | Rn | Rd | |||||||||||||
| o0 | op1 | op2 | |||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_MOPS) || !IsFeatureImplemented(FEAT_MTE) || sz != '00' then EndOfDecode(Decode_UNDEF); end; var memset : SETParams; memset.d = UInt(Rd); memset.s = UInt(Rs); memset.n = UInt(Rn); let options : bits(2) = op2[1:0]; let nontemporal : boolean = options[1] == '1'; case op2[3:2] of when '00' => memset.stage = MOPSStage_Prologue; when '01' => memset.stage = MOPSStage_Main; when '10' => memset.stage = MOPSStage_Epilogue; otherwise => EndOfDecode(Decode_UNDEF); end;
For information about the CONSTRAINED UNPREDICTABLE behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors, and particularly Memory Copy and Memory Set SET* and Crossing a page boundary with different memory types or Shareability attributes.
CheckMOPSEnabled();
CheckSETConstrainedUnpredictable(memsetmemset.n, memset.d, memset.s);
let data : bits(8) = X{}(memset.s);
var B : MOPSBlockSize = 0;
memset.is_setg = TRUE;
memset.nzcv = PSTATE.[N,Z,C,V];
memset.toaddress = PSTATE.[N,Z,C,V];
memset.toaddress = X{64}(memset.d);
if memset.stage == MOPSStage_Prologue then
memset.setsize = UInt(X{64}(memset.n));
else
memset.setsize = SInt(X{64}(memset.n));
end;
memset.implements_option_a = SETGOptionA();
let privileged : boolean = (if options[0] == '1' then AArch64_IsUnprivAccessPriv()
else PSTATE.EL()
else PSTATE.EL != EL0);
let accdesc : AccessDescriptor = CreateAccDescSTGMOPS(privileged, nontemporal);
if memset.stage == MOPSStage_Prologue then
if memset.setsize > ArchMaxMOPSSETGSize then
memset.setsize = ArchMaxMOPSSETGSize;
end;
if ((memset.setsize != 0 && !IsAlignedSize(memset.toaddress, TAG_GRANULE)) ||
!IsAlignedSize(memset.setsize[63:0], TAG_GRANULE)) then
let fault : FaultRecord = AlignmentFault(accdesc, memset.toaddress);
AArch64_Abort(fault);
end;
if memset.implements_option_a then
memset.nzcv = '0000';
memset.toaddress = memset.toaddress + memset.setsize;
memset.setsize = 0 - memset.setsize;
else
memset.nzcv = '0010';
end;
end;
memset.stagesetsize = MemSetStageSize(memset);
if memset.stage != MOPSStage_Prologue then
CheckMemSetParams(memset, options);
var fault_address : bits(64);
if memset.implements_option_a then
fault_address = memset.toaddress + memset.setsize;
else
fault_address = memset.toaddress;
end;
if (memset.setsize != 0 && (memset.stagesetsize != 0 || MemStageSetZeroSizeCheck()) &&
!IsAlignedSize(memset.toaddress, TAG_GRANULE)) then
let fault : FaultRecord = AlignmentFault(accdesc, fault_address);
AArch64_Abort(fault);
end;
if ((memset.stagesetsize != 0 || MemStageSetZeroSizeCheck()) &&
!IsAlignedSize(memset.setsize[63:0], TAG_GRANULE)) then
let fault : FaultRecord = AlignmentFault(accdesc, fault_address);
AArch64_Abort(fault);
end;
end;
var tags_set : integer;
var memaddrdesc : AddressDescriptor;
var memstatus : PhysMemRetStatus;
var tagmemaddrdesc : AddressDescriptor;
var tagmemstatus : PhysMemRetStatus;
var fault : boolean = FALSE;
var tagfault : boolean = FALSE;
if memset.implements_option_a then
while memset.stagesetsize < 0 && !fault && !tagfault looplimit ArchMaxMOPSSETGSize do
// IMP DEF selection of the block size that is worked on. While many
// implementations might make this constant, that is not assumed.
B = SETSizeChoice(memset, TAG_GRANULE);
assert B <= -1 * memset.stagesetsize && B[3:0] == '0000';
(-, memaddrdesc, memstatus) = MemSetBytes(memset.toaddress + memset.setsize,
data, B, accdesc);
let tag : bits(4) = AArch64_AllocationTagFromAddress(memset.toaddress + memset.setsize);
(tags_set, tagmemaddrdesc, tagmemstatus) = MemSetTags(memset.toaddress + memset.setsize,
tag, B, accdesc);
fault = IsFault(memaddrdesc) || IsFault(memstatus);
tagfault = IsFault(tagmemaddrdesc) || IsFault(tagmemstatus);
if !fault && !tagfault then
memset.setsize = memset.setsize + B;
memset.stagesetsize = memset.stagesetsize + B;
end;
end;
else
while memset.stagesetsize > 0 && !fault && !tagfault looplimit ArchMaxMOPSSETGSize do
// IMP DEF selection of the block size that is worked on. While many
// implementations might make this constant, that is not assumed.
B = SETSizeChoice(memset, TAG_GRANULE);
assert B <= memset.stagesetsize && B[3:0] == '0000';
(-, memaddrdesc, memstatus) = MemSetBytes(memset.toaddress, data, B, accdesc);
let tag : bits(4) = AArch64_AllocationTagFromAddress(memset.toaddress);
(tags_set, tagmemaddrdesc, tagmemstatus) = MemSetTags(memset.toaddress, tag, B, accdesc);
fault = IsFault(memaddrdesc) || IsFault(memstatus);
tagfault = IsFault(tagmemaddrdesc) || IsFault(tagmemstatus);
if !fault && !tagfault then
memset.toaddress = memset.toaddress + B;
memset.setsize = memset.setsize - B;
memset.stagesetsize = memset.stagesetsize - B;
end;
end;
end;
UpdateSetRegisters(memset, fault || tagfault, tags_set * TAG_GRANULE);
if fault then
if IsFault(memaddrdesc) then
AArch64_Abort(memaddrdesc.fault);
else
let iswrite : boolean = TRUE;
HandleExternalAbort(memstatus, iswrite, memaddrdesc, B, accdesc);
end;
elsif tagfault then
if IsFault(tagmemaddrdesc) then
AArch64_Abort(tagmemaddrdesc.fault);
else
let iswrite : boolean = TRUE;
HandleExternalAbort(tagmemstatus, iswrite, tagmemaddrdesc, 1, accdesc);
end;
end;
if memset.stage == MOPSStage_Prologue then
PSTATE.[N,Z,C,V] = memset.nzcv;
end;
2025-12_rel2025-09_diff_tag
2025-12-102025-11-28 16:4129:4505
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