Bitwise AND (immediate), setting flags
This instruction performs a bitwise AND between a register value and an immediate value, and writes the result to the destination register. It updates the condition flags based on the result.
This instruction is used by the alias TST (immediate).
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| sf | 1 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | N | immr | imms | Rn | Rd | ||||||||||||||||||
| opc | |||||||||||||||||||||||||||||||
if sf == '0' && N != '0' then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let datasize : integer{} = 32 << UInt(sf); var imm : bits(datasize); (imm, -) = DecodeBitMasks{datasize}(N, imms, immr, TRUE);
| <Wd> |
Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Wn> |
Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field. |
| <imm> |
For the "32-bit" variant: is the bitmask immediate, encoded in "imms:immr". |
|
For the "64-bit" variant: is the bitmask immediate, encoded in "N:imms:immr". |
| <Xd> |
Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field. |
| <Xn> |
Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field. |
| Alias | Is preferred when |
|---|---|
| TST (immediate) | Rd == '11111' |
let operand1 : bits(datasize) = X{}(n); let operand2 : bits(datasize) = imm; let result : bits(datasize) = operand1 AND operand2; X{datasize}(d) = result; PSTATE.[N,Z,C,V] = result[datasize-1]::IsZeroBit{datasize}(result)::'00';
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2025-12_rel 2025-12-10 16:41:45
Copyright © 2010-2025 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.