Bitwise exclusive-OR (unpredicated)
This instruction performs a bitwise exclusive-OR between the elements of the second source vector and the corresponding elements of the first source vector, and places the results in the corresponding elements of the destination vector. This instruction is unpredicated.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | Zm | 0 | 0 | 1 | 1 | 0 | 0 | Zn | Zd | ||||||||||||
| opc | |||||||||||||||||||||||||||||||
if !IsFeatureImplemented(FEAT_SVE) && !IsFeatureImplemented(FEAT_SME) then EndOfDecode(Decode_UNDEF); end; let n : integer = UInt(Zn); let m : integer = UInt(Zm); let d : integer = UInt(Zd);
| <Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
| <Zn> |
Is the name of the first source scalable vector register, encoded in the "Zn" field. |
| <Zm> |
Is the name of the second source scalable vector register, encoded in the "Zm" field. |
CheckSVEEnabled(); let VL : integer{} = CurrentVL(); let operand1 : bits(VL) = Z{}(n); let operand2 : bits(VL) = Z{}(m); Z{VL}(d) = operand1 XOR operand2;
This instruction is a data-independent-time instruction as described in About PSTATE.DIT.
2025-12_rel 2025-12-10 16:41:45
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