Half-precision convert to interleaved 8-bit floating-point
This instruction converts each half-precision element of the pair of source vectors to 8-bit floating-point while scaling the value by 2SInt(FPMR.NSCALE[4:0]), and places the two-way interleaved results in the corresponding 8-bit elements of the destination vector. The 8-bit floating-point encoding format is selected by FPMR.F8D.
This instruction is unpredicated.
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| 0 | 1 | 1 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | Zn | 0 | Zd | |||||||
| opc | |||||||||||||||||||||||||||||||
if ((!IsFeatureImplemented(FEAT_SVE2) && !IsFeatureImplemented(FEAT_SME2)) || !IsFeatureImplemented(FEAT_FP8)) then EndOfDecode(Decode_UNDEF); end; let n : integer = UInt(Zn::'0'); let d : integer = UInt(Zd);
| <Zd> |
Is the name of the destination scalable vector register, encoded in the "Zd" field. |
| <Zn1> |
Is the name of the first scalable vector register of the source multi-vector group, encoded as "Zn" times 2. |
| <Zn2> |
Is the name of the second scalable vector register of the source multi-vector group, encoded as "Zn" times 2 plus 1. |
CheckFPMREnabled(); if IsFeatureImplemented(FEAT_SME2) then CheckSVEEnabled(); else CheckNonStreamingSVEEnabled(); end; let VL : integer{} = CurrentVL(); let elements : integer = VL DIV 16; var result : bits(VL); let operand1 : bits(VL) = Z{}(n+0); let operand2 : bits(VL) = Z{}(n+1); for e = 0 to elements-1 do let element1 : bits(16) = operand1[e*:16]; let element2 : bits(16) = operand2[e*:16]; result[(2*e + 0)*:8] = FPConvertFP8{8, 16}(element1, FPCR(), FPMR()); result[(2*e + 1)*:8] = FPConvertFP8{8, 16}(element2, FPCR(), FPMR()); end; Z{VL}(d) = result;
2025-12_rel 2025-12-10 16:41:45
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