LUTI4

Lookup table read with 4-bit indices

This instruction copies indexed 8-bit or 16-bit elements from the one or two table vectors to the destination vector using packed 4-bit indices from a segment of the source vector. A segment corresponds to a portion of the source vector that is consumed in order to fill the destination vector. The segment is selected by the vector segment index.

Advanced SIMD
(FEAT_AdvSIMD && FEAT_LUT)

313029282726252423222120191817161514131211109876543210
01001110010Rm0lenop00RnRd
Qop2

Encoding for the Byte variant

Applies when (len == x1 && op == 0)

LUTI4 <Vd>.16B, { <Vn>.16B }, <Vm>[<index>]

Encoding for the Halfword variant

Applies when (op == 1)

LUTI4 <Vd>.8H, { <Vn1>.8H, <Vn2>.8H }, <Vm>[<index>]

Decode for all variants of this encoding

if !IsFeatureImplemented(FEAT_AdvSIMD) || !IsFeatureImplemented(FEAT_LUT) then EndOfDecode(Decode_UNDEF); end; if len[0] == '0' && op == '0' then EndOfDecode(Decode_UNDEF); end; let d : integer{} = UInt(Rd); let n : integer{} = UInt(Rn); let m : integer{} = UInt(Rm); let isize : integer{} = 4; let esize : integer{} = 8 << UInt(op); let ntblr : integer = 1 << UInt(op); let part : integer = if op == '0' then UInt(len[1]) else UInt(len);

Assembler Symbols

<Vd>

Is the name of the SIMD&FP destination register, encoded in the "Rd" field.

<Vn>

Is the name of the SIMD&FP table register, encoded in the "Rn" field.

<Vm>

Is the name of the SIMD&FP source register, encoded in the "Rm" field.

<index>

For the "Byte" variant: is the vector segment index, in the range 0 to 1, encoded in the "len<1>" field.

For the "Halfword" variant: is the vector segment index, in the range 0 to 3, encoded in the "len" field.

<Vn1>

Is the name of the first SIMD&FP table register, encoded in the "Rn" field.

<Vn2>

Is the name of the second SIMD&FP table register, encoded as "Rn" plus 1 modulo 32.

Operational information

This instruction is a data-independent-time instruction as described in About PSTATE.DIT.


2025-12_rel 2025-12-10 16:41:45

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