SUMOP4A

Signed by unsigned integer quarter-tile sum of outer products, accumulating

This instruction generates four independent quarter-tile signed by unsigned integer sums of outer products from the sub-matrices in the half-vectors of the one or two first and second source vectors and accumulates the results to the corresponding elements of a 32-bit or 64-bit element ZA tile.

In case of the 8-bit integer variant, each of the quarter-tile sums of outer products is generated by multiplying the SVL_S÷2 × 4 sub-matrix of 8-bit signed values held in the half-vectors of the first source vectors by the 4 × SVL_S÷2 sub-matrix of 8-bit unsigned values held in the half-vectors of the second source vectors. Each 32-bit container of the half-vectors in the first source vectors holds 4 elements of each row of a SVL_S÷2 × 4 sub-matrix. Similarly, each 32-bit container of the half-vectors in the second source vector holds 4 elements of each column of a 4 × SVL_S÷2 sub-matrix.

In case of the 16-bit integer variant, each of the quarter-tile sums of outer products is generated by multiplying the SVL_D÷2 × 4 sub-matrix of 16-bit signed values held in the half-vectors of the first source vectors by the 4 × SVL_D÷2 sub-matrix of 16-bit unsigned values held in the half-vectors of the second source vectors. Each 64-bit container of the half-vectors in the first source vectors holds 4 elements of each row of a SVL_D÷2 × 4 sub-matrix. Similarly, each 64-bit container of the half-vectors in the second source vector holds 4 elements of each column of a 4 × SVL_D÷2 sub-matrix.

The resulting quarter-tile SVL_S÷2 × SVL_S÷2 widened 32-bit integer sums of outer products in case of the 8-bit integer variant or SVL_D÷2 × SVL_D÷2 widened 64-bit integer sums of outer products in case of the 16-bit integer variant are then destructively added to the 32-bit or 64-bit integer destination tile respectively.

This is equivalent to performing a 4-way dot product and accumulate to each of the destination tile elements.

This instruction is unpredicated.

It has encodings from 8 classes: 32-bit, single and multiple vectors , 32-bit, single vectors , 32-bit, multiple and single vectors , 32-bit, multiple vectors , 64-bit, single and multiple vectors , 64-bit, single vectors , 64-bit, multiple and single vectors and 64-bit, multiple vectors

32-bit, single and multiple vectors
(FEAT_SME_MOP4)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_MOP4) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 32; let n : integer = UInt('0'::Zn::'0'); let m : integer = UInt('1'::Zm::'0'); let nreg : integer{} = 1; let mreg : integer = 2; let da : integer = UInt(ZAda); let sub_op : boolean = FALSE; let op1_unsigned : boolean = FALSE; let op2_unsigned : boolean = TRUE;

32-bit, single vectors
(FEAT_SME_MOP4)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_MOP4) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 32; let n : integer = UInt('0'::Zn::'0'); let m : integer = UInt('1'::Zm::'0'); let nreg : integer{} = 1; let mreg : integer = 1; let da : integer = UInt(ZAda); let sub_op : boolean = FALSE; let op1_unsigned : boolean = FALSE; let op2_unsigned : boolean = TRUE;

32-bit, multiple and single vectors
(FEAT_SME_MOP4)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_MOP4) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 32; let n : integer = UInt('0'::Zn::'0'); let m : integer = UInt('1'::Zm::'0'); let nreg : integer{} = 2; let mreg : integer = 1; let da : integer = UInt(ZAda); let sub_op : boolean = FALSE; let op1_unsigned : boolean = FALSE; let op2_unsigned : boolean = TRUE;

32-bit, multiple vectors
(FEAT_SME_MOP4)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_MOP4) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 32; let n : integer = UInt('0'::Zn::'0'); let m : integer = UInt('1'::Zm::'0'); let nreg : integer{} = 2; let mreg : integer = 2; let da : integer = UInt(ZAda); let sub_op : boolean = FALSE; let op1_unsigned : boolean = FALSE; let op2_unsigned : boolean = TRUE;

64-bit, single and multiple vectors
(FEAT_SME_MOP4 && FEAT_SME_I16I64)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_MOP4) || !IsFeatureImplemented(FEAT_SME_I16I64) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 64; let n : integer = UInt('0'::Zn::'0'); let m : integer = UInt('1'::Zm::'0'); let nreg : integer{} = 1; let mreg : integer = 2; let da : integer = UInt(ZAda); let sub_op : boolean = FALSE; let op1_unsigned : boolean = FALSE; let op2_unsigned : boolean = TRUE;

64-bit, single vectors
(FEAT_SME_MOP4 && FEAT_SME_I16I64)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_MOP4) || !IsFeatureImplemented(FEAT_SME_I16I64) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 64; let n : integer = UInt('0'::Zn::'0'); let m : integer = UInt('1'::Zm::'0'); let nreg : integer{} = 1; let mreg : integer = 1; let da : integer = UInt(ZAda); let sub_op : boolean = FALSE; let op1_unsigned : boolean = FALSE; let op2_unsigned : boolean = TRUE;

64-bit, multiple and single vectors
(FEAT_SME_MOP4 && FEAT_SME_I16I64)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_MOP4) || !IsFeatureImplemented(FEAT_SME_I16I64) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 64; let n : integer = UInt('0'::Zn::'0'); let m : integer = UInt('1'::Zm::'0'); let nreg : integer{} = 2; let mreg : integer = 1; let da : integer = UInt(ZAda); let sub_op : boolean = FALSE; let op1_unsigned : boolean = FALSE; let op2_unsigned : boolean = TRUE;

64-bit, multiple vectors
(FEAT_SME_MOP4 && FEAT_SME_I16I64)

Decode for this encoding

if !IsFeatureImplemented(FEAT_SME_MOP4) || !IsFeatureImplemented(FEAT_SME_I16I64) then EndOfDecode(Decode_UNDEF); end; let esize : integer{} = 64; let n : integer = UInt('0'::Zn::'0'); let m : integer = UInt('1'::Zm::'0'); let nreg : integer{} = 2; let mreg : integer = 2; let da : integer = UInt(ZAda); let sub_op : boolean = FALSE; let op1_unsigned : boolean = FALSE; let op2_unsigned : boolean = TRUE;