The MSMON_CAPT_EVNT characteristics are:
Generates a local capture event when written with bit[0] as 1.
The power domain of MSMON_CAPT_EVNT is IMPLEMENTATION DEFINED.
This register is present only when FEAT_MPAM is implemented, MPAMF_IDR.HAS_MSMON == 1 and MPAMF_MSMON_IDR.HAS_LOCAL_CAPT_EVNT == 1. Otherwise, direct accesses to MSMON_CAPT_EVNT are RES0.
The power and reset domain of each MSC component is specific to that component.
MSMON_CAPT_EVNT is a 32-bit register.
The MSMON_CAPT_EVNT bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | ALL | NOW |
Reserved, RES0.
In the Secure instance of this register:
In the Non-secure instance of this register, this bit is RAZ/WI.
In the Root instance of this register:
In the Realm instance of this register:
This bit always reads as zero.
ALL | Meaning |
---|---|
0b0 |
Send capture event only to monitor instances in the same MPAM feature page as this register. |
0b1 |
Send capture event to monitor instances in certain MPAM feature pages as described in the ALL field of this register. |
When written as 1, this bit causes an event to those monitor instances described in the ALL field that have CAPT_EVNT set to the value of 7.
When this bit is written as 0, no event is signaled.
This bit always reads as zero.
This register is within the MPAM feature page memory frames. In a system that supports Secure and Non-secure memory maps, there must be both Secure and Non-secure MPAM feature pages.
MSMON_CAPT_EVNT_s must be accessible from the Secure MPAM feature page. MSMON_CAPT_EVNT_ns must be accessible from the Non-secure MPAM feature page.
MSMON_CAPT_EVNT_s and MSMON_CAPT_EVNT_ns must be separate registers. The Secure instance (MSMON_CAPT_EVNT_s) can generate local capture events for Secure monitor instances only or for Secure and Non-secure monitor instances, and the Non-secure instance (MSMON_CAPT_EVNT_ns) can generate local capture events for Non-secure monitor instances only.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_s | 0x0808 | MSMON_CAPT_EVNT_s |
Accesses on this interface are RW.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_ns | 0x0808 | MSMON_CAPT_EVNT_ns |
Accesses on this interface are RW.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_rt | 0x0808 | MSMON_CAPT_EVNT_rt |
When FEAT_RME is implemented access on this interface are RW.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_rl | 0x0808 | MSMON_CAPT_EVNT_rl |
When FEAT_RME is implemented access on this interface are RW.
30/03/2021 20:51; e3551d56dc294a4d55296a6c10544191ada08a8e
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