JIDR, Jazelle ID Register

The JIDR characteristics are:

Purpose

A Jazelle register, which identified the Jazelle architecture version.

Configuration

This register is present only when AArch32 is supported at any Exception level. Otherwise, direct accesses to JIDR are UNDEFINED.

Attributes

JIDR is a 32-bit register.

Field descriptions

The JIDR bit assignments are:

313029282726252423222120191817161514131211109876543210
RAZ

Bits [31:0]

Reserved, RAZ.

Accessing the JIDR

Accesses to this register use the following encodings:

MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}

coprocopc1CRnCRmopc2
0b11100b1110b00000b00000b000

if PSTATE.EL == EL0 then if boolean IMPLEMENTATION_DEFINED "JIDR UNDEFINED at EL0" then UNDEFINED; elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> != '11' && HCR_EL2.TID0 == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TID0 == '1' then AArch32.TakeHypTrapException(0x05); else return JIDR; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TID0 == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TID0 == '1' then AArch32.TakeHypTrapException(0x05); else return JIDR; elsif PSTATE.EL == EL2 then return JIDR; elsif PSTATE.EL == EL3 then return JIDR;


30/03/2021 20:51; e3551d56dc294a4d55296a6c10544191ada08a8e

Copyright © 2010-2021 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.