The MSMON_OFLOW_MSI_MPAM characteristics are:
MSMON_OFLOW_MSI_MPAM is a 32-bit read/write register that sets the MPAM information for a monitor overflow MSI write.
The power domain of MSMON_OFLOW_MSI_MPAM is IMPLEMENTATION DEFINED.
This register is present only when FEAT_MPAMv1p1 is implemented and MPAMF_MSMON_IDR.HAS_OFLW_MSI == 1. Otherwise, direct accesses to MSMON_OFLOW_MSI_MPAM are RES0.
MSMON_OFLOW_MSI_ADDR_L, MSMON_OFLOW_MSI_ADDR_H, MSMON_OFLOW_MSI_ATTR, MSMON_OFLOW_MSI_DATA, and MSMON_OFLOW_MSI_MPAM must all be implemented to support MSI writes for monitor overflow interrupts.
The power and reset domain of each MSC component is specific to that component.
MSMON_OFLOW_MSI_MPAM is a 32-bit register.
The MSMON_OFLOW_MSI_MPAM bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | PMG | PARTID |
Reserved, RES0.
Performance monitoring group property for an MSC monitor overflow MSI write.
On a MSC reset, this field resets to an architecturally UNKNOWN value.
Partition ID for an MSC monitor overflow MSI write.
The PARTID in this field is in the Secure PARTID space in the MSMON_OFLOW_MSI_MPAM_s instance and in the Non-secure PARTID space in the MSMON_OFLOW_MSI_MPAM_ns instance of this register.
On a MSC reset, this field resets to an architecturally UNKNOWN value.
This register is within the MPAM feature page memory frames.
In a system that supports Secure, Non-secure, Root, and Realm memory maps, there must be MPAM feature pages in all four address maps.
MSMON_OFLOW_MSI_MPAM_s, MSMON_OFLOW_MSI_MPAM_ns, MSMON_OFLOW_MSI_MPAM_rt, and MSMON_OFLOW_MSI_MPAM_rl must be separate registers.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_s | 0x08DC | MSMON_OFLOW_MSI_MPAM_s |
Accesses on this interface are RW.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_ns | 0x08DC | MSMON_OFLOW_MSI_MPAM_ns |
Accesses on this interface are RW.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_rt | 0x08DC | MSMON_OFLOW_MSI_MPAM_rt |
When FEAT_RME is implemented access on this interface are RW.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_rl | 0x08DC | MSMON_OFLOW_MSI_MPAM_rl |
When FEAT_RME is implemented access on this interface are RW.
30/03/2021 20:52; e3551d56dc294a4d55296a6c10544191ada08a8e
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