The DCCMVAC characteristics are:
Clean data or unified cache line by virtual address to PoC.
AArch32 System instruction DCCMVAC performs the same function as AArch64 System instruction DC CVAC.
This instruction is present only when AArch32 is supported at any Exception level. Otherwise, direct accesses to DCCMVAC are UNDEFINED.
DCCMVAC is a 32-bit System instruction.
The DCCMVAC input value bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Virtual address to use |
Virtual address to use. No alignment restrictions apply to this VA.
Execution of this instruction might require an address translation from VA to PA, and that translation might fault. For more information, see 'AArch32 data cache maintenance instruction (DC*)' in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.
Accesses to this instruction use the following encodings:
coproc | opc1 | CRn | CRm | opc2 |
---|---|---|---|---|
0b1111 | 0b000 | 0b0111 | 0b1010 | 0b001 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HSTR_EL2.T7 == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T7 == '1' then AArch32.TakeHypTrapException(0x03); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TPCP == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TPC == '1' then AArch32.TakeHypTrapException(0x03); else DCCMVAC(R[t]); elsif PSTATE.EL == EL2 then DCCMVAC(R[t]); elsif PSTATE.EL == EL3 then DCCMVAC(R[t]);
30/03/2021 20:51; e3551d56dc294a4d55296a6c10544191ada08a8e
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