SSBB

Speculative Store Bypass Barrier is a memory barrier which prevents speculative loads from bypassing earlier stores to the same virtual address under certain conditions.

The semantics of the Speculative Store Bypass Barrier are:

313029282726252423222120191817161514131211109876543210
11010101000000110011000010011111
CRmopc

System

SSBB

// No additional decoding required

Operation

SpeculativeStoreBypassBarrierToVA();


Internal version only: isa v30.41, AdvSIMD v27.08, pseudocode r8p5_00bet2_rc5, sve v8.5-00bet10_rc5 ; Build timestamp: 2019-03-28T07:14

Copyright © 2010-2019 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.