LDG

Load Allocation Tag loads an Allocation Tag from a memory address, generates a Logical Address Tag from the Allocation Tag and merges it into the destination register. The address used for the load is calculated from the base register and an immediate signed offset scaled by the Tag granule.

Integer
(Armv8.5)

313029282726252423222120191817161514131211109876543210
11011001011imm900XnXt

Integer

LDG <Xt>, [<Xn|SP>{, #<simm>}]

integer t = UInt(Xt); integer n = UInt(Xn); bits(64) offset = LSL(SignExtend(imm9, 64), LOG2_TAG_GRANULE);

Assembler Symbols

<Xt>

Is the 64-bit name of the general-purpose register to be transferred, encoded in the "Xt" field.

<Xn|SP>

Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Xn" field.

<simm>

Is the optional signed immediate offset, a multiple of 16 in the range -4096 to 4080, defaulting to 0 and encoded in the "imm9" field.

Operation

bits(64) address; bits(4) tag; if n == 31 then CheckSPAlignment(); address = SP[]; else address = X[n]; address = address + offset; address = Align(address, TAG_GRANULE); tag = AArch64.MemTag[address]; X[t] = AArch64.AddressWithAllocationTag(X[t], tag);


Internal version only: isa v30.41, AdvSIMD v27.08, pseudocode r8p5_00bet2_rc5, sve v8.5-00bet10_rc5 ; Build timestamp: 2019-03-28T06:34

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