The DBGWVR<n>_EL1 characteristics are:
Holds a data address value for use in watchpoint matching. Forms watchpoint n together with control register DBGWCR<n>_EL1.
External register DBGWVR<n>_EL1 bits [63:0] are architecturally mapped to AArch64 System register DBGWVR<n>_EL1[63:0] .
External register DBGWVR<n>_EL1 bits [31:0] are architecturally mapped to AArch32 System register DBGWVR<n>[31:0] .
DBGWVR<n>_EL1 is in the Core power domain. RW fields in this register reset to architecturally UNKNOWN values. These apply only on a Cold reset. The register is not affected by a Warm reset and is not affected by an External debug reset.
If breakpoint n is not implemented then this register is unallocated.
DBGWVR<n>_EL1 is a 64-bit register.
The DBGWVR<n>_EL1 bit assignments are:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
RESS[14:4] | VA[52:49] | VA[48:2] | |||||||||||||||||||||||||||||
VA[48:2] | RES0 | ||||||||||||||||||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved, Sign extended. Hardware and software must treat this field as RES0 if the most significant bit of VA is 0 or RES0, and as RES1 if the most significant bit of VA is 1.
Hardware always ignores the value of these bits and it is IMPLEMENTATION DEFINED whether:
Extension to VA[48:2]. See VA[48:2] for more details.
On a Cold reset, this field resets to an architecturally UNKNOWN value.
Extension to RESS[14:4]. See RESS[14:4] for more details.
Bits[48:2] of the address value for comparison.
When ARMv8.2-LVA is implemented, VA[52:49] forms the upper part of the address value. Otherwise, VA[52:49] are RESS.
Arm deprecates setting DBGWVR<n>_EL1[2] == 1.
On a Cold reset, this field resets to an architecturally UNKNOWN value.
Reserved, RES0.
SoftwareLockStatus() depends on the type of access attempted and AllowExternalDebugAccess() has a new definition from Armv8.4. Refer to the Pseudocode definitions for more information.
Component | Offset | Instance | Range |
---|---|---|---|
Debug | 0x800 + 16n | DBGWVR<n>_EL1 | 63:0 |
This interface is accessible as follows:
27/03/2019 21:59; e5e4db499bf9867a4b93324c4dbac985d3da9376
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