The ERXMISC0_EL1 characteristics are:
Accesses ERR<n>MISC0 for the error record selected by ERRSELR_EL1.SEL.
AArch64 System register ERXMISC0_EL1 bits [31:0] are architecturally mapped to AArch32 System register ERXMISC0[31:0] .
AArch64 System register ERXMISC0_EL1 bits [63:32] are architecturally mapped to AArch32 System register ERXMISC1[31:0] .
This register is present only when RAS is implemented. Otherwise, direct accesses to ERXMISC0_EL1 are UNDEFINED.
ERXMISC0_EL1 is a 64-bit register.
The ERXMISC0_EL1 bit assignments are:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
ERR<n>MISC0 | |||||||||||||||||||||||||||||||
ERR<n>MISC0 | |||||||||||||||||||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ERXMISC0_EL1 accesses ERR<n>MISC0, where n is the value in ERRSELR_EL1.SEL.
If ERRIDR_EL1.NUM == 0 or ERRSELR_EL1.SEL is set to a value greater than or equal to ERRIDR_EL1.NUM, then one of the following occurs:
An UNKNOWN record is selected.
ERXMISC0_EL1 is RAZ/WI.
Direct reads and writes of ERXMISC0_EL1 are NOPs.
Direct reads and writes of ERXMISC0_EL1 are UNDEFINED.
Accesses to this register use the following encodings:
op0 | CRn | op1 | op2 | CRm |
---|---|---|---|---|
0b11 | 0b0101 | 0b000 | 0b000 | 0b0101 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TERR == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && SCR_EL3.TERR == '1' then AArch64.SystemAccessTrap(EL3, 0x18); else return ERXMISC0_EL1; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && !ELUsingAArch32(EL3) && SCR_EL3.TERR == '1' then AArch64.SystemAccessTrap(EL3, 0x18); else return ERXMISC0_EL1; elsif PSTATE.EL == EL3 then return ERXMISC0_EL1;
op0 | CRn | op1 | op2 | CRm |
---|---|---|---|---|
0b11 | 0b0101 | 0b000 | 0b000 | 0b0101 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TERR == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && SCR_EL3.TERR == '1' then AArch64.SystemAccessTrap(EL3, 0x18); else ERXMISC0_EL1 = X[t]; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && !ELUsingAArch32(EL3) && SCR_EL3.TERR == '1' then AArch64.SystemAccessTrap(EL3, 0x18); else ERXMISC0_EL1 = X[t]; elsif PSTATE.EL == EL3 then ERXMISC0_EL1 = X[t];
13/12/2018 16:42; 6379d01c197f1d40720d32d0f84c419c9187c009
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