The MPAMF_PRI_IDR characteristics are:
The MPAMF_PRI_IDR is a 32-bit read-only register that indicates which MPAM priority partitioning features are present on this MSC. This register is only present if MPAMF_IDR.HAS_PRI_PART == 1.
The power domain of MPAMF_PRI_IDR is IMPLEMENTATION DEFINED.
This register is present only when MPAMF_IDR.HAS_PRI_PART == 1. Otherwise, direct accesses to MPAMF_PRI_IDR are IMPLEMENTATION DEFINED.
MPAMF_PRI_IDR is a 32-bit register.
The MPAMF_PRI_IDR bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | DSPRI_WD | 0 | 0 | DSPRI_0_IS_LOW | HAS_DSPRI | 0 | 0 | 0 | 0 | 0 | 0 | INTPRI_WD | 0 | 0 | INTPRI_0_IS_LOW | HAS_INTPRI |
Reserved, RES0.
Number of implemented bits in the downstream priority field (DSPRI) of MPAMCFG_PRI.
If HAS_DSPRI == 1, this field must contain a value from 1 to 32, inclusive.
If HAS_DSPRI == 0, this field must be 0.
Reserved, RES0.
Indicates whether 0 in MPAMCFG_PRI.DSPRI is the lowest or the highest priority.
DSPRI_0_IS_LOW | Meaning |
---|---|
0b0 |
In the MPAMCFG_PRI.DSPRI field, a value of 0 means the highest priority. |
0b1 |
In the MPAMCFG_PRI.DSPRI field, a value of 0 means the lowest priority. |
Indicates that this MSC implements the DSPRI field in the MPAMCFG_PRI register.
HAS_DSPRI | Meaning |
---|---|
0b0 |
This MSC supports priority partitioning, but does not implement a downstream priority (DSPRI) field in the MPAMCFG_PRI register. |
0b1 |
This MSC supports downstream priority partitioning and implements the downstream priority (DSPRI) field in the MPAMCFG_PRI register. |
Reserved, RES0.
Number of implemented bits in the internal priority field (INTPRI) in the MPAMCFG_PRI register.
If HAS_INTPRI == 1, this field must contain a value from 1 to 32, inclusive.
If HAS_INTPRI == 0, this field must be 0.
Reserved, RES0.
Indicates whether 0 in MPAMCFG_PRI.INTPRI is the lowest or the highest priority.
INTPRI_0_IS_LOW | Meaning |
---|---|
0b0 |
In the MPAMCFG_PRI.INTPRI field, a value of 0 means the highest priority. |
0b1 |
In the MPAMCFG_PRI.INTPRI field, a value of 0 means the lowest priority. |
Indicates that this MSC implements the INTPRI field in the MPAMCFG_PRI register.
HAS_INTPRI | Meaning |
---|---|
0b0 |
This MSC supports priority partitioning, but does not implement the internal priority (INTPRI) field in the MPAMCFG_PRI register. |
0b1 |
This MSC supports internal priority partitioning and implements the internal priority (INTPRI) field in the MPAMCFG_PRI register. |
This register is part of the MPAMF_BASE memory frame. In a system that supports Secure and Non-secure memory maps, the MPAMF_BASE frame must be accessible in both Secure and Non-secure memory address maps.
MPAMF_PRI_IDR must be accessible from the Non-secure and Secure address maps.
MPAMF_PRI_IDR is permitted to be shared between the Secure and Non-secure address maps unless the register contents is different for Secure and Non-secure partitions, when the register must be banked.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM.any | MPAMF_BASE_s | 0x0048 | MPAMF_PRI_IDR_s |
Access on this interface is RO.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM.any | MPAMF_BASE_ns | 0x0048 | MPAMF_PRI_IDR_ns |
Access on this interface is RO.
13/12/2018 16:42; 6379d01c197f1d40720d32d0f84c419c9187c009
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