The HACTLR characteristics are:
Controls IMPLEMENTATION DEFINED features of Hyp mode operation.
AArch32 System register HACTLR bits [31:0] are architecturally mapped to AArch64 System register ACTLR_EL2[31:0] .
If EL2 is not implemented, this register is RES0 from EL3.
RW fields in this register reset to architecturally UNKNOWN values.
HACTLR is a 32-bit register.
The HACTLR bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
IMPLEMENTATION DEFINED |
IMPLEMENTATION DEFINED.
This field resets to an architecturally UNKNOWN value.
Accesses to this register use the following encodings:
opc1 | opc2 | CRn | coproc | CRm |
---|---|---|---|---|
0b100 | 0b001 | 0b0001 | 0b1111 | 0b0000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HSTR_EL2.T1 == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T1 == '1' then AArch32.TakeHypTrapException(0x03); else UNDEFINED; elsif PSTATE.EL == EL2 then return HACTLR; elsif PSTATE.EL == EL3 then if SCR.NS == '0' then UNDEFINED; else return HACTLR;
opc1 | opc2 | CRn | coproc | CRm |
---|---|---|---|---|
0b100 | 0b001 | 0b0001 | 0b1111 | 0b0000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HSTR_EL2.T1 == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T1 == '1' then AArch32.TakeHypTrapException(0x03); else UNDEFINED; elsif PSTATE.EL == EL2 then HACTLR = R[t]; elsif PSTATE.EL == EL3 then if SCR.NS == '0' then UNDEFINED; else HACTLR = R[t];
13/12/2018 16:42; 6379d01c197f1d40720d32d0f84c419c9187c009
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