The EDAA32PFR characteristics are:
Provides information about implemented PE features.
For general information about the interpretation of the ID registers see 'Principles of the ID scheme for fields in ID registers' in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile, section D10.4.1.
It is IMPLEMENTATION DEFINED whether EDAA32PFR is implemented in the Core power domain or in the Debug power domain.
EDAA32PFR is only accessible in an implementation that only supports execution in AA32 state. If AArch64 state is supported at any Exception level, EDAA32PFR is RES0.
EDAA32PFR is a 64-bit register.
The EDAA32PFR bit assignments are:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | EL3 | EL2 | PMSA | VMSA | ||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reserved, RES0.
AArch32 EL3 Exception level handling. Defined values are:
EL3 | Meaning |
---|---|
0b0000 |
EL3 is not implemented. |
0b0001 |
EL3 can be executed in AArch32 state only. |
When the value of EDPFR.EL3 is non-zero, this field must be 0b0000.
All other values are reserved.
EDPFR.{EL1, EL0} indicate whether EL1 and EL0 can only be executed in AArch32 state.
AArch32 EL2 Exception level handling. Defined values are:
EL2 | Meaning |
---|---|
0b0000 |
EL2 is not implemented. |
0b0001 |
EL2 can be executed in AArch32 state only. |
When the value of EDPFR.EL2 is non-zero, this field must be 0b0000.
All other values are reserved.
EDPFR.{EL1, EL0} indicate whether EL1 and EL0 can only be executed in AArch32 state.
Indicates support for a PMSA. Defined values are:
PMSA | Meaning |
---|---|
0b0000 |
PMSA not supported. |
0b0100 |
Support for an Armv8-R PMSAv8-32. |
All other values are reserved. In Armv8-A, the only permitted value is 0b0000.
Indicates support for a VMSA. When the PMSA field is nonzero, determines support for a VMSA. When the PMSA field is 0b0000, VMSA is supported. Defined values are:
VMSA | Meaning |
---|---|
0b0000 |
VMSA not supported. |
All other values are reserved. In Armv8-A, the only permitted value is 0b0000.
Component | Offset | Instance |
---|---|---|
Debug | 0xD60 | EDAA32PFR |
This interface is accessible as follows:
13/12/2018 16:42; 6379d01c197f1d40720d32d0f84c419c9187c009
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