The DBGOSLSR characteristics are:
Provides status information for the OS Lock.
AArch32 System register DBGOSLSR bits [31:0] are architecturally mapped to AArch64 System register OSLSR_EL1[31:0] .
The OS Lock status is also visible in the external debug interface through EDPRSR.
This register is in the Cold reset domain. Some or all RW fields of this register have defined reset values. On a Cold reset these apply only if the PE resets into an Exception level that is using AArch32. Otherwise, on a Cold reset RW fields in this register reset to architecturally UNKNOWN values. The register is not affected by a Warm reset.
DBGOSLSR is a 32-bit register.
The DBGOSLSR bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | OSLM[1] | nTT | OSLK | OSLM[0] |
Reserved, RES0.
This field is bit[1] of OSLM[1:0].
OS lock model implemented. Identifies the form of OS save and restore mechanism implemented.
OSLM | Meaning |
---|---|
0b00 |
OS Lock not implemented. |
0b10 |
OS Lock implemented. |
All other values are reserved. In an Armv8 implementation the value 0b00 is not permitted.
The OSLM field is split as follows:
Not 32-bit access. This bit is always RAZ. It indicates that a 32-bit access is needed to write the key to the OS Lock Access Register.
OS Lock Status. The possible values are:
OSLK | Meaning |
---|---|
0b0 |
OS Lock unlocked. |
0b1 |
OS Lock locked. |
The OS Lock is locked and unlocked by writing to the OS Lock Access Register.
On a Cold reset, this field resets to 1.
This field is bit[0] of OSLM[1:0].
See OSLM[1] for the field description.
Accesses to this register use the following encodings:
coproc | opc1 | CRn | CRm | opc2 |
---|---|---|---|---|
0b1110 | 0b000 | 0b0001 | 0b0001 | 0b100 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.<TDE,TDOSA> != '00' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif EL2Enabled() && ELUsingAArch32(EL2) && HDCR.<TDE,TDOSA> != '00' then AArch32.TakeHypTrapException(0x05); elsif HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDOSA == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); else return DBGOSLSR; elsif PSTATE.EL == EL2 then if HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDOSA == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); else return DBGOSLSR; elsif PSTATE.EL == EL3 then return DBGOSLSR;
27/03/2019 21:59; e5e4db499bf9867a4b93324c4dbac985d3da9376
Copyright © 2010-2019 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.