The CTICHINSTATUS characteristics are:
Provides the raw status of the ECT channel inputs to the CTI.
CTICHINSTATUS is in the Debug power domain.
CTICHINSTATUS is a 32-bit register.
The CTICHINSTATUS bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
CHIN<n>, bit [n] |
Input channel <n> status.
Bits [31:N] are RAZ. N is the number of ECT channels implemented as defined by the CTIDEVID.NUMCHAN field.
Possible values of this bit are:
CHIN<n> | Meaning |
---|---|
0b0 |
Input channel <n> is inactive. |
0b1 |
Input channel <n> is active. |
If the ECT channels do not support multicycle events then it is IMPLEMENTATION DEFINED whether an input channel can be observed as active.
Component | Offset | Instance |
---|---|---|
CTI | 0x138 | CTICHINSTATUS |
Access on this interface is RO.
27/03/2019 21:59; e5e4db499bf9867a4b93324c4dbac985d3da9376
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