IC IALLUIS, Instruction Cache Invalidate All to PoU, Inner Shareable

The IC IALLUIS characteristics are:

Purpose

Invalidate all instruction caches in Inner Shareable domain to Point of Unification.

Configuration

AArch64 System instruction IC IALLUIS performs the same function as AArch32 System instruction ICIALLUIS.

Attributes

IC IALLUIS is a 64-bit System instruction.

Field descriptions

IC IALLUIS ignores the value in the register specified by the instruction encoding. Software does not have to write a value to the register before issuing this instruction.

Executing the IC IALLUIS instruction

Accesses to this instruction use the following encodings:

IC IALLUIS{, <Xt>}

op0op1CRnCRmop2Rt
0b010b0000b01110b00010b0000b11111

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TPU == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TICAB == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else IC_IALLUIS(); elsif PSTATE.EL == EL2 then IC_IALLUIS(); elsif PSTATE.EL == EL3 then IC_IALLUIS();




27/03/2019 21:59; e5e4db499bf9867a4b93324c4dbac985d3da9376

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