The PMDEVTYPE characteristics are:
Indicates to a debugger that this component is part of a PEs performance monitor interface.
It is IMPLEMENTATION DEFINED whether PMDEVTYPE is implemented in the Core power domain or in the Debug power domain.
Implementation of this register is OPTIONAL.
If ARMv8.3-DoPD is implemented, this register is in the Core power domain. If ARMv8.3-DoPD is not implemented, this register is in the Debug power domain.
PMDEVTYPE is a 32-bit register.
The PMDEVTYPE bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | SUB | MAJOR |
Reserved, RES0.
Subtype. Must read as 0x1 to indicate this is a component within a PE.
Major type. Must read as 0x6 to indicate this is a performance monitor component.
Component | Offset | Instance |
---|---|---|
PMU | 0xFCC | PMDEVTYPE |
This interface is accessible as follows:
13/12/2018 16:42; 6379d01c197f1d40720d32d0f84c419c9187c009
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