The GICR_IPRIORITYR<n> characteristics are:
Holds the priority of the corresponding interrupt for each SGI and PPI supported by the GIC.
RW fields in this register reset to architecturally UNKNOWN values.
A copy of these registers is provided for each Redistributor.
These registers are configured as follows:
GICR_IPRIORITYR<n> is a 32-bit register.
The GICR_IPRIORITYR<n> bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Priority_offset_3B | Priority_offset_2B | Priority_offset_1B | Priority_offset_0B |
Interrupt priority value from an IMPLEMENTATION DEFINED range, at byte offset 3. Lower priority values correspond to greater priority of the interrupt.
This field resets to an architecturally UNKNOWN value.
Interrupt priority value from an IMPLEMENTATION DEFINED range, at byte offset 2. Lower priority values correspond to greater priority of the interrupt.
This field resets to an architecturally UNKNOWN value.
Interrupt priority value from an IMPLEMENTATION DEFINED range, at byte offset 1. Lower priority values correspond to greater priority of the interrupt.
This field resets to an architecturally UNKNOWN value.
Interrupt priority value from an IMPLEMENTATION DEFINED range, at byte offset 0. Lower priority values correspond to greater priority of the interrupt.
This field resets to an architecturally UNKNOWN value.
These registers are used when affinity routing is enabled for the Security state of the interrupt. When affinity routing is not enabled the bits corresponding to the interrupt are RAZ/WI and GICD_IPRIORITYR<n> provides equivalent functionality.
These registers are used for SGIs and PPIs only. Equivalent functionality for SPIs is provided by GICD_IPRIORITYR<n>.
These registers are byte-accessible.
When GICD_CTLR.DS == 0:
Implementations must ensure that an interrupt that is pending at the time of the write uses either the old value or the new value and must ensure that the interrupt is neither lost nor handled more than one time. The effect of the change must be visible in finite time.
Component | Frame | Offset | Instance |
---|---|---|---|
GIC Redistributor | SGI_base | 0x0400 + 4n | GICR_IPRIORITYR<n> |
This interface is accessible as follows:
13/12/2018 16:42; 6379d01c197f1d40720d32d0f84c419c9187c009
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