The CNTFRQ characteristics are:
This register is provided so that software can discover the frequency of the system counter. It must be programmed with this value as part of system initialization. The value of the register is not interpreted by hardware.
AArch32 System register CNTFRQ bits [31:0] are architecturally mapped to AArch64 System register CNTFRQ_EL0[31:0] .
RW fields in this register reset to architecturally UNKNOWN values.
CNTFRQ is a 32-bit register.
The CNTFRQ bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Clock frequency |
Clock frequency. Indicates the system counter clock frequency, in Hz.
This field resets to an architecturally UNKNOWN value.
Accesses to this register use the following encodings:
opc1 | opc2 | CRn | coproc | CRm |
---|---|---|---|---|
0b000 | 0b000 | 0b1110 | 0b1111 | 0b0000 |
if PSTATE.EL == EL0 then return CNTFRQ; elsif PSTATE.EL == EL1 then return CNTFRQ; elsif PSTATE.EL == EL2 then return CNTFRQ; elsif PSTATE.EL == EL3 then return CNTFRQ;
opc1 | opc2 | CRn | coproc | CRm |
---|---|---|---|---|
0b000 | 0b000 | 0b1110 | 0b1111 | 0b0000 |
if IsHighestEL(PSTATE.EL) then CNTFRQ = R[t]; else UNDEFINED;
13/12/2018 16:42; 6379d01c197f1d40720d32d0f84c419c9187c009
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