CNTFRQ_EL0, Counter-timer Frequency register

The CNTFRQ_EL0 characteristics are:

Purpose

This register is provided so that software can discover the frequency of the system counter. It must be programmed with this value as part of system initialization. The value of the register is not interpreted by hardware.

Configuration

AArch64 System register CNTFRQ_EL0 bits [31:0] are architecturally mapped to AArch32 System register CNTFRQ[31:0] .

RW fields in this register reset to architecturally UNKNOWN values.

Attributes

CNTFRQ_EL0 is a 64-bit register.

Field descriptions

The CNTFRQ_EL0 bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
00000000000000000000000000000000
Clock frequency
313029282726252423222120191817161514131211109876543210

Bits [63:32]

Reserved, RES0.

Bits [31:0]

Clock frequency. Indicates the system counter clock frequency, in Hz.

This field resets to an architecturally UNKNOWN value.

Accessing the CNTFRQ_EL0

Accesses to this register use the following encodings:

MRS <Xt>, CNTFRQ_EL0

op0CRnop1op2CRm
0b110b11100b0110b0000b0000

if PSTATE.EL == EL0 then return CNTFRQ_EL0; elsif PSTATE.EL == EL1 then return CNTFRQ_EL0; elsif PSTATE.EL == EL2 then return CNTFRQ_EL0; elsif PSTATE.EL == EL3 then return CNTFRQ_EL0;

MSR CNTFRQ_EL0, <Xt>

op0CRnop1op2CRm
0b110b11100b0110b0000b0000

if IsHighestEL(PSTATE.EL) then CNTFRQ_EL0 = X[t]; else UNDEFINED;




13/12/2018 16:42; 6379d01c197f1d40720d32d0f84c419c9187c009

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