SPSel, Stack Pointer Select

The SPSel characteristics are:

Purpose

Allows the Stack Pointer to be selected between SP_EL0 and SP_ELx.

Configuration

Some or all RW fields of this register have defined reset values. These apply only if the PE resets into an Exception level that is using AArch64. Otherwise, RW fields in this register reset to architecturally UNKNOWN values.

Attributes

SPSel is a 64-bit register.

Field descriptions

The SPSel bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
RES0
RES0SP
313029282726252423222120191817161514131211109876543210

Bits [63:1]

Reserved, RES0.

SP, bit [0]

Stack pointer to use. Possible values of this bit are:

SPMeaning
0b0

Use SP_EL0 at all Exception levels.

0b1

Use SP_ELx for Exception level ELx.

This field resets to 1.

Accessing the SPSel

For details on the operation of the MSR (immediate) accessor, see MSR (immediate) in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.

Accesses to this register use the following encodings:

MRS <Xt>, SPSel

op0op1CRnCRmop2
0b110b0000b01000b00100b000

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then return Zeros(63):PSTATE.SP; elsif PSTATE.EL == EL2 then return Zeros(63):PSTATE.SP; elsif PSTATE.EL == EL3 then return Zeros(63):PSTATE.SP;

MSR SPSel, <Xt>

op0op1CRnCRmop2
0b110b0000b01000b00100b000

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then PSTATE.SP = X[t]<0>; elsif PSTATE.EL == EL2 then PSTATE.SP = X[t]<0>; elsif PSTATE.EL == EL3 then PSTATE.SP = X[t]<0>;

MSR SPSel, #<imm>

op0op1CRnop2
0b000b0000b01000b101



27/03/2019 21:59; e5e4db499bf9867a4b93324c4dbac985d3da9376

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