The MPAMF_SIDR characteristics are:
The MPAMF_SIDR is a 32-bit read-only register that indicates the maximum Secure PARTID and Secure PMG on this MSC.
The power domain of MPAMF_SIDR is IMPLEMENTATION DEFINED.
MPAMF_SIDR is a 32-bit register.
The MPAMF_SIDR bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | S_PMG_MAX | S_PARTID_MAX |
Reserved, RES0.
Maximum value of Secure PMG supported by this component.
Maximum value of Secure PARTID supported by this component.
This register is part of the MPAMF_BASE memory frame. In a system that supports Secure and Non-secure memory maps, the MPAMF_BASE frame must be accessible in both Secure and Non-secure memory address maps.
MPAMF_SIDR must only be accessible from the Secure address map. If the system or the MSC does not support the Secure address map, this register must not be accessible.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM.any | MPAMF_BASE_s | 0x0008 | MPAMF_SIDR_s |
Access on this interface is RO.
27/03/2019 21:59; e5e4db499bf9867a4b93324c4dbac985d3da9376
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