The ERRCIDR0 characteristics are:
Provides discovery information for the component.
Implementation of this register is OPTIONAL.
This register is present only when RAS is implemented. Otherwise, direct accesses to ERRCIDR0 are RES0.
ERRCIDR0 is a 32-bit register.
The ERRCIDR0 bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | PRMBL_0 |
Reserved, RES0.
Component identification preamble, segment 0. This field reads as 0x0D.
Component | Offset | Instance |
---|---|---|
RAS | 0xFF0 | ERRCIDR0 |
Access on this interface is RO.
13/12/2018 16:42; 6379d01c197f1d40720d32d0f84c419c9187c009
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