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DUP (scalar)

Broadcast general-purpose register to vector elements (unpredicated).

Unconditionally broadcast the general-purpose scalar source register into each element of the destination vector. This instruction is unpredicated.

This instruction is used by the alias MOV (scalar, unpredicated).

313029282726252423222120191817161514131211109876543210
00000101size100000001110RnZd

SVE

DUP <Zd>.<T>, <R><n|SP>

if !HaveSVE() then UNDEFINED; integer esize = 8 << UInt(size); integer n = UInt(Rn); integer d = UInt(Zd);

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T> Is the size specifier, encoded in size:
size<T>
00B
01H
10S
11D
<R> Is a width specifier, encoded in size:
size<R>
01W
x0W
11X
<n|SP>

Is the number [0-30] of the general-purpose source register or the name SP (31), encoded in the "Rn" field.

Operation

CheckSVEEnabled(); integer elements = VL DIV esize; bits(64) operand; if n == 31 then operand = SP[]; else operand = X[n]; bits(VL) result; for e = 0 to elements-1 Elem[result, e, esize] = operand<esize-1:0>; Z[d] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: isa v30.44v30.42, AdvSIMD v27.08, pseudocode v8.5-2019-06_rc2-5-g22901f2future-20190403, sve v2019-06_rc4v8.5-00bet10_rc5 ; Build timestamp: 2019-06-26T222019-04-17T09:0458

Copyright © 2010-2019 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.

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