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Wait For Event is a hint instruction that indicates that the PE can enter a low-power state and remain there until a wakeup event occurs. Wakeup events include the event signaled as a result of executing the SEV instruction on any PE in the multiprocessor system. For more information, see Wait For Event mechanism and Send event.
As described in Wait For Event mechanism and Send event, the execution of a WFE instruction that would otherwise cause entry to a low-power state can be trapped to a higher Exception level. See:
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CRm | op2 |
SystemHintOp op;
case CRm:op2 of
when '0000 000' op = SystemHintOp_NOP;
when '0000 001' op = SystemHintOp_YIELD;
when '0000 010' op = SystemHintOp_WFE;
when '0000 011' op = SystemHintOp_WFI;
when '0000 100' op = SystemHintOp_SEV;
when '0000 101' op = SystemHintOp_SEVL;
when '0000 111'
SEE "XPACLRI";
when '0001 xxx'
SEE "PACIA1716, PACIB1716, AUTIA1716, AUTIB1716";
when '0010 000'
if !HaveRASExt() then EndOfInstruction(); // Instruction executes as NOP
op = SystemHintOp_ESB;
when '0010 001'
if !HaveStatisticalProfiling() then EndOfInstruction(); // Instruction executes as NOP
op = SystemHintOp_PSB;
when '0010 010'
if !HaveSelfHostedTrace() then EndOfInstruction(); // Instruction executes as NOP
op = SystemHintOp_TSB;
when '0010 100'
op = SystemHintOp_CSDB;
when '0011 xxx'
SEE "PACIAZ, PACIASP, PACIBZ, PACIBSP, AUTIAZ, AUTIASP, AUTIBZ, AUTIBSP";
when '0100 xx0'
op = SystemHintOp_BTI;
// Check branch target compatibility between BTI instruction and PSTATE.BTYPE
BTypeCompatible = BTypeCompatible_BTI(op2<2:1>);
otherwise EndOfInstruction// Empty.(); // Instruction executes as NOP
ifcase op of
when SystemHintOp_YIELDHint_Yield();
when SystemHintOp_WFE
if IsEventRegisterSet() then
ClearEventRegister();
else
if PSTATE.EL == EL0 then
// Check for traps described by the OS which may be EL1 or EL2.
AArch64.CheckForWFxTrap(EL1, TRUE);
if PSTATE.EL IN {EL0, EL1} && EL2Enabled() && !IsInHost() then
// Check for traps described by the Hypervisor.
AArch64.CheckForWFxTrap(EL2, TRUE);
if HaveEL(EL3) && PSTATE.EL != EL3 then
// Check for traps described by the Secure Monitor.
AArch64.CheckForWFxTrap(EL3, TRUE);
WaitForEvent();
when SystemHintOp_WFI
if !InterruptPending() then
if PSTATE.EL == EL0 then
// Check for traps described by the OS which may be EL1 or EL2.
AArch64.CheckForWFxTrap(EL1, FALSE);
if PSTATE.EL IN {EL0, EL1} && EL2Enabled() && !IsInHost() then
// Check for traps described by the Hypervisor.
AArch64.CheckForWFxTrap(EL2, FALSE);
if HaveEL(EL3) && PSTATE.EL != EL3 then
// Check for traps described by the Secure Monitor.
AArch64.CheckForWFxTrap(EL3, FALSE);
WaitForInterrupt();
when SystemHintOp_SEVSendEvent();
when SystemHintOp_SEVLSendEventLocal();
when SystemHintOp_ESB
if TSTATE.depth > 0 then
FailTransaction(TMFailure_ERR, FALSE);
SynchronizeErrors();
AArch64.ESBOperation();
if PSTATE.EL IN {EL0, EL1} && EL2Enabled() then AArch64.vESBOperation();
TakeUnmaskedSErrorInterrupts();
when SystemHintOp_PSBProfilingSynchronizationBarrier();
when SystemHintOp_TSBTraceSynchronizationBarrier();
when SystemHintOp_CSDBConsumptionOfSpeculativeDataBarrier();
when SystemHintOp_BTI();BTypeNext = '00';
otherwise // do nothing
Internal version only: isa v30.44, AdvSIMD v27.08, pseudocode v8.5-2019-06_rc2-5-g22901f2, sve v2019-06_rc4
; Build timestamp: 2019-06-26T22:3004
Copyright © 2010-2019 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.
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