UMLSLB (indexed)

Unsigned multiply-subtract long from accumulator (bottom, indexed).

Multiply the even-numbered unsigned elements within each 128-bit segment of the first source vector by the specified unsigned element in the corresponding second source vector segment and destructively subtract from the overlapping double-width elements of the addend vector.

The elements within the second source vector are specified using an immediate index which selects the same element position within each 128-bit vector segment. The index range is from 0 to one less than the number of elements per 128-bit segment, encoded in 2 or 3 bits depending on the size of the element.

It has encodings from 2 classes: 32-bit and 64-bit

32-bit

313029282726252423222120191817161514131211109876543210
01000100101i3hZm1011i3l0ZnZda

32-bit

UMLSLB <Zda>.S, <Zn>.H, <Zm>.H[<imm>]

if !HaveSVE2() then UNDEFINED; integer esize = 16; integer index = UInt(i3h:i3l); integer n = UInt(Zn); integer m = UInt(Zm); integer da = UInt(Zda); integer sel = 0;

64-bit

313029282726252423222120191817161514131211109876543210
01000100111i2hZm1011i2l0ZnZda

64-bit

UMLSLB <Zda>.D, <Zn>.S, <Zm>.S[<imm>]

if !HaveSVE2() then UNDEFINED; integer esize = 32; integer index = UInt(i2h:i2l); integer n = UInt(Zn); integer m = UInt(Zm); integer da = UInt(Zda); integer sel = 0;

Assembler Symbols

<Zda>

Is the name of the third source and destination scalable vector register, encoded in the "Zda" field.

<Zn>

Is the name of the first source scalable vector register, encoded in the "Zn" field.

<Zm>

For the 32-bit variant: is the name of the second source scalable vector register Z0-Z7, encoded in the "Zm" field.

For the 64-bit variant: is the name of the second source scalable vector register Z0-Z15, encoded in the "Zm" field.

<imm>

For the 32-bit variant: is the element index, in the range 0 to 7, encoded in the "i3h:i3l" fields.

For the 64-bit variant: is the element index, in the range 0 to 3, encoded in the "i2h:i2l" fields.

Operation

CheckSVEEnabled(); integer elements = VL DIV (2 * esize); integer eltspersegment = 128 DIV (2 * esize); bits(VL) operand1 = Z[n]; bits(VL) operand2 = Z[m]; bits(VL) result = Z[da]; for e = 0 to elements-1 integer s = e - e MOD eltspersegment; integer element1 = UInt(Elem[operand1, 2 * e + sel, esize]); integer element2 = UInt(Elem[operand2, 2 * s + index, esize]); integer element3 = UInt(Elem[result, e, 2*esize]); integer res = element3 - element1 * element2; Elem[result, e, 2*esize] = res<2*esize-1:0>; Z[da] = result;

Operational information

If PSTATE.DIT is 1:

This instruction might be immediately preceded in program order by a MOVPRFX instruction that conforms to all of the following requirements, otherwise the behavior of either or both instructions is unpredictable:

The MOVPRFX instructions that can be used with this instruction are as follows:


Internal version only: isa v30.44, AdvSIMD v27.08, pseudocode v8.5-2019-06_rc2-5-g22901f2, sve v2019-06_rc4 ; Build timestamp: 2019-06-26T22:30

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