(old) htmldiff from-(new)

BEXT

Gather lower bits from positions selected by bitmask.

This optional instruction gathers bits in each element of the first source vector from the bit positions indicated by non-zero bits in the corresponding mask element of the second source vector to the lowest-numbered contiguous bits of the corresponding destination element, preserving their order, and sets the remaining higher-numbered bits to zero. This instruction is unpredicated.

313029282726252423222120191817161514131211109876543210
01000101size0Zm101100ZnZd

SVE2

BEXT <Zd>.<T>, <Zn>.<T>, <Zm>.<T>

if !HaveSVE2BitPerm() then UNDEFINED; integer esize = 8 << UInt(size); integer n = UInt(Zn); integer m = UInt(Zm); integer d = UInt(Zd);

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T> Is the size specifier, encoded in size:
size<T>
00B
01H
10S
11D
<Zn>

Is the name of the first source scalable vector register, encoded in the "Zn" field.

<Zm>

Is the name of the second source scalable vector register, encoded in the "Zm" field.

Operation

CheckSVEEnabled(); integer elements = VL DIV esize; bits(VL) data = Z[n]; bits(VL) mask = Z[m]; bits(VL) result; for e = 0 to elements - 1 Elem[result, e, esize] = BitExtract(Elem[data, e, esize], Elem[mask, e, esize]); Z[d] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: isa v30.44v30.42, AdvSIMD v27.08, pseudocode v8.5-2019-06_rc2-5-g22901f2future-20190403, sve v2019-06_rc4v8.5-00bet10_rc5 ; Build timestamp: 2019-06-26T222019-04-17T09:0458

Copyright © 2010-2019 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.

(old) htmldiff from-(new)