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LASTA (scalar)

Extract element after last to general-purpose register.

If there is an active element then extract the element after the last active element modulo the number of elements from the final source vector register. If there are no active elements, extract element zero. Then zero-extend and place the extracted element in the destination general-purpose register.

313029282726252423222120191817161514131211109876543210
00000101size100000101PgZnRd

SVE

LASTA <R><d>, <Pg>, <Zn>.<T>

if !HaveSVE() then UNDEFINED; integer esize = 8 << UInt(size); integer rsize = if esize < 64 then 32 else 64; integer g = UInt(Pg); integer n = UInt(Zn); integer d = UInt(Rd); boolean isBefore = FALSE;

Assembler Symbols

<R> Is a width specifier, encoded in size:
size<R>
01W
x0W
11X
<d>

Is the number [0-30] of the destination general-purpose register or the name ZR (31), encoded in the "Rd" field.

<Pg>

Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.

<Zn>

Is the name of the source scalable vector register, encoded in the "Zn" field.

<T> Is the size specifier, encoded in size:
size<T>
00B
01H
10S
11D

Operation

CheckSVEEnabled(); integer elements = VL DIV esize; bits(PL) mask = P[g]; bits(VL) operand = Z[n]; bits(rsize) result; integer last = LastActiveElement(mask, esize); if isBefore then if last < 0 then last = elements - 1; else last = last + 1; if last >= elements then last = 0; result = ZeroExtend(Elem[operand, last, esize]); X[d] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: isa v30.44v30.42, AdvSIMD v27.08, pseudocode v8.5-2019-06_rc2-5-g22901f2future-20190403, sve v2019-06_rc4v8.5-00bet10_rc5 ; Build timestamp: 2019-06-26T222019-04-17T09:0458

Copyright © 2010-2019 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.

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