AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

# GITS_TYPER, ITS Type Register

The GITS_TYPER characteristics are:

## Purpose

Specifies the features that an ITS supports.

## Configuration

## Attributes

GITS_TYPER is a 64-bit register.

## Field descriptions

The GITS_TYPER bit assignments are:

63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32
RES0 | MPAM | VMOVP | CIL | CIDbits
HCC | RES0 | PTA | SEIS | Devbits | ID_bits | ITT_entry_size | IMPLEMENTATION DEFINED | CCT | Virtual | Physical
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0

#### Bits [63:39]

Reserved, RES0.

#### MPAM, bit [38]
When GIC, >=3.1 is implemented:

MPAM

MPAM | Meaning
--- | ---
0b0 | MPAM not supported.
0b1 | MPAM supported.

####
Otherwise:

Reserved, RES0.

#### VMOVP, bit [37]

Indicates the form of the VMOVP command.

VMOVP | Meaning
--- | ---
0b0 | When moving a vPE, software must issue a VMOVP on all ITSs that have mappings for that vPE. The ITSList and Sequence Number fields in the VMOVP command must ensure synchronization, otherwise behavior is UNPREDICTABLE.
0b1 | When moving a vPE, software must only issue a VMOVP on one of the ITSs that has a mapping for that vPE. The ITSList and Sequence Number fields in the VMOVP command are RES0.

#### CIL, bit [36]

Collection ID Limit.

CIL | Meaning
--- | ---
0b0 | ITS supports 16-bit Collection ID, GITS_TYPER.CIDbits is RES0.
0b1 | GITS_TYPER.CIDbits indicates supported Collection ID size

In implementations that do not support Collections in external memory, this bit is RES0 and the number of Collections supported is reported by GITS_TYPER.HCC.

#### CIDbits, bits [35:32]

Number of Collection ID bits.

- The number of bits of Collection ID - 1.
- When GITS_TYPER.CIL==0, this field is RES0.

#### HCC, bits [31:24]

Hardware Collection Count. The number of interrupt collections supported by the ITS without provisioning of external memory.

Note

Collections held in hardware are unmapped at reset.

#### Bits [23:20]

Reserved, RES0.

#### PTA, bit [19]

Physical Target Addresses. Indicates the format of the target address:

PTA | Meaning
--- | ---
0b0 | The target address corresponds to the PE number specified by GICR_TYPER.Processor_Number.
0b1 | The target address corresponds to the base physical address of the required Redistributor.

See Target addresses for more information.

#### SEIS, bit [18]

SEI support. Indicates whether the virtual CPU interface supports generation of SEIs:

SEIS | Meaning
--- | ---
0b0 | The ITS does not support local generation of SEIs.
0b1 | The ITS supports local generation of SEIs.

#### Devbits, bits [17:13]

The number of DeviceID bits implemented, minus one.

#### ID_bits, bits [12:8]

The number of EventID bits implemented, minus one.

#### ITT_entry_size, bits [7:4]

Read-only. Indicates the number of bytes per translation table entry, minus one.

See the ITS command 'MAPD' for more information.

#### IMPLEMENTATION DEFINED, bit [3]

IMPLEMENTATION DEFINED.

#### CCT, bit [2]

Cumulative Collection Tables.

CCT | Meaning
--- | ---
0b0 | The total number of supported collections is determined by the number of collections held in memory only.
0b1 | The total number of supported collections is determined by number of collections that are held in memory and the number indicated by GITS_TYPER.HCC.

If GITS_TYPER.HCC==0, or if memory backed collections are not supported (all GITS_BASER<n>.Type != 100), this bit is RES0.

#### Virtual, bit [1]

Indicates whether the ITS supports virtual LPIs and direct injection of virtual LPIs:

Virtual | Meaning
--- | ---
0b0 | The ITS does not support virtual LPIs or direct injection of virtual LPIs.
0b1 | The ITS supports virtual LPIs and direct injection of virtual LPIs.

This field is RES0 in GICv3 implementations.

#### Physical, bit [0]

Indicates whether the ITS supports physical LPIs:

Physical | Meaning
--- | ---
0b0 | The ITS does not support physical LPIs.
0b1 | The ITS supports physical LPIs.

This field is RES1, indicating that the ITS supports physical LPIs.

## Accessing the GITS_TYPER

#### GITS_TYPER can be accessed through the memory-mapped interfaces:

Component | Offset | Instance
--- | --- | ---
GIC ITS control | 0x0008 | GITS_TYPER

This interface is accessible as follows:

- When GICD_CTLR.DS == 0b0 access to this register is RO.
- When IsAccessSecure() access to this register is RO.
- When !IsAccessSecure() access to this register is RO.

AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

15/04/2019 16:47; 8c23526ba8a13a72aada4137daf3e3977b49036e

Copyright © 2010-2019 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.