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# TRCRSR, Resources Status Register

The TRCRSR characteristics are:

## Purpose

Use this to set, or read, the status of the resources.

## Configuration

External register TRCRSR bits [31:0] are architecturally mapped to AArch64 System register TRCRSR[31:0] .

RW fields in this register reset to architecturally UNKNOWN values.

This register is present only when ETE is implemented. Otherwise, direct accesses to TRCRSR are RES0.

## Attributes

TRCRSR is a 32-bit register.

## Field descriptions

The TRCRSR bit assignments are:

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
RES0 | TA | EVENT<m>, bit [m+8] | RES0 | EXTIN<m>, bit [m]

#### Bits [31:13]

Reserved, RES0.

#### TA, bit [12]

Tracing active.

TA | Meaning
--- | ---
0b0 | Tracing is not active.
0b1 | Tracing is active.

On a Trace unit reset, this field resets to an architecturally UNKNOWN value.

#### EVENT<m>, bit [m+8], for m = 0 to 3

Untraced status of ETEEvents.

EVENT<m> | Meaning
--- | ---
0b0 | An ETEEvent[n] has not occurred.
0b1 | An ETEEvent[n] has occurred while the resources were in the Paused state.

On a Trace unit reset, this field resets to an architecturally UNKNOWN value.

#### Bits [7:4]

Reserved, RES0.

#### EXTIN<m>, bit [m], for m = 0 to 3

The sticky status of the external input selectors.

EXTIN<m> | Meaning
--- | ---
0b0 | An event selected by external input selector[n] has not occurred.
0b1 | At least one event selected by external input selector[n] has occurred while the resources were in the Paused state.

On a Trace unit reset, this field resets to an architecturally UNKNOWN value.

## Accessing the TRCRSR

Must always be programmed.

Writes are CONSTRAINED UNPREDICTABLE if the trace unit is not in the Idle state.

Reads from this register might return an UNKNOWN value if the trace unit is not in either of the Idle or Stable states.

#### TRCRSR can be accessed through the external debug interface:

Component | Offset
--- | ---
ETE | 0x028

This interface is accessible as follows:

- When OSLockStatus(), or !AllowExternalTraceAccess() or !IsTraceCorePowered() access to this register returns an Error.
- Otherwise access to this register is RW.

AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

15/04/2019 16:47; 8c23526ba8a13a72aada4137daf3e3977b49036e

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