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# MPAMF_CSUMON_IDR, MPAM Features Cache Storage Usage Monitoring ID register

The MPAMF_CSUMON_IDR characteristics are:

## Purpose

The MPAMF_CSUMON_IDR is a 32-bit read-only register that indicates the number of cache storage usage monitors for this MSC.

## Configuration

The power domain of MPAMF_CSUMON_IDR is IMPLEMENTATION DEFINED.

This register is present only when MPAMF_IDR.HAS_MSMON == 1 and MPAMF_MSMON_IDR.MSMON_CSU == 1. Otherwise, direct accesses to MPAMF_CSUMON_IDR are IMPLEMENTATION DEFINED.

## Attributes

MPAMF_CSUMON_IDR is a 32-bit register.

## Field descriptions

The MPAMF_CSUMON_IDR bit assignments are:

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
HAS_CAPTURE | RES0 | NUM_MON

#### HAS_CAPTURE, bit [31]

The MSC's implementation supports copying an MSMON_CSU to the corresponding MSMON_CSU_CAPTURE on a capture event.

HAS_CAPTURE | Meaning
--- | ---
0b0 | MSMON_CSU_CAPTURE is not implemented and there is no support for capture events in this component's CSU monitor.
0b1 | The MSMON_CSU_CAPTURE register is implemented and this component's CSU monitor supports the capture event behavior.

#### Bits [30:16]

Reserved, RES0.

#### NUM_MON, bits [15:0]

The number of cache storage usage monitors implemented in this MSC.

## Accessing the MPAMF_CSUMON_IDR

This register is part of the MPAMF_BASE memory frame. In a system that supports Secure and Non-secure memory maps, the MPAMF_BASE frame must be accessible in both Secure and Non-secure memory address maps.

MPAMF_CSUMON_IDR must be accessible from the Non-secure and Secure address maps.

MPAMF_CSUMON_IDR is permitted to be shared between the Secure and Non-secure address maps unless the register contents is different for Secure and Non-secure partitions, when the register must be banked.

#### MPAMF_CSUMON_IDR can be accessed through the memory-mapped interfaces:

Component | Frame | Offset | Instance
--- | --- | --- | ---
MPAM.any | MPAMF_BASE_s | 0x0088 | MPAMF_CSUMON_IDR_s

Access on this interface is RO.

Component | Frame | Offset | Instance
--- | --- | --- | ---
MPAM.any | MPAMF_BASE_ns | 0x0088 | MPAMF_CSUMON_IDR_ns

Access on this interface is RO.

AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

27/03/2019 21:59; e5e4db499bf9867a4b93324c4dbac985d3da9376

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