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# MPAMCFG_MBW_PBM, MPAM Bandwidth Portion Bitmap Parition Configuration Register

The MPAMCFG_MBW_PBM characteristics are:

## Purpose

The MPAMCFG_MBW_PBM register is a read-write register that configures the cache portions that a PARTID is allowed to allocate. After setting MPAMCFG_PART_SEL with a PARTID, software (usually a hypervisor) writes to the MPAMCFG_CPBM register to configure which cache portions the PARTID is allowed to allocate.

## Configuration

The power domain of MPAMCFG_MBW_PBM is IMPLEMENTATION DEFINED.

This register is present only when MPAMF_IDR.HAS_MBW_PART == 1 and MPAMF_MBW_IDR.HAS_PBM == 1. Otherwise, direct accesses to MPAMCFG_MBW_PBM are IMPLEMENTATION DEFINED.

## Attributes

MPAMCFG_MBW_PBM is a 4096-bit register.

## Field descriptions

The MPAMCFG_MBW_PBM bit assignments are:

#### BWPBM<n>, bit [n], for n = 0 to 4095

Each bit BWPBM<n> grants permission to the PARTID to allocate bandwidth within bandwidth portion n.

BWPBM<n> | Meaning
--- | ---
0b0 | The PARTID is not permitted to allocate into bandwidth portion n.
0b1 | The PARTID is permitted to allocate within bandwidth portion n.

The number of bits in the bandwidth portion partitioning bit map of this component is given in MPAMF_MBW_IDR.BWPBM_WD. BWPBM_WD contains a value from 1 to 212, inclusive. Values of BWPBM_WD greater than 32 require a group of 32-bit registers to access the BWPBM, up to 128 32-bit registers.

Bits BWPBM<n>, where n is greater than BWPBM_WD, are not required to be implemented.

## Accessing the MPAMCFG_MBW_PBM

This register is part of the MPAMF_BASE memory frame. In a system that supports Secure and Non-secure memory maps, the MPAMF_BASE frame must be accessible in both Secure and Non-secure memory address maps.

MPAMCFG_MBW_PBM must be accessible from the Non-secure and Secure address maps.

MPAMCFG_MBW_PBM must be banked for the Secure and Non-secure address maps. The Secure instance accesses the memory bandwidth portion bitmaps used for Secure PARTIDs, and the Non-secure instance accesses the memory bandwidth portion bitmaps used for Non-secure PARTIDs.

#### MPAMCFG_MBW_PBM can be accessed through the memory-mapped interfaces:

Component | Frame | Offset | Instance
--- | --- | --- | ---
MPAM.any | MPAMF_BASE_s | 0x2000 | MPAMCFG_MBW_PBM_s

Access on this interface is RW.

Component | Frame | Offset | Instance
--- | --- | --- | ---
MPAM.any | MPAMF_BASE_ns | 0x2000 | MPAMCFG_MBW_PBM_ns

Access on this interface is RW.

AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

27/03/2019 21:59; e5e4db499bf9867a4b93324c4dbac985d3da9376

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