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# ERRPIDR3, Peripheral Identification Register 3

The ERRPIDR3 characteristics are:

## Purpose

Provides discovery information about the component.

For more information, see About the Peripheral identification scheme in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.

## Configuration

Implementation of this register is OPTIONAL.

This register is present only when RAS is implemented. Otherwise, direct accesses to ERRPIDR3 are RES0.

## Attributes

ERRPIDR3 is a 32-bit register.

## Field descriptions

The ERRPIDR3 bit assignments are:

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
RES0 | REVAND | CMOD

#### Bits [31:8]

Reserved, RES0.

#### REVAND, bits [7:4]
When the component uses a 12-bit part number:

Component minor revision. ERRPIDR2.REVISION and this field together form the revision number of the component, with REVISION being the most significant part and REVAND the least significant part.

This field reads as an IMPLEMENTATION DEFINED value.

####
When the component uses a 16-bit part number:

Component revision.

This field reads as an IMPLEMENTATION DEFINED value.

####
Otherwise:

Reserved, RES0.

#### CMOD, bits [3:0]

Customer Modified. If the value of this field is non-zero, then the component has IMPLEMENTATION DEFINED modifications.

CMOD | Meaning
--- | ---
0b0000 | The component is not modified from the original design.

For any two components with the same Unique Component Identifier:

- If the value of the CMOD fields of both components equals zero, the components are identical.

- If the value of the CMOD field of either of the two components is non-zero, they might not be identical, even though they have the same Unique Component Identifier.

- If the CMOD fields of both components have the same non-zero value, it does not necessarily mean that they have the same modifications.

This field reads as an IMPLEMENTATION DEFINED value.

## Accessing the ERRPIDR3

#### ERRPIDR3 can be accessed through the memory-mapped interfaces:

Component | Offset | Instance
--- | --- | ---
RAS | 0xFEC | ERRPIDR3

Access on this interface is RO.

AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

27/03/2019 21:59; e5e4db499bf9867a4b93324c4dbac985d3da9376

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