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# ERRDEVARCH, Device Architecture Register

The ERRDEVARCH characteristics are:

## Purpose

Provides discovery information for the component.

## Configuration

This register is present only when RAS is implemented. Otherwise, direct accesses to ERRDEVARCH are UNDEFINED.

## Attributes

ERRDEVARCH is a 32-bit register.

## Field descriptions

The ERRDEVARCH bit assignments are:

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
ARCHITECT | PRESENT | REVISION | ARCHVER | ARCHPART

#### ARCHITECT, bits [31:21]

Architect.

Defines the architect of the component. Bits [31:28] are the JEP106 continuation code (JEP106 bank ID, minus 1) and bits [27:21] are the JEP106 ID code.

ARCHITECT | Meaning
--- | ---
0b01000111011 | JEP106 continuation code 0x4, ID code 0x3B. Arm Limited.

This field reads as 0x23B.

Other values are defined by the JEDEC JEP106 standard.

#### PRESENT, bit [20]

DEVARCH Present.

Defines that the DEVARCH register is present.

PRESENT | Meaning
--- | ---
0b0 | Device Architecture information not present.
0b1 | Device Architecture information present.

This bit is RAO.

#### REVISION, bits [19:16]

Revision.

Defines the architecture revision of the component. The defined values of this field are:

REVISION | Meaning
--- | ---
0b0000 | RAS System Architecture v1.0.
0b0001 | RAS System Architecture v1.1. As 0b0000 and also: Simplifies ERR<n>STATUS. Adds support for additional ERR<n>MISC<m> registers. Adds support for the optional RAS Timestamp Extension. Adds support for the optional RAS Common Fault Injection Model Extension.

All other values are reserved.

#### ARCHVER, bits [15:12]

Architecture Version.

Defines the architecture version of the component. The defined values of this field are:

ARCHVER | Meaning
--- | ---
0b0000 | RAS System Architecture v1.

This field reads as 0b0000.

All other values are reserved.

ARCHVER and ARCHPART are also defined as a single field, ARCHID, so that ARCHVER is ARCHID[15:12].

#### ARCHPART, bits [11:0]

Architecture Part.

Defines the architecture of the component.

ARCHPART | Meaning
--- | ---
0xA00 | RAS system architecture.

This register reads as 0xA00.

ARCHVER and ARCHPART are also defined as a single field, ARCHID, so that ARCHPART is ARCHID[11:0].

## Accessing the ERRDEVARCH

#### ERRDEVARCH can be accessed through the memory-mapped interfaces:

Component | Offset | Instance
--- | --- | ---
RAS | 0xFBC | ERRDEVARCH

Access on this interface is RO.

AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

27/03/2019 21:59; e5e4db499bf9867a4b93324c4dbac985d3da9376

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