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# ELR_hyp, Exception Link Register (Hyp mode)

The ELR_hyp characteristics are:

## Purpose

When taking an exception to Hyp mode, holds the address to return to.

## Configuration

AArch32 System register ELR_hyp bits [31:0] are architecturally mapped to AArch64 System register ELR_EL2[31:0] .

On a reset into an Exception level that is using AArch32 ELR_hyp is UNKNOWN.

## Attributes

ELR_hyp is a 32-bit register.

## Field descriptions

The ELR_hyp bit assignments are:

31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
Return address

#### Bits [31:0]

Return address.

This field resets to an architecturally UNKNOWN value.

## Accessing the ELR_hyp

ELR_hyp is accessible only at Hyp mode and Monitor mode. For more details, see MRS (banked register) and MSR (banked register) in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.

Accesses to this register use the following encodings:

#### MRS{<c>}{<q>} <Rd>, ELR_hyp

R | M | M1
--- | --- | ---
0b0 | 0b1 | 0b1110

#### MSR{<c>}{<q>} ELR_hyp, <Rn>

R | M | M1
--- | --- | ---
0b0 | 0b1 | 0b1110

AArch32 Registers | AArch64 Registers | AArch32 Instructions | AArch64 Instructions | Index by Encoding | External Registers | External Registers by Offset | Registers by Functional Group | Proprietary Notice

27/03/2019 21:59; e5e4db499bf9867a4b93324c4dbac985d3da9376

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