Next: LM32-Modifiers, Up: LM32 Syntax [Contents][Index]

#### 9.19.2.1 Register Names

LM32 has 32 x 32-bit general purpose registers ‘`r0`’, ‘`r1`’, ... ‘`r31`’.

The following aliases are defined: ‘`gp`’ - ‘`r26`’, ‘`fp`’ - ‘`r27`’, ‘`sp`’ - ‘`r28`’, ‘`ra`’ - ‘`r29`’, ‘`ea`’ - ‘`r30`’, ‘`ba`’ - ‘`r31`’.

LM32 has the following Control and Status Registers (CSRs).

`IE`

  Interrupt enable.

`IM`

  Interrupt mask.

`IP`

  Interrupt pending.

`ICC`

  Instruction cache control.

`DCC`

  Data cache control.

`CC`

  Cycle counter.

`CFG`

  Configuration.

`EBA`

  Exception base address.

`DC`

  Debug control.

`DEBA`

  Debug exception base address.

`JTX`

  JTAG transmit.

`JRX`

  JTAG receive.

`BP0`

  Breakpoint 0.

`BP1`

  Breakpoint 1.

`BP2`

  Breakpoint 2.

`BP3`

  Breakpoint 3.

`WP0`

  Watchpoint 0.

`WP1`

  Watchpoint 1.

`WP2`

  Watchpoint 2.

`WP3`

  Watchpoint 3.