Unsigned saturating decrement scalar by active predicate element count.
Counts the number of active elements in the source predicate and then uses the result to decrement the scalar destination. The result is saturated to the general-purpose register's unsigned integer range.
It has encodings from 2 classes: 32-bit and 64-bit
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | size | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 0 | 0 | Pg | Rdn |
if !HaveSVE() then UNDEFINED; integer esize = 8 << UInt(size); integer g = UInt(Pg); integer dn = UInt(Rdn); boolean unsigned = TRUE; integer ssize = 32;
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | size | 1 | 0 | 1 | 0 | 1 | 1 | 1 | 0 | 0 | 0 | 1 | 1 | 0 | Pg | Rdn |
if !HaveSVE() then UNDEFINED; integer esize = 8 << UInt(size); integer g = UInt(Pg); integer dn = UInt(Rdn); boolean unsigned = TRUE; integer ssize = 64;
<Wdn> |
Is the 32-bit name of the source and destination general-purpose register, encoded in the "Rdn" field. |
<Xdn> |
Is the 64-bit name of the source and destination general-purpose register, encoded in the "Rdn" field. |
<Pg> |
Is the name of the governing scalable predicate register, encoded in the "Pg" field. |
<T> |
Is the size specifier,
encoded in
size:
|
CheckSVEEnabled(); integer elements = VL DIV esize; bits(PL) mask = P[g]; bits(ssize) operand = X[dn]; bits(ssize) result; integer count = 0; for e = 0 to elements-1 if ElemP[mask, e, esize] == '1' then count = count + 1; integer element = Int(operand, unsigned); (result, -) = SatQ(element - count, ssize, unsigned); X[dn] = Extend(result, 64, unsigned);
Release: 00rel5-manual
Copyright © 2010-2018 ARM Limited or its affiliates. All rights reserved. This document is Non-Confidential.