FADD (immediate)

Floating-point add immediate (predicated).

Add an immediate to each active floating-point element of the source vector, and destructively place the results in the corresponding elements of the source vector. The immediate may take the value +0.5 or +1.0 only. Inactive elements in the destination vector register remain unmodified.

313029282726252423222120191817161514131211109876543210
01100101size011000100Pg0000i1Zdn

SVE

FADD <Zdn>.<T>, <Pg>/M, <Zdn>.<T>, <const>

if !HaveSVE() then UNDEFINED; if size == '00' then UNDEFINED; integer esize = 8 << UInt(size); integer g = UInt(Pg); integer dn = UInt(Zdn); bits(esize) imm = if i1 == '0' then FPPointFive('0') else FPOne('0');

Assembler Symbols

<Zdn>

Is the name of the source and destination scalable vector register, encoded in the "Zdn" field.

<T> Is the size specifier, encoded in size:
size <T>
00 RESERVED
01 H
10 S
11 D
<Pg>

Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.

<const> Is the floating-point immediate value, encoded in i1:
i1 <const>
0 #0.5
1 #1.0

Operation

CheckSVEEnabled(); integer elements = VL DIV esize; bits(PL) mask = P[g]; bits(VL) operand1 = Z[dn]; bits(VL) result; for e = 0 to elements-1 bits(esize) element1 = Elem[operand1, e, esize]; if ElemP[mask, e, esize] == '1' then Elem[result, e, esize] = FPAdd(element1, imm, FPCR); else Elem[result, e, esize] = element1; Z[dn] = result;


Release: 00rel5-manual

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