VCLE (register)
Vector Compare Less Than or Equal takes each element in a vector, and compares it with the corresponding element of a second vector. If the first is less than or equal to the second, the corresponding element in the destination vector is set to all ones. Otherwise, it is set to all zeros.
This is a pseudo-instruction of
VCGE (register).
This means:
-
The encodings in this description are named to match the encodings of
VCGE (register).
-
The assembler syntax is used only for assembly, and is not used on disassembly.
-
The description of
VCGE (register)
gives the operational pseudocode for this instruction.
It has encodings from the following instruction sets:
A32 (
A1
and
A2
)
and
T32 (
T1
and
T2
)
.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 1 | 1 | 0 | 0 | 1 | U | 0 | D | size | Vn | Vd | 0 | 0 | 1 | 1 | N | Q | M | 1 | Vm |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | 0 | D | 0 | sz | Vn | Vd | 1 | 1 | 1 | 0 | N | Q | M | 0 | Vm |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 1 | U | 1 | 1 | 1 | 1 | 0 | D | size | Vn | Vd | 0 | 0 | 1 | 1 | N | Q | M | 1 | Vm |
15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 1 | 1 | 1 | 1 | 1 | 1 | 0 | D | 0 | sz | Vn | Vd | 1 | 1 | 1 | 0 | N | Q | M | 0 | Vm |
Assembler Symbols
Operation
The description of
VCGE (register)
gives the operational pseudocode for this instruction.
Internal version only: isa v00_81, pseudocode v34.2.2
; Build timestamp: 2018-03-28T20:43
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