In an EL1 mode other than System mode, Load Multiple (User registers) loads multiple User mode registers from consecutive memory locations using an address from a base register. The registers loaded cannot include the PC. The PE reads the base register value normally, using the current mode to determine the correct Banked version of the register. This instruction cannot writeback to the base register.
Load Multiple (User registers) is undefined in Hyp mode, and unpredictable in User and System modes.
ARMv8.2 permits the deprecation of some Load Multiple ordering behaviors in AArch32 state, for more information see ARMv8.2-LSMAOC.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
!= 1111 | 1 | 0 | 0 | P | U | 1 | (0) | 1 | Rn | 0 | register_list | ||||||||||||||||||||
cond |
LDM{<amode>}{<c>}{<q>} <Rn>, <registers_without_pc>^
n = UInt(Rn); registers = register_list; increment = (U == '1'); wordhigher = (P == U); if n == 15 || BitCount(registers) < 1 then UNPREDICTABLE;
If BitCount(registers) < 1, then one of the following behaviors must occur:
For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
<c> |
<q> |
<Rn> |
Is the general-purpose base register, encoded in the "Rn" field. |
Instructions with similar syntax but with the PC included in <registers_without_pc> are described in LDM (exception return).
if ConditionPassed() then EncodingSpecificOperations(); if PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.M IN {M32_User,M32_System} then UNPREDICTABLE; else length = 4*BitCount(registers); address = if increment then R[n] else R[n]-length; if wordhigher then address = address+4; for i = 0 to 14 if registers<i> == '1' then // Load User mode register Rmode[i, M32_User] = MemA[address,4]; address = address + 4;
If PSTATE.M IN {M32_User,M32_System}, then one of the following behaviors must occur:
Internal version only: isa v00_81, pseudocode v34.2.2 ; Build timestamp: 2018-03-28T20:43
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