While incrementing unsigned scalar lower or same as scalar.
Generate a predicate that is true while the first, unsigned scalar operand is lower or same as the second scalar operand and false thereafter.
If the second scalar operand is equal to the maximum unsigned integer value then a condition which includes an equality test can never fail and the result will be an all-true predicate.
The full width of the scalar operands is significant for the purposes of comparison, and the full width first operand is incremented by one for each destination predicate element, irrespective of the predicate result element size. The first general-purpose source register is not itself updated.
The predicate result is placed in the predicate destination register. Sets the First (N), None (Z), !Last (C) condition flags based on the predicate result, and the V flag to zero.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 | size | 1 | Rm | 0 | 0 | 0 | sf | 1 | 1 | Rn | 1 | Pd |
integer esize = 8 << UInt(size); integer rsize = 32 << UInt(sf); integer n = UInt(Rn); integer m = UInt(Rm); integer d = UInt(Pd); boolean unsigned = TRUE; SVECmp op = Cmp_LE;
<Pd> |
Is the name of the destination scalable predicate register, encoded in the "Pd" field. |
<T> |
Is the size specifier,
encoded in
size:
|
<R> |
Is a width specifier,
encoded in
sf:
|
<n> |
Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rn" field. |
<m> |
Is the number [0-30] of the source general-purpose register or the name ZR (31), encoded in the "Rm" field. |
CheckSVEEnabled(); integer elements = VL DIV esize; bits(PL) mask = Ones(PL); bits(rsize) operand1 = X[n]; bits(rsize) operand2 = X[m]; bits(PL) result; boolean last = TRUE; for e = 0 to elements-1 boolean cond; case op of when Cmp_LT cond = (Int(operand1, unsigned) < Int(operand2, unsigned)); when Cmp_LE cond = (Int(operand1, unsigned) <= Int(operand2, unsigned)); last = last && cond; ElemP[result, e, esize] = if last then '1' else '0'; operand1 = operand1 + 1; PSTATE.<N,Z,C,V> = PredTest(mask, result, esize); P[d] = result;
Release: 00rel4.1-manual
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