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The ERRPIDR1 characteristics are:
Provides discovery information about the component.
For more information, see 'About the Peripheral identification scheme'.in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.
Implementation of this register is OPTIONAL.
This register is present only
when RAS is implemented.
Otherwise, direct accesses to ERRPIDR1 are RES0.
ERRPIDR1 is a 32-bit register.
The ERRPIDR1 bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | DES_0 | PART_1 |
Reserved, RES0.
IMPLEMENTATION DEFINED.
Designer, JEP106 identification code, bits [3:0]. This field and ERRPIDR2.DES_1 together form the JEDEC-assigned JEP106 identification code for the designer of the component.
Designer,The JEP106code identificationidentifies codethe designer of the component, bitswhich [3:0].might ERRPIDR1.DES_0not andbe not the same as the implementer of the device containing the component. ERRPIDR2.DES_1 together form the JEDEC-assigned JEP106 identification code for the designer of the component. The parity bit in the JEP106 identification code is not included. The code identifies the designer of the component, which might not be not the same as the implementer of the device containing the component. To obtain a number, or to see the assignment of these codes, contact JEDEC http://www.jedec.org.
For a component designed by Arm Limited, the JEP106 identification code is 0x3B.
This field reads as an IMPLEMENTATION DEFINED value.
IMPLEMENTATION DEFINED.Part number, bits [11:8]
PartThe part number is selected by the designer of the component. The designer chooses whether to use a 12-bit or a 16-bit part number, bits [11and:8].
The part number is selected by the designer of the component. The designer chooses whether to use a 12-bit or a 16-bit part number:
If a 12-bit part number is used, it is stored in this field and ERRPIDR0.PART_0.
If a 16-bit part number is used, it is stored in ERRPIDR2.PART_2, this field, and ERRPIDR0.PART_0.
This field reads as an IMPLEMENTATION DEFINED value.
Component | Offset |
---|---|
RAS | 0xFE4 |
Accesses on this interface are RO.
1327/1209/2019 1518:1348; 391b5248b29fb2f001ef74792eaacbd6fc72f2116134483bd14dc8c12a99c984cbfe3431cc1c9707
Copyright © 2010-2019 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.
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