The PMAUTHSTATUS characteristics are:
Provides information about the state of the IMPLEMENTATION DEFINED authentication interface for Performance Monitors.
It is IMPLEMENTATION DEFINED whether PMAUTHSTATUS is implemented in the Core power domain or in the Debug power domain.
If ARMv8.3-DoPD is implemented, this register is in the Core power domain. If ARMv8.3-DoPD is not implemented, this register is in the Debug power domain.
This register is OPTIONAL, and is required for CoreSight compliance. Arm recommends that this register is implemented.
PMAUTHSTATUS is a 32-bit register.
The PMAUTHSTATUS bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | SNID | SID | NSNID | NSID |
Reserved, RES0.
Holds the same value as DBGAUTHSTATUS_EL1.SNID.
Secure invasive debug. Possible values of this field are:
SID | Meaning |
---|---|
0b00 |
Not implemented. |
All other values are reserved.
Holds the same value as DBGAUTHSTATUS_EL1.NSNID.
Non-secure invasive debug. Possible values of this field are:
NSID | Meaning |
---|---|
0b00 |
Not implemented. |
All other values are reserved.
Component | Offset | Instance |
---|---|---|
PMU | 0xFB8 | PMAUTHSTATUS |
This interface is accessible as follows:
27/09/2019 18:48; 6134483bd14dc8c12a99c984cbfe3431cc1c9707
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