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The CNTV_CVAL characteristics are:
Holds the compare value for the virtual timer.
AArch32 System register CNTV_CVAL bits [63:0] are architecturally mapped to AArch64 System register CNTV_CVAL_EL0[63:0] .
ThisRW registerfields isin presentthis only
whenregister AArch32reset is supported at any Exception level.
Otherwise, direct accesses to CNTV_CVAL arearchitecturally UNKNOWN.values.
CNTV_CVAL is a 64-bit register.
The CNTV_CVAL bit assignments are:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
CompareValue | |||||||||||||||||||||||||||||||
CompareValue | |||||||||||||||||||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Holds the EL1 virtual timer CompareValue.
When CNTV_CTL.ENABLE is 1, the timer condition is met when (CNTVCT - CompareValue) is greater than or equal to zero. This means that CompareValue acts like a 64-bit upcounter timer. When the timer condition is met:
When CNTV_CTL.ENABLE is 0, the timer condition is not met, but CNTVCT continues to count.
If the Generic counter is implemented at a size less than 64 bits, then this field is permitted to be implemented at the same width as the counter, and the upper bits are RES0.
The value of this field is treated as zero-extended in all counter calculations.
This field resets to an architecturally UNKNOWN value.
Accesses to this register use the following encodings:
coproc | CRm | opc1 |
---|---|---|
0b1111 | 0b1110 | 0b0011 |
if PSTATE.EL == EL0 then
if !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CNTKCTL_EL1.EL0VTEN == '0' then
if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x04);
else
AArch64.AArch32SystemAccessTrap(EL1, 0x04);
elsif ELUsingAArch32(EL1) && CNTKCTL.PL0VTEN == '0' then
if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x04);
elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TGE == '1' then
AArch32.TakeHypTrapException(0x00);
else
UNDEFINED;
elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && CNTHCTL_EL2.EL0VTEN == '0' then
AArch64.AArch32SystemAccessTrap(EL2, 0x04);
elsif !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> !=== '11'') && CNTHCTL_EL2.EL1TVT == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x04);
elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '0' && IsFeatureImplemented("ARMv8.4-SecEL2") then
return CNTHVS_CVAL_EL2;
elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '1' then
return CNTHV_CVAL_EL2;
else
return CNTV_CVAL;
elsif PSTATE.EL == EL1 then
if !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> !=== '11'') && CNTHCTL_EL2.EL1TVT == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x04);
else
return CNTV_CVAL;
elsif PSTATE.EL == EL2 then
return CNTV_CVAL;
elsif PSTATE.EL == EL3 then
return CNTV_CVAL;
coproc | CRm | opc1 |
---|---|---|
0b1111 | 0b1110 | 0b0011 |
if PSTATE.EL == EL0 then
if !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CNTKCTL_EL1.EL0VTEN == '0' then
if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x04);
else
AArch64.AArch32SystemAccessTrap(EL1, 0x04);
elsif ELUsingAArch32(EL1) && CNTKCTL.PL0VTEN == '0' then
if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x04);
elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TGE == '1' then
AArch32.TakeHypTrapException(0x00);
else
UNDEFINED;
elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && CNTHCTL_EL2.EL0VTEN == '0' then
AArch64.AArch32SystemAccessTrap(EL2, 0x04);
elsif !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> !=== '11'') && CNTHCTL_EL2.EL1TVT == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x04);
elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '0' && IsFeatureImplemented("ARMv8.4-SecEL2") then
CNTHVS_CVAL_EL2 = R[t2]:R[t];
elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '1' then
CNTHV_CVAL_EL2 = R[t2]:R[t];
else
CNTV_CVAL = R[t2]:R[t];
elsif PSTATE.EL == EL1 then
if !ELUsingAArch32(EL1) && !(EL2Enabled() && HCR_EL2.<E2H,TGE> !=== '11'') && CNTHCTL_EL2.EL1TVT == '1' then
AArch64.AArch32SystemAccessTrap(EL2, 0x04);
else
CNTV_CVAL = R[t2]:R[t];
elsif PSTATE.EL == EL2 then
CNTV_CVAL = R[t2]:R[t];
elsif PSTATE.EL == EL3 then
CNTV_CVAL = R[t2]:R[t];
1327/1209/2019 1518:1348; 391b5248b29fb2f001ef74792eaacbd6fc72f2116134483bd14dc8c12a99c984cbfe3431cc1c9707
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