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ERRCIDR3, Component Identification Register 3

The ERRCIDR3 characteristics are:

Purpose

Provides discovery information aboutfor the component.

For more information, see 'About the Peripheral identification scheme'.

Configuration

Implementation of this register is OPTIONAL.

This register is present only when RAS is implemented. Otherwise, direct accesses to ERRCIDR3 are RES0.

Attributes

ERRCIDR3 is a 32-bit register.

Field descriptions

The ERRCIDR3 bit assignments are:

313029282726252423222120191817161514131211109876543210
RES0PRMBL_3

Bits [31:8]

Reserved, RES0.

PRMBL_3, bits [7:0]

Component identification preamble, segment 3.

Component identification preamble, segment 3. This field reads as 0xB1.

This field reads as 0xB1.

Accessing the ERRCIDR3

ERRCIDR3 can be accessed through the memory-mapped interfaces:

ComponentOffset
RAS0xFFC
ComponentOffsetInstance
RAS0xFFCERRCIDR3

Accesses on this interface are RO.




1327/1209/2019 1518:1348; 391b5248b29fb2f001ef74792eaacbd6fc72f2116134483bd14dc8c12a99c984cbfe3431cc1c9707

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