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ERRPIDR1, Peripheral Identification Register 1

The ERRPIDR1 characteristics are:

Purpose

Provides discovery information about the component.

For more information, see 'About the Peripheral identification scheme'.in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.

Configuration

Implementation of this register is OPTIONAL.

This register is present only when RAS is implemented. Otherwise, direct accesses to ERRPIDR1 are RES0.

Attributes

ERRPIDR1 is a 32-bit register.

Field descriptions

The ERRPIDR1 bit assignments are:

313029282726252423222120191817161514131211109876543210
RES0DES_0PART_1

Bits [31:8]

Reserved, RES0.

DES_0, bits [7:4]

IMPLEMENTATION DEFINED.

Designer, JEP106 identification code, bits [3:0]. This field and ERRPIDR2.DES_1 together form the JEDEC-assigned JEP106 identification code for the designer of the component.

Designer,The JEP106code identificationidentifies codethe designer of the component, bitswhich [3:0].might ERRPIDR1.DES_0not andbe not the same as the implementer of the device containing the component. ERRPIDR2.DES_1 together form the JEDEC-assigned JEP106 identification code for the designer of the component. The parity bit in the JEP106 identification code is not included. The code identifies the designer of the component, which might not be not the same as the implementer of the device containing the component. To obtain a number, or to see the assignment of these codes, contact JEDEC http://www.jedec.org.

Note

For a component designed by Arm Limited, the JEP106 identification code is 0x3B.

This field reads as an IMPLEMENTATION DEFINED value.

PART_1, bits [3:0]

IMPLEMENTATION DEFINED.Part number, bits [11:8]

PartThe part number is selected by the designer of the component. The designer chooses whether to use a 12-bit or a 16-bit part number, bits [11and:8].

The part number is selected by the designer of the component. The designer chooses whether to use a 12-bit or a 16-bit part number:

This field reads as an IMPLEMENTATION DEFINED value.

Accessing the ERRPIDR1

ERRPIDR1 can be accessed through the memory-mapped interfaces:

ComponentOffset
RAS0xFE4
ComponentOffsetInstance
RAS0xFE4ERRPIDR1

Accesses on this interface are RO.




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