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The CNTP_CVAL characteristics are:
Holds the 64-bit compare value for the EL1 physical timer.
The power domain of CNTP_CVAL is IMPLEMENTATION DEFINED.
The power domain of CNTP_CVAL is IMPLEMENTATION DEFINED.
RW fields in this register reset to architecturally UNKNOWN values. These apply only on a reset of the reset domain in which the register is implemented. The register is not affected by a reset of any other reset domain.
For more information see 'Power and reset domains for the system level implementation of the Generic Timer' in the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile.
CNTP_CVAL is a 64-bit register.
The CNTP_CVAL bit assignments are:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
CompareValue | |||||||||||||||||||||||||||||||
CompareValue | |||||||||||||||||||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Holds the EL1 physical timer CompareValue.
When CNTP_CTL.ENABLE is 1, the timer condition is met when (CNTPCT - CompareValue) is greater than or equal to zero. This means that CompareValue acts like a 64-bit upcounter timer. When the timer condition is met:
When CNTP_CTL.ENABLE is 0, the timer condition is not met, but CNTPCT continues to count.
This field resets to an architecturally UNKNOWN value.
CNTP_CVAL can be implemented in any implemented CNTBaseN frame, and in the corresponding CNTEL0BaseN frame.
'CNTCTLBase status and control fields for the CNTBaseN and CNTEL0BaseN frames' in Chapter I1 of the Arm® Architecture Reference Manual, Armv8, for Armv8-A architecture profile describes the status fields that identify whether a CNTBaseN frame is implemented, and for an implemented frame:
For an implemented CNTBaseN frame:
For an implemented CNTEL0BaseN frame:
If the implementation supports 64-bit atomic accesses, then the CNTP_CVAL register must be accessible as an atomic 64-bit value.
Component | Frame | Offset | Instance | Range |
---|---|---|---|---|
Timer | CNTBaseN | 0x020 | CNTP_CVAL | 31:0 |
Accesses on this interface are RW.
Component | Frame | Offset | Instance | Range |
---|---|---|---|---|
Timer | CNTBaseN | 0x024 | CNTP_CVAL | 63:32 |
Accesses on this interface are RW.
Component | Frame | Offset | Instance | Range |
---|---|---|---|---|
Timer | CNTEL0BaseN | 0x020 | CNTP_CVAL | 31:0 |
Accesses on this interface are RW.
Component | Frame | Offset | Instance | Range |
---|---|---|---|---|
Timer | CNTEL0BaseN | 0x024 | CNTP_CVAL | 63:32 |
Accesses on this interface are RW.
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