CTICHINSTATUS, CTI Channel In Status register

The CTICHINSTATUS characteristics are:

Purpose

Provides the raw status of the ECT channel inputs to the CTI.

Configuration

CTICHINSTATUS is in the Debug power domain.

Attributes

CTICHINSTATUS is a 32-bit register.

Field descriptions

The CTICHINSTATUS bit assignments are:

313029282726252423222120191817161514131211109876543210
CHIN<n>, bit [n]

CHIN<n>, bit [n], for n = 0 to 31

Input channel <n> status.

Bits [31:N] are RAZ. N is the number of ECT channels implemented as defined by the CTIDEVID.NUMCHAN field.

Possible values of this bit are:

CHIN<n>Meaning
0b0

Input channel <n> is inactive.

0b1

Input channel <n> is active.

If the ECT channels do not support multicycle events then it is IMPLEMENTATION DEFINED whether an input channel can be observed as active.

Accessing the CTICHINSTATUS

CTICHINSTATUS can be accessed through the external debug interface:

ComponentOffsetInstance
CTI0x138CTICHINSTATUS

Accesses on this interface are RO.




27/09/2019 18:48; 6134483bd14dc8c12a99c984cbfe3431cc1c9707

Copyright © 2010-2019 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.