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DBGDTRTXint, Debug Data Transfer Register, Transmit

The DBGDTRTXint characteristics are:

Purpose

Transfers data from the PE to an external debugger. For example, it is used by a debug target to transfer data to the debugger. See DBGDTR_EL0 for additional architectural mappings. It is a component of the Debug Communication Channel.

Configuration

AArch32 System register DBGDTRTXint bits [31:0] are architecturally mapped to AArch64 System register DBGDTRTX_EL0[31:0] .

AArch32 System register DBGDTRTXint bits [31:0] are architecturally mapped to External register DBGDTRTX_EL0[31:0] .

ThisRW registerfields isin presentthis only whenregister AArch32reset is supported at any Exception level. Otherwise, direct accesses to DBGDTRTXint arearchitecturally UNKNOWN.values.

Attributes

DBGDTRTXint is a 32-bit register.

Field descriptions

The DBGDTRTXint bit assignments are:

313029282726252423222120191817161514131211109876543210
Return DTRTX

Bits [31:0]

Return DTRTX.

Writes to this register:

After the write, TXfull is set to 1.

For the full behavior of the Debug Communications Channel, see The Debug Communication Channel and Instruction Transfer Register.

On a Cold reset, this field resets to an architecturally UNKNOWN value.

Accessing the DBGDTRTXint

Data can be loaded from memory into this register using LDC (immediate) and LDC (literal).

Accesses to this register use the following encodings:

MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}

coprocopc1CRnCRmopc2
0b11100b0000b00000b01010b000

if Halted() then DBGDTRTXint = R[t]; elsif PSTATE.EL == EL0 then if !Halted() && !ELUsingAArch32(EL1) && MDSCR_EL1.TDCC == '1' then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); else AArch64.AArch32SystemAccessTrap(EL1, 0x05); elsif !Halted() && ELUsingAArch32(EL1) && DBGDSCRext.UDCCdis == '1' then if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TGE == '1' then AArch32.TakeHypTrapException(0x00); else UNDEFINED; elsif !Halted() && EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif !Halted() && EL2Enabled() && ELUsingAArch32(EL2) && HDCR.TDCC == '1' then AArch32.TakeHypTrapException(0x05); elsif !Halted() && EL2Enabled() && !ELUsingAArch32(EL2) && (HCR_EL2.TGE == '1' || MDCR_EL2.<TDE,TDA> != '00') then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif !Halted() && EL2Enabled() && !ELUsingAArch32(EL2) && (HCR.TGE == '1' || HDCR.<TDE,TDA> != '00') then AArch32.TakeHypTrapException(0x05); elsif !Halted() && HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); elsif !Halted() && HaveEL(EL3) && !ELUsingAArch32(EL3) && SDCR.TDCCMDCR_EL3.TDA == '1' then AArch32.TakeMonitorTrapException();AArch64.AArch32SystemAccessTrap(EL3, 0x05); elsif !Halted() && HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDASDCR.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05);AArch32.TakeMonitorTrapException(); else DBGDTRTXint = R[t]; elsif PSTATE.EL == EL1 then if !Halted() && EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif !Halted() && EL2Enabled() && ELUsingAArch32(EL2) && HDCR.TDCC == '1' then AArch32.TakeHypTrapException(0x05); elsif !Halted() && EL2Enabled() && !ELUsingAArch32(EL2) && MDCR_EL2.<TDE,TDA> != '00' then AArch64.AArch32SystemAccessTrap(EL2, 0x05); elsif !Halted() && EL2Enabled() && ELUsingAArch32(EL2) && HDCR.<TDE,TDA> != '00' then AArch32.TakeHypTrapException(0x05); elsif !Halted() && HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); elsif !Halted() && HaveEL(EL3) && ELUsingAArch32(EL3) && SDCR.TDCC == '1' then AArch32.TakeMonitorTrapException(); elsif !Halted() && HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); else DBGDTRTXint = R[t]; elsif PSTATE.EL == EL2 then if !Halted() && HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDCC == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); elsif !Halted() && HaveEL(EL3) && ELUsingAArch32(EL3) && SDCR.TDCC == '1' then AArch32.TakeMonitorTrapException(); elsif !Halted() && HaveEL(EL3) && !ELUsingAArch32(EL3) && MDCR_EL3.TDA == '1' then AArch64.AArch32SystemAccessTrap(EL3, 0x05); else DBGDTRTXint = R[t]; elsif PSTATE.EL == EL3 then if PSTATE.M!Halted() !=&& M32_MonitorHaveEL(EL3) && ELUsingAArch32(EL3) && SDCR.TDCC == '1' then AArch32.TakeMonitorTrapException(); else DBGDTRTXint = R[t];




1327/1209/2019 1518:1348; 391b5248b29fb2f001ef74792eaacbd6fc72f2116134483bd14dc8c12a99c984cbfe3431cc1c9707

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