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ERRGSR, Error Group Status Register

The ERRGSR characteristics are:

Purpose

ShowsERRGSR shows the status for the records in the group.

Configuration

This register is present only when RAS is implemented. Otherwise, direct accesses to ERRGSR are UNDEFINED.

This manual describes the memory-mapped view of a group with up to 56 records, the most that can be contained in a 4KB component. Extra records might be added by increasing the page size and extending ERRGSR into multiple registers.

This manual describes a group of error records accessed via a standard 4KB memory-mapped peripheral. For a 4KB peripheral, up to 24 error records can be accessed if the Common Fault Injection Model is implemented, and up to 56 otherwise.

Attributes

ERRGSR is a 64-bit register.

Field descriptions

The ERRGSR bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
RES0S<m>, bit [m]
S<m>, bit [m]
313029282726252423222120191817161514131211109876543210
6362616059585756555453525150494847464544434241403938373635343332
RES0S55S54S53S52S51S50S49S48S47S46S45S44S43S42S41S40S39S38S37S36S35S34S33S32
S31S30S29S28S27S26S25S24S23S22S21S20S19S18S17S16S15S14S13S12S11S10S9S8S7S6S5S4S3S2S1S0
313029282726252423222120191817161514131211109876543210

Bits [63:56]

Reserved, RES0.

S<m>, bit [m], for m = 0 to 55

The status for Error Record <m>. A read-only copy of ERR<m>STATUS.V.

S<m>Meaning
0b0

No error.

0b1

One or more errors.

If the Commoncorresponding Faultrecord Injectionis Modelnot is implemented, up-toor 24the recordscorresponding canrecord bedoes implementednot meaningsupport bitsthis [55:24]type areof reporting, this bit is RES0.

This bit is RES0 if any of the following are true:

Accessing the ERRGSR

ERRGSR can be accessed through the memory-mapped interfaces:

ComponentOffset
RAS0xE00
ComponentOffsetInstance
RAS0xE00ERRGSR

Accesses on this interface are RO.




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