The MPAMF_SIDR characteristics are:
The MPAMF_SIDR is a 32-bit read-only register that indicates the maximum Secure PARTID and Secure PMG on this MSC.
The power domain of MPAMF_SIDR is IMPLEMENTATION DEFINED.
MPAMF_SIDR is a 32-bit register.
The MPAMF_SIDR bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | S_PMG_MAX | S_PARTID_MAX |
Reserved, RES0.
Maximum value of Secure PMG supported by this component.
Maximum value of Secure PARTID supported by this component.
This register is within the MPAM feature page memory frames. In a system that supports Secure and Non-secure memory maps, there must be both Secure and Non-secure MPAM feature pages.
MPAMF_SIDR is read-only.
MPAMF_SIDR must only be readable from the Secure MPAM feature page. If the system or the MSC does not support the Secure address map, this register must not be accessible.
Component | Frame | Offset | Instance |
---|---|---|---|
MPAM | MPAMF_BASE_s | 0x0008 | MPAMF_SIDR_s |
Accesses on this interface are RO.
13/12/2019 15:13; 391b5248b29fb2f001ef74792eaacbd6fc72f211
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