The EDDEVID1 characteristics are:
Provides extra information for external debuggers about features of the debug implementation.
If FEAT_DoPD is implemented, this register is in the Core power domain.
If FEAT_DoPD is not implemented, this register is in the Debug power domain.
EDDEVID1 is a 32-bit register.
The EDDEVID1 bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | PCSROffset |
Reserved, RES0.
This field indicates the offset applied to PC samples returned by reads of EDPCSR. Permitted values of this field in Armv8 are:
PCSROffset | Meaning |
---|---|
0b0000 |
EDPCSR not implemented. |
0b0010 |
EDPCSR implemented, and samples have no offset applied and do not sample the instruction set state in AArch32 state. |
When FEAT_PCSRv8p2 is implemented, the only permitted value is 0b0000.
FEAT_PCSRv8p2 implements the PC Sample-based Profiling Extension in the Performance Monitors register space, as indicated by the value of PMDEVID.PCSample.
Component | Offset | Instance |
---|---|---|
Debug | 0xFC4 | EDDEVID1 |
This interface is accessible as follows:
01/07/2020 15:57; 80324f0b9997bede489cc15ad1565345720bcd2a
Copyright © 2010-2020 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.