The TLBI ALLE3IS, TLBI ALLE3ISNXS characteristics are:
If EL3 is implemented, invalidates cached copies of translation table entries from TLBs that meet all the following requirements:
The entry is a stage 1 translation table entry, from any level of the translation table walk.
The entry would be required to translate an address using the EL3 translation regime.
The invalidation applies to all PEs in the same Inner Shareable shareability domain as the PE that executes this System instruction.
If FEAT_XS is implemented, the nXS variant of this System instruction is defined.
Both variants perform the same invalidation, but the TLBI System instruction without the nXS qualifier waits for all memory accesses using in-scope old translation information to complete before it is considered complete.
The TLBI System instruction with the nXS qualifier is considered complete when the subset of these memory accesses with XS attribute set to 0 are complete.
There are no configuration notes.
TLBI ALLE3IS, TLBI ALLE3ISNXS is a 64-bit System instruction.
This instruction has no applicable fields.
The value in the register specified by <Xt> is ignored.
When executing this instruction Xt should be encoded as 0b11111. If the Xt field is not set to 0b11111, it is CONSTRAINED UNPREDICTABLE whether:
The instruction is UNDEFINED.
The instruction behaves as if the Xt field is set to 0b11111.
Accesses to this instruction use the following encodings:
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b01 | 0b110 | 0b1000 | 0b0011 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then TLBI_ALL(SecurityStateAtEL(EL3), Regime_EL3, Shareability_Inner, TLBI_AllAttr);
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b01 | 0b110 | 0b1001 | 0b0011 | 0b000 |
if !IsFeatureImplemented(FEAT_XS) then UNDEFINED; elsif PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then TLBI_ALL(SecurityStateAtEL(EL3), Regime_EL3, Shareability_Inner, TLBI_ExcludeXS);
30/09/2020 15:07; ccead0cb9f089f9ceec50268e82aec9e71047211
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