DLR, Debug Link Register

The DLR characteristics are:

Purpose

In Debug state, holds the address to restart from.

Configuration

AArch32 System register DLR bits [31:0] are architecturally mapped to AArch64 System register DLR_EL0[31:0] .

This register is present only when AArch32 is supported at any Exception level. Otherwise, direct accesses to DLR are UNDEFINED.

Attributes

DLR is a 32-bit register.

Field descriptions

The DLR bit assignments are:

313029282726252423222120191817161514131211109876543210
Restart address

Bits [31:0]

Restart address.

Accessing the DLR

Accesses to this register use the following encodings:

MRC{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}

coprocopc1CRnCRmopc2
0b11110b0110b01000b01010b001

if !Halted() then UNDEFINED; else return DLR;

MCR{<c>}{<q>} <coproc>, {#}<opc1>, <Rt>, <CRn>, <CRm>{, {#}<opc2>}

coprocopc1CRnCRmopc2
0b11110b0110b01000b01010b001

if !Halted() then UNDEFINED; else DLR = R[t];




30/09/2020 15:07; ccead0cb9f089f9ceec50268e82aec9e71047211

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