The DCISW characteristics are:
Invalidate data or unified cache line by set/way.
AArch32 System instruction DCISW performs the same function as AArch64 System instruction DC ISW.
This instruction is present only when AArch32 is supported at any Exception level. Otherwise, direct accesses to DCISW are UNDEFINED.
DCISW is a 32-bit System instruction.
The DCISW input value bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SetWay | Level | RES0 |
Contains two fields:
Bits[L-1:4] are RES0.
A = Log2(ASSOCIATIVITY), L = Log2(LINELEN), B = (L + S), S = Log2(NSETS).
ASSOCIATIVITY, LINELEN (line length, in bytes), and NSETS (number of sets) have their usual meanings and are the values for the cache level being operated on. The values of A and S are rounded up to the next integer.
Cache level to operate on, minus 1. For example, this field is 0 for operations on L1 cache, or 1 for operations on L2 cache.
Reserved, RES0.
If this instruction is executed with a set, way or level argument that is larger than the value supported by the implementation then the behavior is CONSTRAINED UNPREDICTABLE and one of the following occurs:
Accesses to this instruction use the following encodings:
coproc | opc1 | CRn | CRm | opc2 |
---|---|---|---|---|
0b1111 | 0b000 | 0b0111 | 0b0110 | 0b010 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && !ELUsingAArch32(EL2) && HSTR_EL2.T7 == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HSTR.T7 == '1' then AArch32.TakeHypTrapException(0x03); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TSW == '1' then AArch64.AArch32SystemAccessTrap(EL2, 0x03); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.TSW == '1' then AArch32.TakeHypTrapException(0x03); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.SWIO == '1' then DCCISW(R[t]); elsif EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.<DC,VM> != '00' then DCCISW(R[t]); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.SWIO == '1' then DCCISW(R[t]); elsif EL2Enabled() && ELUsingAArch32(EL2) && HCR.<DC,VM> != '00' then DCCISW(R[t]); else DCISW(R[t]); elsif PSTATE.EL == EL2 then DCISW(R[t]); elsif PSTATE.EL == EL3 then DCISW(R[t]);
30/09/2020 15:06; ccead0cb9f089f9ceec50268e82aec9e71047211
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