The MPAM3_EL3 characteristics are:
Holds information to generate MPAM labels for memory requests when executing at EL3.
AArch64 System register MPAM3_EL3 bit [63] is architecturally mapped to AArch64 System register MPAM2_EL2[63] when EL2 is implemented.
AArch64 System register MPAM3_EL3 bit [63] is architecturally mapped to AArch64 System register MPAM1_EL1[63] .
This register is present only when FEAT_MPAM is implemented. Otherwise, direct accesses to MPAM3_EL3 are UNDEFINED.
MPAM3_EL3 is a 64-bit register.
The MPAM3_EL3 bit assignments are:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
MPAMEN | TRAPLOWER | SDEFLT | FORCE_NS | RES0 | PMG_D | PMG_I | |||||||||||||||||||||||||
PARTID_D | PARTID_I | ||||||||||||||||||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
MPAM Enable. MPAM is enabled when MPAMEN == 1. When disabled, all PARTIDs and PMGs are output as their default value in the corresponding ID space.
Values of this field are:
MPAMEN | Meaning |
---|---|
0b0 |
The default PARTID and default PMG are output in MPAM information when executing at any ELn. |
0b1 |
MPAM information is output based on the MPAMn_ELx register for ELn according the MPAM configuration. |
This field is always read/write in MPAM3_EL3.
This field resets to 0.
Trap direct accesses to any MPAM system registers that are not UNDEFINED from all ELn lower than EL3.
TRAPLOWER | Meaning |
---|---|
0b0 |
Do not force trapping of direct accesses of MPAM system registers to EL3. |
0b1 |
Force all direct accesses of MPAM system registers to trap to EL3. |
On a Cold reset, this field resets to 1.
SDEFLT overrides the PARTID with the default PARTID when executing in the Secure state.
SDEFLT | Meaning |
---|---|
0b0 |
The PARTID is determined normally in the Secure state. |
0b1 |
The PARTID is always PARTID 0 when executing in the Secure state. |
This field resets to an UNKNOWN value.
Reserved, RES0.
FORCE_NS forces MPAM_NS to always be 1 in the Secure state.
FORCE_NS | Meaning |
---|---|
0b0 |
MPAM_NS is 0 when executing in the Secure state. |
0b1 |
MPAM_NS is 1 when executing in the Secure state. |
An implementation is permitted to have this field as RAO if the implementation does not support generating MPAM_NS as 0.
This field resets to an UNKNOWN value.
Reserved, RES0.
Reserved, RES0.
Performance monitoring group for data accesses.
This field resets to an architecturally UNKNOWN value.
Performance monitoring group for instruction accesses.
Partition ID for data accesses, including load and store accesses, made from EL3.
This field resets to an architecturally UNKNOWN value.
Partition ID for instruction accesses made from EL3.
This field resets to an architecturally UNKNOWN value.
None of the fields in this register are permitted to be cached in a TLB.
Accesses to this register use the following encodings:
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b110 | 0b1010 | 0b0101 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then return MPAM3_EL3;
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b110 | 0b1010 | 0b0101 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then MPAM3_EL3 = X[t];
01/07/2020 15:57; 80324f0b9997bede489cc15ad1565345720bcd2a
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