The IC IALLU characteristics are:
Invalidate all instruction caches to Point of Unification.
AArch64 System instruction IC IALLU performs the same function as AArch32 System instruction ICIALLU.
IC IALLU is a 64-bit System instruction.
This instruction has no applicable fields.
The value in the register specified by <Xt> is ignored.
When executing this instruction Xt should be encoded as 0b11111. If the Xt field is not set to 0b11111, it is CONSTRAINED UNPREDICTABLE whether:
The instruction is UNDEFINED.
The instruction behaves as if the Xt field is set to 0b11111.
Accesses to this instruction use the following encodings:
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b01 | 0b000 | 0b0111 | 0b0101 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && HCR_EL2.TPU == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2.TOCU == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HFGITR_EL2.ICIALLU == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && HCR_EL2.FB == '1' then IC_IALLUIS(); else IC_IALLU(); elsif PSTATE.EL == EL2 then IC_IALLU(); elsif PSTATE.EL == EL3 then IC_IALLU();
01/07/2020 15:57; 80324f0b9997bede489cc15ad1565345720bcd2a
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