The EDLAR characteristics are:
Allows or disallows access to the external debug registers through a memory-mapped interface.
The optional Software Lock provides a lock to prevent memory-mapped writes to the debug registers. Use of this lock mechanism reduces the risk of accidental damage to the contents of the debug registers. It does not, and cannot, prevent all accidental or malicious damage.
If FEAT_DoPD is implemented, Software Lock is not implemented by the architecturally-defined debug components of the PE in the Core power domain.
If FEAT_DoPD is not implemented, this register is in the Debug power domain.
Software uses EDLAR to set or clear the lock, and EDLSR to check the current status of the lock.
EDLAR is a 32-bit register.
The EDLAR bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
KEY |
Lock Access control. Writing the key value 0xC5ACCE55 to this field unlocks the lock, enabling write accesses to this component's registers through a memory-mapped interface.
Writing any other value to this register locks the lock, disabling write accesses to this component's registers through a memory mapped interface.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 |
Otherwise
Reserved, RES0.
Component | Offset | Instance |
---|---|---|
Debug | 0xFB0 | EDLAR |
This interface is accessible as follows:
01/07/2020 15:57; 80324f0b9997bede489cc15ad1565345720bcd2a
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