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REV (predicate)

.

Reverse the order of all elements in the source predicate and place in the destination predicate. This instruction is unpredicated.

Reverse all elements in a predicate.

Reverse the order of all elements in the source predicate and place in the destination predicate. This instruction is unpredicated.

313029282726252423222120191817161514131211109876543210
00000101size1101000100000Pn0Pd

REV <Pd>.<T>, <Pn>.<T>

if !HaveSVE() then UNDEFINED; integer esize = 8 << UInt(size); integer n = UInt(Pn); integer d = UInt(Pd);

Assembler Symbols

<Pd>

Is the name of the destination scalable predicate register, encoded in the "Pd" field.

<T> Is the size specifier, encoded in size:
size<T>
00B
01H
10S
11D
<T>

Is the size specifier, encoded in size:

size<T>
00B
01H
10S
11D
<Pn>

Is the name of the source scalable predicate register, encoded in the "Pn" field.

Operation

CheckSVEEnabled(); bits(PL) operand = P[n]; bits(PL) result = Reverse(operand, esize DIV 8); P[d] = result;


Internal version only: isa v32.13v32.12, AdvSIMD v29.05v29.04, pseudocode v2020-12v2020-09_xml, sve v2020-12v2020-09_rc3 ; Build timestamp: 2020-12-16T142020-11-18T17:1723

Copyright © 2010-2020 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.

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