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UMAXV

Unsigned Maximum across Vector. This instruction compares all the vector elements in the source SIMD&FP register, and writes the largest of the values as a scalar to the destination SIMD&FP register. All the values in this instruction are unsigned integer values.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

Unsigned Maximum across Vector. This instruction compares all the vector elements in the source SIMD&FP register, and writes the largest of the values as a scalar to the destination SIMD&FP register. All the values in this instruction are unsigned integer values.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

313029282726252423222120191817161514131211109876543210
0Q101110size110000101010RnRd
Uop

UMAXV <V><d>, <Vn>.<T>

integer d = UInt(Rd); integer n = UInt(Rn); if size:Q == '100' then UNDEFINED; if size == '11' then UNDEFINED; integer esize = 8 << UInt(size); integer datasize = if Q == '1' then 128 else 64; integer elements = datasize DIV esize; boolean unsigned = (U == '1'); boolean min = (op == '1');

Assembler Symbols

<V> Is the destination width specifier, encoded in size:
size<V>
00B
01H
10S
11RESERVED
<V>

Is the destination width specifier, encoded in size:

size<V>
00B
01H
10S
11RESERVED
<d>

Is the number of the SIMD&FP destination register, encoded in the "Rd" field.

<Vn>

Is the name of the SIMD&FP source register, encoded in the "Rn" field.

<T> Is an arrangement specifier, encoded in size:Q:
sizeQ<T>
0008B
00116B
0104H
0118H
100RESERVED
1014S
11xRESERVED
<T>

Is an arrangement specifier, encoded in size:Q:

sizeQ<T>
0008B
00116B
0104H
0118H
100RESERVED
1014S
11xRESERVED

Operation

CheckFPAdvSIMDEnabled64(); bits(datasize) operand = V[n]; integer maxmin; integer element; maxmin = Int(Elem[operand, 0, esize], unsigned); for e = 1 to elements-1 element = Int(Elem[operand, e, esize], unsigned); maxmin = if min then Min(maxmin, element) else Max(maxmin, element); V[d] = maxmin<esize-1:0>;

Operational information

If PSTATE.DIT is 1:


Internal version only: isa v32.13v32.12, AdvSIMD v29.05v29.04, pseudocode v2020-12v2020-09_xml, sve v2020-12v2020-09_rc3 ; Build timestamp: 2020-12-16T142020-11-18T17:1723

Copyright © 2010-2020 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.

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