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REV (vector)

.

Reverse the order of all elements in the source vector and place in the destination vector. This instruction is unpredicated.

Reverse all elements in a vector (unpredicated).

Reverse the order of all elements in the source vector and place in the destination vector. This instruction is unpredicated.

313029282726252423222120191817161514131211109876543210
00000101size111000001110ZnZd

REV <Zd>.<T>, <Zn>.<T>

if !HaveSVE() then UNDEFINED; integer esize = 8 << UInt(size); integer n = UInt(Zn); integer d = UInt(Zd);

Assembler Symbols

<Zd>

Is the name of the destination scalable vector register, encoded in the "Zd" field.

<T> Is the size specifier, encoded in size:
size<T>
00B
01H
10S
11D
<T>

Is the size specifier, encoded in size:

size<T>
00B
01H
10S
11D
<Zn>

Is the name of the source scalable vector register, encoded in the "Zn" field.

Operation

CheckSVEEnabled(); bits(VL) operand = Z[n]; bits(VL) result = Reverse(operand, esize); Z[d] = result;


Internal version only: isa v32.13v32.12, AdvSIMD v29.05v29.04, pseudocode v2020-12v2020-09_xml, sve v2020-12v2020-09_rc3 ; Build timestamp: 2020-12-16T142020-11-18T17:1723

Copyright © 2010-2020 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.

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