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AND (immediate)

.

Bitwise AND an immediate with each 64-bit element of the source vector, and destructively place the results in the corresponding elements of the source vector. The immediate is a 64-bit value consisting of a single run of ones or zeros repeating every 2, 4, 8, 16, 32 or 64 bits. This instruction is unpredicated.

Bitwise AND with immediate (unpredicated).

Bitwise AND an immediate with each 64-bit element of the source vector, and destructively place the results in the corresponding elements of the source vector. The immediate is a 64-bit value consisting of a single run of ones or zeros repeating every 2, 4, 8, 16, 32 or 64 bits. This instruction is unpredicated.

This instruction is used by the pseudo-instruction BIC (immediate).

313029282726252423222120191817161514131211109876543210
00000101100000imm13Zdn

AND <Zdn>.<T>, <Zdn>.<T>, #<const>

if !HaveSVE() then UNDEFINED; integer dn = UInt(Zdn); bits(64) imm; (imm, -) = DecodeBitMasks(imm13<12>, imm13<5:0>, imm13<11:6>, TRUE);

Assembler Symbols

<Zdn>

Is the name of the source and destination scalable vector register, encoded in the "Zdn" field.

<T> Is the size specifier, encoded in imm13<12>:imm13<5:0>:
imm13<12>imm13<5:0><T>
00xxxxxS
010xxxxH
0110xxxB
01110xxB
011110xB
0111110RESERVED
0111111RESERVED
1xxxxxxD
<T>

Is the size specifier, encoded in imm13<12>:imm13<5:0>:

imm13<12>imm13<5:0><T>
00xxxxxS
010xxxxH
0110xxxB
01110xxB
011110xB
0111110RESERVED
0111111RESERVED
1xxxxxxD
<const>

Is a 64, 32, 16 or 8-bit bitmask consisting of replicated 2, 4, 8, 16, 32 or 64 bit fields, each field containing a rotated run of non-zero bits, encoded in the "imm13" field.

Operation

CheckSVEEnabled(); integer elements = VL DIV 64; bits(VL) operand = Z[dn]; bits(VL) result; for e = 0 to elements-1 bits(64) element1 = Elem[operand, e, 64]; Elem[result, e, 64] = element1 AND imm; Z[dn] = result;

Operational information

This instruction might be immediately preceded in program order by a MOVPRFX instruction. The MOVPRFX instruction must conform to all of the following requirements, otherwise the behavior of the MOVPRFX and this instruction is unpredictable:


Internal version only: isa v32.13v32.12, AdvSIMD v29.05v29.04, pseudocode v2020-12v2020-09_xml, sve v2020-12v2020-09_rc3 ; Build timestamp: 2020-12-16T142020-11-18T17:1723

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