(old) | htmldiff from- | (new) |
Dot Product vector form with unsigned and signed integers. This instruction performs the dot product of the four unsigned 8-bit integer values in each 32-bit element of the first source register with the four signed 8-bit integer values in the corresponding 32-bit element of the second source register, accumulating the result into the corresponding 32-bit element of the destination register.
From Armv8.2 to Armv8.5, this is an optional instruction. From Armv8.6 it is mandatory for implementations that include Advanced SIMD to support it. ID_AA64ISAR1_EL1.I8MM indicates whether this instruction is supported.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | Q | 0 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | Rm | 1 | 0 | 0 | 1 | 1 | 1 | Rn | Rd |
if !HaveInt8MatMulExt() then UNDEFINED; integer n = UInt(Rn); integer m = UInt(Rm); integer d = UInt(Rd); integer datasize = if Q == '1' then 128 else 64; integer elements = datasize DIV 32;
<Vd> | Is the name of the SIMD&FP third source and destination register, encoded in the "Rd" field. |
<Ta> | Is an arrangement specifier,
encoded in
|
<Vn> | Is the name of the first SIMD&FP source register, encoded in the "Rn" field. |
<Tb> | Is an arrangement specifier,
encoded in
|
<Vm> | Is the name of the second SIMD&FP source register, encoded in the "Rm" field. |
CheckFPAdvSIMDEnabled64();
bits(datasize) operand1 = V[n];
bits(datasize) operand2 = V[m];
bits(datasize) operand3 = V[d];
bits(datasize) result;
for e = 0 to elements-1
bits(32) res = Elem[operand3, e, 32];
for b = 0 to 3
integer element1 = UInt(Elem[operand1, 4*e+b, 8]);
[operand1, 4 * e + b, 8]);
integer element2 = SInt(Elem[operand2, 4*e+b, 8]);
[operand2, 4 * e + b, 8]);
res = res + element1 * element2;
Elem[result, e, 32] = res;
V[d] = result;
Internal version only: isa v32.21, AdvSIMD v29.05, pseudocode v2021-06_xml, sve v2021-06_rc2b
; Build timestamp: 2021-06-28T172021-06-28T16:0241
Copyright © 2010-2021 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.
(old) | htmldiff from- | (new) |