SSBB

Speculative Store Bypass Barrier is a memory barrier which prevents speculative loads from bypassing earlier stores to the same virtual address under certain conditions.

The semantics of the Speculative Store Bypass Barrier are:

This is an alias of DSB. This means:

313029282726252423222120191817161514131211109876543210
11010101000000110011000010011111
CRmopc

SSBB

is equivalent to

DSB #0

and is always the preferred disassembly.

Operation

The description of DSB gives the operational pseudocode for this instruction.


Internal version only: isa v32.21, AdvSIMD v29.05, pseudocode v2021-06_xml, sve v2021-06_rc2b ; Build timestamp: 2021-06-28T17:02

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