The TRCVISSCTLR characteristics are:
Use this to select, or read, the Single Address Comparators for the ViewInst start/stop function.
External register TRCVISSCTLR bits [31:0] are architecturally mapped to AArch64 System register TRCVISSCTLR[31:0].
This register is present only when FEAT_ETE is implemented and TRCIDR4.NUMACPAIRS > 0b0000. Otherwise, direct accesses to TRCVISSCTLR are RES0.
TRCVISSCTLR is a 32-bit register.
Selects whether Single Address Comparator <m> is used with the ViewInst start/stop function, for the purpose of stopping trace.
STOP[<m>] | Meaning |
---|---|
0b0 |
The Single Address Comparator <m>, is not selected as a stop resource. |
0b1 |
The Single Address Comparator <m>, is selected as a stop resource. |
This bit is RES0 if m >= 2 × TRCIDR4.NUMACPAIRS.
The reset behaviour of this field is:
Selects whether Single Address Comparator <m> is used with the ViewInst start/stop function, for the purpose of starting trace.
START[<m>] | Meaning |
---|---|
0b0 |
The Single Address Comparator <m>, is not selected as a start resource. |
0b1 |
The Single Address Comparator <m>, is selected as a start resource. |
This bit is RES0 if m >= 2 × TRCIDR4.NUMACPAIRS.
The reset behaviour of this field is:
Must be programmed if TRCIDR4.NUMACPAIRS > 0b0000.
For any 2 comparators selected for the ViewInst start/stop function, the comparator containing the lower address must be a lower numbered comparator.
Writes are CONSTRAINED UNPREDICTABLE if the trace unit is not in the Idle state.
Component | Offset | Instance |
---|---|---|
ETE | 0x088 | TRCVISSCTLR |
This interface is accessible as follows:
30/06/2021 15:22; 2a17f7750cfd1ab239f20f6cf29877ba8041794f
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