CTIPIDR1, CTI Peripheral Identification Register 1

The CTIPIDR1 characteristics are:

Purpose

Provides information to identify a CTI component.

For more information, see 'About the Peripheral identification scheme'.

Configuration

CTIPIDR1 is in the Debug power domain.

Implementation of this register is OPTIONAL.

This register is required for CoreSight compliance.

Attributes

CTIPIDR1 is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0DES_0PART_1

Bits [31:8]

Reserved, RES0.

DES_0, bits [7:4]

Designer, least significant nibble of JEP106 ID code. For Arm Limited, this field is 0b1011.

PART_1, bits [3:0]

Part number, most significant nibble.

Accessing CTIPIDR1

CTIPIDR1 can be accessed through the external debug interface:

ComponentOffsetInstance
CTI0xFE4CTIPIDR1

Accesses on this interface are RO.


30/06/2021 09:39; 4f5dd962f4e34e1ac282f76da4d6e7fc4cab087e

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