CNTFRQ_EL0, Counter-timer Frequency register

The CNTFRQ_EL0 characteristics are:

Purpose

This register is provided so that software can discover the frequency of the system counter. It must be programmed with this value as part of system initialization. The value of the register is not interpreted by hardware.

Configuration

AArch64 System register CNTFRQ_EL0 bits [31:0] are architecturally mapped to AArch32 System register CNTFRQ[31:0].

Attributes

CNTFRQ_EL0 is a 64-bit register.

Field descriptions

6362616059585756555453525150494847464544434241403938373635343332
313029282726252423222120191817161514131211109876543210
RES0
Clock frequency

Bits [63:32]

Reserved, RES0.

Bits [31:0]

Clock frequency. Indicates the system counter clock frequency, in Hz.

The reset behaviour of this field is:

Accessing CNTFRQ_EL0

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, CNTFRQ_EL0

op0op1CRnCRmop2
0b110b0110b11100b00000b000

if PSTATE.EL == EL0 then if !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CNTKCTL_EL1.<EL0PCTEN,EL0VCTEN> == '00' then if EL2Enabled() && HCR_EL2.TGE == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else AArch64.SystemAccessTrap(EL1, 0x18); elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && CNTHCTL_EL2.<EL0PCTEN,EL0VCTEN> == '00' then AArch64.SystemAccessTrap(EL2, 0x18); else return CNTFRQ_EL0; elsif PSTATE.EL == EL1 then return CNTFRQ_EL0; elsif PSTATE.EL == EL2 then return CNTFRQ_EL0; elsif PSTATE.EL == EL3 then return CNTFRQ_EL0;

MSR CNTFRQ_EL0, <Xt>

op0op1CRnCRmop2
0b110b0110b11100b00000b000

if IsHighestEL(PSTATE.EL) then CNTFRQ_EL0 = X[t]; else UNDEFINED;


30/06/2021 09:39; 4f5dd962f4e34e1ac282f76da4d6e7fc4cab087e

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