TRCOSLSR, Trace OS Lock Status Register

The TRCOSLSR characteristics are:

Purpose

Returns the status of the Trace OS Lock.

Configuration

External register TRCOSLSR bits [31:0] are architecturally mapped to AArch64 System register TRCOSLSR[31:0].

This register is present only when FEAT_ETE is implemented. Otherwise, direct accesses to TRCOSLSR are RES0.

Attributes

TRCOSLSR is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0OSLM[2:1]RES0OSLKOSLM[0]

Bits [31:5]

Reserved, RES0.

OSLM, bits [4:3, 0]

OS Lock model.

OSLMMeaning
0b000

Trace OS Lock is not implemented.

0b010

Trace OS Lock is implemented.

0b100

Trace OS Lock is not implemented, and the trace unit is controlled by the PE OS Lock.

All other values are reserved.

This field reads as 0b100.

The OSLM field is split as follows:

Bit [2]

Reserved, RES0.

OSLK, bit [1]

OS Lock status.

OSLKMeaning
0b0

The OS Lock is unlocked.

0b1

The OS Lock is locked.

Note that this field indicates the state of the PE OS Lock.

Accessing TRCOSLSR

External debugger accesses to this register are unaffected by the OS Lock.

TRCOSLSR can be accessed through the external debug interface:

ComponentOffsetInstance
ETE0x304TRCOSLSR

This interface is accessible as follows:


30/06/2021 09:39; 4f5dd962f4e34e1ac282f76da4d6e7fc4cab087e

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