The EDDEVAFF0 characteristics are:
Copy of the low half of the PE MPIDR_EL1 register that allows a debugger to determine which PE in a multiprocessor system the external debug component relates to.
If FEAT_DoPD is implemented, this register is in the Core power domain. If FEAT_DoPD is not implemented, this register is in the Debug power domain.
EDDEVAFF0 is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
MPIDR_EL1lo |
MPIDR_EL1 low half. Read-only copy of the low half of MPIDR_EL1, as seen from the highest implemented Exception level.
Component | Offset | Instance |
---|---|---|
Debug | 0xFA8 | EDDEVAFF0 |
This interface is accessible as follows:
30/06/2021 09:39; 4f5dd962f4e34e1ac282f76da4d6e7fc4cab087e
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