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The EDDEVTYPE characteristics are:
Indicates to a debugger that this component is part of a PEs debug logic.
Implementation of this register is OPTIONAL.
If FEAT_DoPD is implemented, this register is in the Core power domain. If FEAT_DoPD is not implemented, this register is in the Debug power domain.
EDDEVTYPE is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | SUB | MAJOR |
Reserved, RES0.
Subtype. Indicates this is a component within a PE.
Subtype. Must read as 0x1 to indicate this is a component within a PE.
Reads as 0b0001.
Access to this field is RO.
Major type. Indicates this is a debug logic component.
Major type. Must read as 0x5 to indicate this is a debug logic component.
Reads as 0b0101.
Access to this field is RO.
Component | Offset | Instance |
---|---|---|
Debug | 0xFCC | EDDEVTYPE |
This interface is accessible as follows:
30/06/2021 1509:2239; 2a17f7750cfd1ab239f20f6cf29877ba8041794f4f5dd962f4e34e1ac282f76da4d6e7fc4cab087e
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