AMPIDR0, Activity Monitors Peripheral Identification Register 0

The AMPIDR0 characteristics are:

Purpose

Provides information to identify an activity monitors component.

For more information, see 'About the Peripheral identification scheme'.

Configuration

The power domain of AMPIDR0 is IMPLEMENTATION DEFINED.

Implementation of this register is OPTIONAL.

This register is present only when FEAT_AMUv1 is implemented.

Attributes

AMPIDR0 is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0PART_0

Bits [31:8]

Reserved, RES0.

PART_0, bits [7:0]

Part number, least significant byte.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Accessing AMPIDR0

AMPIDR0 can be accessed through the memory-mapped interfaces:

ComponentOffsetInstance
AMU0xFE0AMPIDR0

Accesses on this interface are RO.


30/09/2021 15:34; 092b4e1bbfbb45a293b198f9330c5f529ead2b0f

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