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The LORSA_EL1 characteristics are:
Indicates whether the current LORegion descriptor selected by LORC_EL1.DS is enabled, and holds the physical address of the start of the LORegion.
This register is present only when FEAT_LOR is implemented. Otherwise, direct accesses to LORSA_EL1 are UNDEFINED.
This register is RES0 if any of the following apply:
LORSA_EL1 is a 64-bit register.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | SA | ||||||||||||||||||||||||||||||
SA | RES0 | Valid |
Any of the fields in this register are permitted to be cached in a TLB.
Reserved, RES0.
35 | 34 | 33 | 32 | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
SA |
When 52-bit addresses are not in use, SA[35:32] is RES0.
Bits [51:16] of theThe start physical address of the LORegion described in the current LORegion descriptor selected by LORC_EL1.DS.
Bits[15:0] of this address are defined to be 0x0000.
ForWhen implementations52-bit withaddresses fewerare thanin 52use, physicalSA[35:32] addressforms bits, the corresponding upper bitspart of thisthe fieldaddress arevalue. RES0.
The reset behavior of this field is:
35 | 34 | 33 | 32 | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | SA |
Reserved, RES0.
Bits [47:16] of theThe start physical address of the LORegion described in the current LORegion descriptor selected by LORC_EL1.DS.
Bits[15:0] of this address are defined to be 0x0000.
For implementations with fewer than 48 physical address bits, the corresponding upper bits of this field are RES0.
The reset behavior of this field is:
Reserved, RES0.
Indicates whether the current LORegion descriptor is enabled.
Valid | Meaning |
---|---|
0b0 | LORegion descriptor is disabled. |
0b1 | LORegion descriptor is enabled. |
The reset behavior of this field is:
Accesses to this register use the following encodings in the System register encoding space:
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b000 | 0b1010 | 0b0100 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && SCR_EL3.TLOR == '1' then UNDEFINED; elsif SCR_EL3.NS == '0' then UNDEFINED; elsif EL2Enabled() && HCR_EL2.TLOR == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HFGRTR_EL2.LORSA_EL1 == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3.TLOR == '1' then if Halted() && EDSCR.SDD == '1' then UNDEFINED; else AArch64.SystemAccessTrap(EL3, 0x18); else return LORSA_EL1; elsif PSTATE.EL == EL2 then if SCR_EL3.NS == '0' then UNDEFINED; elsif Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && SCR_EL3.TLOR == '1' then UNDEFINED; elsif HaveEL(EL3) && SCR_EL3.TLOR == '1' then if Halted() && EDSCR.SDD == '1' then UNDEFINED; else AArch64.SystemAccessTrap(EL3, 0x18); else return LORSA_EL1; elsif PSTATE.EL == EL3 then if SCR_EL3.NS == '0' then UNDEFINED; else return LORSA_EL1;
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b000 | 0b1010 | 0b0100 | 0b000 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && SCR_EL3.TLOR == '1' then UNDEFINED; elsif SCR_EL3.NS == '0' then UNDEFINED; elsif EL2Enabled() && HCR_EL2.TLOR == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif EL2Enabled() && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HFGWTR_EL2.LORSA_EL1 == '1' then AArch64.SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3.TLOR == '1' then if Halted() && EDSCR.SDD == '1' then UNDEFINED; else AArch64.SystemAccessTrap(EL3, 0x18); else LORSA_EL1 = X[t]; elsif PSTATE.EL == EL2 then if SCR_EL3.NS == '0' then UNDEFINED; elsif Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority when SDD == '1'" && SCR_EL3.TLOR == '1' then UNDEFINED; elsif HaveEL(EL3) && SCR_EL3.TLOR == '1' then if Halted() && EDSCR.SDD == '1' then UNDEFINED; else AArch64.SystemAccessTrap(EL3, 0x18); else LORSA_EL1 = X[t]; elsif PSTATE.EL == EL3 then if SCR_EL3.NS == '0' then UNDEFINED; else LORSA_EL1 = X[t];
3020/09/2021 1511:3402; 092b4e1bbfbb45a293b198f9330c5f529ead2b0fd4a233ffbdfb36e47856c443a7ce9a85f5e501ca
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