(old) htmldiff from-(new)

CNTACR<n>, Counter-timer Access Control Registers, n = 0 - 7

The CNTACR<n> characteristics are:

Purpose

Provides top-level access controls for the elements of a timer frame. CNTACR<n> provides the controls for frame CNTBaseN.

In addition to the CNTACR<n> control:

Configuration

The power domain of CNTACR<n> is IMPLEMENTATION DEFINED.

For more information, see 'Power and reset domains for the system level implementation of the Generic Timer'.

Implemented only if the value of CNTTIDR.Frame<n> is 1.

An implementation of the counters might not provide configurable access to some or all of the features. In this case, the associated field in the CNTACR<n> register is:

Attributes

CNTACR<n> is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0RWPTRWVTRVOFFRFRQRVCTRPCT

Bits [31:6]

Reserved, RES0.

RWPT, bit [5]

Read/write access to the EL1 Physical Timer registers CNTP_CVAL, CNTP_TVAL, and CNTP_CTL, in frame <n>. The possible values of this bit are:

RWPTMeaning
0b0

No access to the EL1 Physical Timer registers in frame <n>. The registers are RES0.

0b1

Read/write access to the EL1 Physical Timer registers in frame <n>.

The reset behavior of this field is:

RWVT, bit [4]

Read/write access to the Virtual Timer register CNTV_CVAL, CNTV_TVAL, and CNTV_CTL, in frame <n>. The possible values of this bit are:

RWVTMeaning
0b0

No access to the Virtual Timer registers in frame <n>. The registers are RES0.

0b1

Read/write access to the Virtual Timer registers in frame <n>.

The reset behavior of this field is:

RVOFF, bit [3]

Read-only access to CNTVOFF, in frame <n>. The possible values of this bit are:

RVOFFMeaning
0b0

No access to CNTVOFF in frame <n>. The register is RES0.

0b1

Read-only access to CNTVOFF in frame <n>.

The reset behavior of this field is:

RFRQ, bit [2]

Read-only access to CNTFRQ, in frame <n>. The possible values of this bit are:

RFRQMeaning
0b0

No access to CNTFRQ in frame <n>. The register is RES0.

0b1

Read-only access to CNTFRQ in frame <n>.

The reset behavior of this field is:

RVCT, bit [1]

Read-only access to CNTVCT, in frame <n>. The possible values of this bit are:

RVCTMeaning
0b0

No access to CNTVCT in frame <n>. The register is RES0.

0b1

Read-only access to CNTVCT in frame <n>.

The reset behavior of this field is:

RPCT, bit [0]

Read-only access to CNTPCT, in frame <n>. The possible values of this bit are:

RPCTMeaning
0b0

No access to CNTPCT in frame <n>. The register is RES0.

0b1

Read-only access to CNTPCT in frame <n>.

The reset behavior of this field is:

Accessing CNTACR<n>

In a system that recognizes two Security states:

CNTACR<n> can be accessed through the memory-mapped interfaces:

ComponentFrameOffsetInstance
TimerCNTCTLBase0x040 + (4 * n)CNTACR<n>

Accesses on this interface are RW.


3020/09/2021 1511:3402; 092b4e1bbfbb45a293b198f9330c5f529ead2b0fd4a233ffbdfb36e47856c443a7ce9a85f5e501ca

Copyright © 2010-2021 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.

(old) htmldiff from-(new)