ISA_v82A_A64_xml_00bet3.1 (old) | htmldiff from-ISA_v82A_A64_xml_00bet3.1 | (new) ISA_v82A_A64_xml_00bet3.1_OPT |
No Operation does nothing, other than advance the value of the program counter by 4. This instruction can be used for instruction alignment purposes.
The timing effects of including a NOP instruction in a program are not guaranteed. It can increase execution time, leave it unchanged, or even reduce it. Therefore, NOP instructions are not suitable for timing loops.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 1 | 1 | 1 |
CRm | op2 |
// Empty.SystemHintOp op;
case CRm:op2 of
when '0000 000' op = SystemHintOp_NOP;
when '0000 001' op = SystemHintOp_YIELD;
when '0000 010' op = SystemHintOp_WFE;
when '0000 011' op = SystemHintOp_WFI;
when '0000 100' op = SystemHintOp_SEV;
when '0000 101' op = SystemHintOp_SEVL;
when '0010 000'
op = ifHaveRASExt() then SystemHintOp_ESB else SystemHintOp_NOP;
when '0010 001'
op = if HaveStatisticalProfiling() then SystemHintOp_PSB else SystemHintOp_NOP;
otherwise op = SystemHintOp_NOP;
// do nothingcase op of
when SystemHintOp_YIELDHint_Yield();
when SystemHintOp_WFE
if IsEventRegisterSet() then
ClearEventRegister();
else
if PSTATE.EL == EL0 then
// Check for traps described by the OS which may be EL1 or EL2.
AArch64.CheckForWFxTrap(EL1, TRUE);
if HaveEL(EL2) && !IsSecure() && PSTATE.EL IN {EL0,EL1} && !IsInHost() then
// Check for traps described by the Hypervisor.
AArch64.CheckForWFxTrap(EL2, TRUE);
if HaveEL(EL3) && PSTATE.EL != EL3 then
// Check for traps described by the Secure Monitor.
AArch64.CheckForWFxTrap(EL3, TRUE);
WaitForEvent();
when SystemHintOp_WFI
if !InterruptPending() then
if PSTATE.EL == EL0 then
// Check for traps described by the OS which may be EL1 or EL2.
AArch64.CheckForWFxTrap(EL1, FALSE);
if HaveEL(EL2) && !IsSecure() && PSTATE.EL IN {EL0,EL1} && !IsInHost() then
// Check for traps described by the Hypervisor.
AArch64.CheckForWFxTrap(EL2, FALSE);
if HaveEL(EL3) && PSTATE.EL != EL3 then
// Check for traps described by the Secure Monitor.
AArch64.CheckForWFxTrap(EL3, FALSE);
WaitForInterrupt();
when SystemHintOp_SEV
SendEvent();
when SystemHintOp_SEVL
SendEventLocal();
when SystemHintOp_ESB
ErrorSynchronizationBarrier(MBReqDomain_FullSystem, MBReqTypes_All);
AArch64.ESBOperation();
if HaveEL(EL2) && !IsSecure() && PSTATE.EL IN {EL0,EL1} then AArch64.vESBOperation();
TakeUnmaskedSErrorInterrupts();
when SystemHintOp_PSB
ProfilingSynchronizationBarrier();
otherwise // do nothing
Internal version only: isa v25.07, AdvSIMD v23.0, pseudocode v31.3
Copyright © 2010-2017 ARM Limited or its affiliates. All rights reserved. This document is Confidential.
ISA_v82A_A64_xml_00bet3.1 (old) | htmldiff from-ISA_v82A_A64_xml_00bet3.1 | (new) ISA_v82A_A64_xml_00bet3.1_OPT |