MSR (immediate)

Move immediate value to Special Register moves an immediate value to selected bits of the PSTATE. For more information, see Process state, PSTATE.

The bits that can be written are D, A, I, F, and SP. This set of bits is expanded in extensions to the architecture as follows:

313029282726252423222120191817161514131211109876543210
1101010100000op10100CRmop211111

System

MSR <pstatefield>, #<imm>

AArch64.CheckSystemAccess('00', op1, '0100', CRm, op2, '11111', '0'); bits(4) operand = CRm; PSTATEField field; case op1:op2 of when '000 011' if !HaveUAOExt() then UnallocatedEncoding(); field = PSTATEField_UAO; when '000 100' if !HavePANExt() then UnallocatedEncoding(); field = PSTATEField_PAN; when '000 101' field = PSTATEField_SP; when '011 110' field = PSTATEField_DAIFSet; when '011 111' field = PSTATEField_DAIFClr; otherwise UnallocatedEncoding(); // Check that an AArch64 MSR/MRS access to the DAIF flags is permitted if op1 == '011' && PSTATE.EL == EL0 && (IsInHost() || SCTLR_EL1.UMA == '0') then AArch64.SystemRegisterTrap(EL1, '00', op2, op1, '0100', '11111', CRm, '0');

Assembler Symbols

<pstatefield> Is a PSTATE field name, encoded in op1:op2:
op1 op2 <pstatefield> Architectural Feature
000 00x RESERVED -
000 010 RESERVED -
000 011 UAO ARMv8.2-UAO
000 100 PAN ARMv8.1-PAN
000 101 SPSel -
000 11x RESERVED -
001 xxx RESERVED -
010 xxx RESERVED -
011 0xx RESERVED -
011 10x RESERVED -
011 110 DAIFSet -
011 111 DAIFClr -
1xx xxx RESERVED -
<imm>

Is a 4-bit unsigned immediate, in the range 0 to 15, encoded in the "CRm" field.

Operation

case field of when PSTATEField_SP PSTATE.SP = operand<0>; when PSTATEField_DAIFSet PSTATE.D = PSTATE.D OR operand<3>; PSTATE.A = PSTATE.A OR operand<2>; PSTATE.I = PSTATE.I OR operand<1>; PSTATE.F = PSTATE.F OR operand<0>; when PSTATEField_DAIFClr PSTATE.D = PSTATE.D AND NOT(operand<3>); PSTATE.A = PSTATE.A AND NOT(operand<2>); PSTATE.I = PSTATE.I AND NOT(operand<1>); PSTATE.F = PSTATE.F AND NOT(operand<0>); when PSTATEField_PAN PSTATE.PAN = operand<0>; when PSTATEField_UAO PSTATE.UAO = operand<0>;


Internal version only: isa v25.07, AdvSIMD v23.0, pseudocode v31.3

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