SUB (extended register)
Subtract (extended register) subtracts a sign or zero-extended register value, followed by an optional left shift amount, from a register value, and writes the result to the destination register. The argument that is extended from the <Rm> register can be a byte, halfword, word, or doubleword.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
sf | 1 | 0 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | Rm | option | imm3 | Rn | Rd |
| op | S | | | | | | | | |
integer d = UInt(Rd);
integer n = UInt(Rn);
integer m = UInt(Rm);
integer datasize = if sf == '1' then 64 else 32;integer datasize = if sf == '1' then 64 else 32;
boolean sub_op = (op == '1');
boolean setflags = (S == '1');
ExtendType extend_type = DecodeRegExtend(option);
integer shift = UInt(imm3);
if shift > 4 then ReservedValue();
Assembler Symbols
Operation
bits(datasize) result;
bits(datasize) operand1 = if n == 31 then SP[] else X[n];
bits(datasize) operand2 = ExtendReg(m, extend_type, shift);
bits(4) nzcv;
bit carry_in;
operand2 =if sub_op then
operand2 = NOT(operand2);
(result, -) = carry_in = '1';
else
carry_in = '0';
(result, nzcv) = AddWithCarry(operand1, operand2, '1');
(operand1, operand2, carry_in);
if d == 31 thenif setflags then
PSTATE.<N,Z,C,V> = nzcv;
if d == 31 && !setflags then
SP[] = result;
else
X[d] = result;
Internal version only: isa v25.07, AdvSIMD v23.0, pseudocode v31.3
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