Compare (extended register) subtracts a sign or zero-extended register value, followed by an optional left shift amount, from a register value. The argument that is extended from the <Rm> register can be a byte, halfword, word, or doubleword. It updates the condition flags based on the result, and discards the result.
This is an alias of SUBS (extended register). This means:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
sf | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 1 | Rm | option | imm3 | Rn | 1 | 1 | 1 | 1 | 1 | ||||||||||||
op | S | Rd |
CMP <Wn|WSP>, <Wm>{, <extend> {#<amount>}}
is equivalent to
SUBS WZR, <Wn|WSP>, <Wm>{, <extend> {#<amount>}}
and is always the preferred disassembly.
CMP <Xn|SP>, <R><m>{, <extend> {#<amount>}}
is equivalent to
SUBS XZR, <Xn|SP>, <R><m>{, <extend> {#<amount>}}
and is always the preferred disassembly.
<Wn|WSP> |
Is the 32-bit name of the first source general-purpose register or stack pointer, encoded in the "Rn" field. |
<Wm> |
Is the 32-bit name of the second general-purpose source register, encoded in the "Rm" field. |
<Xn|SP> |
Is the 64-bit name of the first source general-purpose register or stack pointer, encoded in the "Rn" field. |
<R> |
Is a width specifier,
encoded in
option:
|
<m> |
Is the number [0-30] of the second general-purpose source register or the name ZR (31), encoded in the "Rm" field. |
<extend> |
For the 32-bit variant: is the extension to be applied to the second source operand,
encoded in
option:
| ||||||||||||||||||
For the 64-bit variant: is the extension to be applied to the second source operand,
encoded in
option:
|
The description of SUBS (extended register) gives the operational pseudocode for this instruction.
Internal version only: isa v25.07, AdvSIMD v23.0, pseudocode v31.3
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