SADALP
Signed Add and Accumulate Long Pairwise. This instruction adds pairs of adjacent signed integer values from the vector in the source SIMD&FP register and accumulates the results into the vector elements of the destination SIMD&FP register. The destination vector elements are twice as long as the source vector elements.
Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | Q | 0 | 0 | 1 | 1 | 1 | 0 | size | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 | 0 | 1 | 0 | Rn | Rd |
| | U | | | | | op | | | | |
integer d = UInt(Rd);
integer n = UInt(Rn);
if size == '11' then ReservedValue();
integer esize = 8 << UInt(size);
integer datasize = if Q == '1' then 128 else 64;
integer elements = datasize DIV (2 * esize);
integer elements = datasize DIV (2*esize);
boolean acc = (op == '1');
boolean unsigned = (U == '1');
Assembler Symbols
Operation
CheckFPAdvSIMDEnabled64();
bits(datasize) operand = V[n];
bits(datasize) result;
bits(2*esize) sum;
integer op1;
integer op2;
result = if acc then V[d] else Zeros();
for e = 0 to elements-1
op1 = Int(Elem[operand, 2*e+0, esize], unsigned);
op2 = Int(Elem[operand, 2*e+1, esize], unsigned);
sum = (op1+op2)<2*esize-1:0>; sum = (op1 + op2)<2*esize-1:0>;
Elem[result, e, 2*esize] = Elem[result, e, 2*esize] + sum;
V[d] = result;
Internal version only: isa v25.07, AdvSIMD v23.0, pseudocode v31.3
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