ISA_v82A_A64_xml_00bet3.2 (old) | htmldiff from-ISA_v82A_A64_xml_00bet3.2 | (new) ISA_v82A_A64_xml_00bet3.2_OPT |
Count leading zero bits: Rd = CLZ(Rn).
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
sf | 1 | 0 | 1 | 1 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | Rn | Rd | ||||||||
op |
integer d = UInt(Rd);
integer n = UInt(Rn);
integer datasize = if sf == '1' then 64 else 32;CountOp opcode = if op == '0' then CountOp_CLZ else CountOp_CLS;
<Wd> | Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field. |
<Wn> | Is the 32-bit name of the general-purpose source register, encoded in the "Rn" field. |
<Xd> | Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field. |
<Xn> | Is the 64-bit name of the general-purpose source register, encoded in the "Rn" field. |
integer result;
bits(datasize) operand1 = X[n];
result =if opcode == CountOp_CLZ then
result = CountLeadingZeroBits(operand1);
else
result = CountLeadingSignBits(operand1);
X[d] = result<datasize-1:0>;
Internal version only: isa v25.07, AdvSIMD v23.0, pseudocode v31.3
Copyright © 2010-2017 ARM Limited or its affiliates. All rights reserved. This document is Non-Confidential.
ISA_v82A_A64_xml_00bet3.2 (old) | htmldiff from-ISA_v82A_A64_xml_00bet3.2 | (new) ISA_v82A_A64_xml_00bet3.2_OPT |