ISA_v82A_A64_xml_00bet3.2 (old)htmldiff from-ISA_v82A_A64_xml_00bet3.2(new) ISA_v82A_A64_xml_00bet3.2_OPT

SHA1SU0

SHA1 schedule update 0.

313029282726252423222120191817161514131211109876543210
01011110000Rm001100RnRd

Advanced SIMD

SHA1SU0 <Vd>.4S, <Vn>.4S, <Vm>.4S

integer d = UInt(Rd); integer n = UInt(Rn); integer m = UInt(Rm); if !HaveCryptoExt() then UnallocatedEncoding();

Assembler Symbols

<Vd>

Is the name of the SIMD&FP source and destination register, encoded in the "Rd" field.

<Vn>

Is the name of the second SIMD&FP source register, encoded in the "Rn" field.

<Vm>

Is the name of the third SIMD&FP source register, encoded in the "Rm" field.

Operation

CheckCryptoEnabled64(); bits(128) operand1 = V[d]; bits(128) operand2 = V[n]; bits(128) operand3 = V[m]; bits(128) result; result = operand2<63:0>:operand1<127:64>; result = operand2<63:0> : operand1<127:64>; result = result EOR operand1 EOR operand3; V[d] = result;


Internal version only: isa v25.07, AdvSIMD v23.0, pseudocode v31.3

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ISA_v82A_A64_xml_00bet3.2 (old)htmldiff from-ISA_v82A_A64_xml_00bet3.2(new) ISA_v82A_A64_xml_00bet3.2_OPT