SDOT (by element)

Dot Product signed arithmetic (vector, by element). This instruction performs the dot product of the four 8-bit elements in each 32-bit element of the first source register with the four 8-bit elements of an indexed 32-bit element in the second source register, accumulating the result into the corresponding 32-bit element of the destination register.

Depending on the settings in the CPACR_EL1, CPTR_EL2, and CPTR_EL3 registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.

From ARMv8.2, this is an optional instruction.

ID_AA64ISAR0_EL1.DP indicates whether this instruction is supported.

Vector
(ARMv8.2)

313029282726252423222120191817161514131211109876543210
0Q001111sizeLMRm1110H0RnRd
U

Vector

SDOT <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.4B[<index>]

if !HaveDOTPExt() then UNDEFINED; if size != '10' then ReservedValue(); boolean signed = (U=='0'); integer d = UInt(Rd); integer n = UInt(Rn); integer m = UInt(M:Rm); integer index = UInt(H:L); integer esize = 8 << UInt(size); integer datasize = if Q == '1' then 128 else 64; integer elements = datasize DIV esize;

Assembler Symbols

<Vd>

Is the name of the SIMD&FP destination register, encoded in the "Rd" field.

<Ta> Is an arrangement specifier, encoded in Q:
Q <Ta>
0 2S
1 4S
<Vn>

Is the name of the first SIMD&FP source register, encoded in the "Rn" field.

<Tb> Is an arrangement specifier, encoded in Q:
Q <Tb>
0 8B
1 16B
<Vm>

Is the name of the second SIMD&FP source register, encoded in the "M:Rm" fields.

<index>

Is the element index, encoded in the "H:L" fields.

Operation

CheckFPAdvSIMDEnabled64(); bits(datasize) operand1 = V[n]; bits(128) operand2 = V[m]; bits(datasize) result = V[d]; for e = 0 to elements-1 integer res = 0; integer element1, element2; for i = 0 to 3 if signed then element1 = SInt(Elem[operand1, 4 * e + i, esize DIV 4]); element2 = SInt(Elem[operand2, 4 * index + i, esize DIV 4]); else element1 = UInt(Elem[operand1, 4 * e + i, esize DIV 4]); element2 = UInt(Elem[operand2, 4 * index + i, esize DIV 4]); res = res + element1 * element2; Elem[result, e, esize] = Elem[result, e, esize] + res; V[d] = result;


Internal version only: isa v27.02, AdvSIMD v26.0, pseudocode v34.2.2 ; Build timestamp: 2018-03-28T19:55

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