ISA_v83A_A64_xml_00bet6.1 (old) | htmldiff from-ISA_v83A_A64_xml_00bet6.1 | (new) ISA_v84A_A64_xml_00bet7 |
SM4 Key takes an input as a 128-bit vector from the first source SIMD&FP register and a 128-bit constant from the second SIMD&FP register. It derives four iterations of the output key, in accordance with the SM4 standard, returning the 128-bit result to the destination SIMD&FP register.
This instruction is implemented only when ARMv8.2-SM is implemented.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 | 1 | 1 | Rm | 1 | 1 | 0 | 0 | 1 | 0 | Rn | Rd |
if !HaveSM4ExtHaveChCryptoExt() then UnallocatedEncoding();
integer d = UInt(Rd);
integer n = UInt(Rn);
integer m = UInt(Rm);
<Vd> | Is the name of the SIMD&FP destination register, encoded in the "Rd" field. |
<Vn> | Is the name of the first SIMD&FP source register, encoded in the "Rn" field. |
<Vm> | Is the name of the second SIMD&FP source register, encoded in the "Rm" field. |
AArch64.CheckFPAdvSIMDEnabled(); bits(128) Vm = V[m]; bits(32) intval; bits(8) sboxout; bits(128) result; bits(32) const; bits(128) roundresult; integer index; roundresult = V[n]; for index = 0 to 3 const = Elem[Vm,index,32]; intval = roundresult<127:96> EOR roundresult<95:64> EOR roundresult<63:32> EOR const; for i = 0 to 3 Elem[intval,i,8] = Sbox(Elem[intval,i,8]); intval = intval EOR ROL(intval,13) EOR ROL(intval,23); intval = intval EOR roundresult<31:0>; roundresult<31:0> = roundresult<63:32>; roundresult<63:32> = roundresult<95:64>; roundresult<95:64> = roundresult<127:96>; roundresult<127:96> = intval; V[d] = roundresult;
If PSTATE.DIT is 1:
Internal version only: isa v29.05v27.02, AdvSIMD v26.0, pseudocode v35.3v34.2.2
; Build timestamp: 2018-06-16T092018-03-28T19:4555
Copyright © 2010-2018 ARM Limited or its affiliates. All rights reserved. This document is Non-Confidential.
ISA_v83A_A64_xml_00bet6.1 (old) | htmldiff from-ISA_v83A_A64_xml_00bet6.1 | (new) ISA_v84A_A64_xml_00bet7 |