SSBB

Speculative Store Bypass Barrier is a memory barrier which prevents speculative loads from bypassing earlier stores to the same virtual address under certain conditions.

The semantics of the Speculative Store Bypass Barrier are:

313029282726252423222120191817161514131211109876543210
11010101000000110011000010011111
CRmopc

System

SSBB

// Empty.

Operation

SpeculativeSynchronizationBarrierToVA();


Internal version only: isa v29.05, AdvSIMD v26.0, pseudocode v35.3 ; Build timestamp: 2018-06-16T09:58

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