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ADDS (immediate)

Add (immediate), setting flags, adds a register value and an optionally-shifted immediate value, and writes the result to the destination register. It updates the condition flags based on the result.

This instruction is used by the alias CMN (immediate).

313029282726252423222120191817161514131211109876543210
sf0110001shiftimm12RnRd
opS

32-bit (sf == 0)

ADDS <Wd>, <Wn|WSP>, #<imm>{, <shift>}

64-bit (sf == 1)

ADDS <Xd>, <Xn|SP>, #<imm>{, <shift>}

integer d = UInt(Rd); integer n = UInt(Rn); integer datasize = if sf == '1' then 64 else 32; boolean sub_op = (op == '1'); boolean setflags = (S == '1'); bits(datasize) imm; case shift of when '00' imm = ZeroExtend(imm12, datasize); when '01' imm = ZeroExtend(imm12 : Zeros(12), datasize); when '1x' ReservedValue();

Assembler Symbols

<Wd>

Is the 32-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Wn|WSP>

Is the 32-bit name of the source general-purpose register or stack pointer, encoded in the "Rn" field.

<Xd>

Is the 64-bit name of the general-purpose destination register, encoded in the "Rd" field.

<Xn|SP>

Is the 64-bit name of the source general-purpose register or stack pointer, encoded in the "Rn" field.

<imm>

Is an unsigned immediate, in the range 0 to 4095, encoded in the "imm12" field.

<shift> Is the optional left shift to apply to the immediate, defaulting to LSL #0 and encoded in shift:
shift<shift>
00LSL #0
01LSL #12
1xRESERVED
Is the optional left shift to apply to the immediate, defaulting to LSL #0 and encoded in shift:
shift<shift>
00LSL #0
01LSL #12
1xRESERVED

Alias Conditions

AliasIs preferred when
CMN (immediate)Rd == '11111'

Operation

bits(datasize) result; bits(datasize) operand1 = if n == 31 then SP[] else X[n]; bits(datasize) operand2 = imm; bits(4) nzcv; bit carry_in; if sub_op then operand2 = NOT(operand2); carry_in = '1'; else carry_in = '0'; (result, nzcv) = AddWithCarry(operand1, operand2, carry_in); if setflags then PSTATE.<N,Z,C,V> = nzcv; if d == 31 && !setflags then SP[] = result; else X[d] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: isa v29.05v27.02, AdvSIMD v26.0, pseudocode v35.3v34.2.2 ; Build timestamp: 2018-06-16T092018-03-28T19:4555

Copyright © 2010-2018 ARM Limited or its affiliates. All rights reserved. This document is Non-Confidential.

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