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AESIMC

AES inverse mix columns.

AES inverse mix columns.

313029282726252423222120191817161514131211109876543210
0100111000101000011110RnRd
D

Advanced SIMD

AESIMC <Vd>.16B, <Vn>.16B

integer d = UInt(Rd); integer n = UInt(Rn); if !HaveAESExtHaveCryptoExt() then UnallocatedEncoding(); boolean decrypt = (D == '1');

Assembler Symbols

<Vd>

Is the name of the SIMD&FP destination register, encoded in the "Rd" field.

<Vn>

Is the name of the SIMD&FP source register, encoded in the "Rn" field.

Operation

AArch64.CheckFPAdvSIMDEnabledCheckCryptoEnabled64(); bits(128) operand = V[n]; bits(128) result; if decrypt then result = AESInvMixColumns(operand); else result = AESMixColumns(operand); V[d] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: isa v29.05v27.02, AdvSIMD v26.0, pseudocode v35.3v34.2.2 ; Build timestamp: 2018-06-16T092018-03-28T19:4555

Copyright © 2010-2018 ARM Limited or its affiliates. All rights reserved. This document is Non-Confidential.

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