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REV16 (vector): Reverse elements in
REV16: Reverse bytes in
16-bit halfwords.
ST2 (single structure): Store single
2-element structure from one lane of two registers.
LD2 (single structure): Load single
2-element structure to one lane of two registers.
ST2 (multiple structures): Store multiple
2-element structures from two registers.
LD2 (multiple structures): Load multiple
2-element structures to two registers.
ST3 (single structure): Store single
3-element structure from one lane of three registers.
LD3 (single structure): Load single
3-element structure to one lane of three registers).
ST3 (multiple structures): Store multiple
3-element structures from three registers.
LD3 (multiple structures): Load multiple
3-element structures to three registers.
REV32 (vector): Reverse elements in
32-bit words (vector).
REV32: Reverse bytes in
32-bit words.
ST4 (single structure): Store single
4-element structure from one lane of four registers.
LD4 (single structure): Load single
4-element structure to one lane of four registers.
ST4 (multiple structures): Store multiple
4-element structures from four registers.
LD4 (multiple structures): Load multiple
4-element structures to four registers.
REV64: Reverse elements in
AUTDA, AUTDZA: Authenticate Data address, using key
AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA: Authenticate Instruction address, using key
A.
PACDA, PACDZA: Pointer Authentication Code for Data address, using key
A.
PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA: Pointer Authentication Code for Instruction address, using key
A.
ABS: Absolute value (vector).
FACGT: Floating-point
Absolute Compare Greater than (vector).
FACGE: Floating-point
Absolute Compare Greater than or Equal (vector).
FABD: Floating-point
Absolute Difference (vector).
UABD: Unsigned
Absolute Difference (vector).
SABAL, SABAL2: Signed
Absolute difference and Accumulate Long.
UABAL, UABAL2: Unsigned
Absolute difference and Accumulate Long.
SABA: Signed
Absolute difference and Accumulate.
UABA: Unsigned
Absolute difference and Accumulate.
SABDL, SABDL2: Signed
Absolute Difference Long.
UABDL, UABDL2: Unsigned
Absolute Difference Long.
SABD: Signed
Absolute Difference.
FABS (scalar): Floating-point
Absolute value (scalar).
ABS:
Absolute value (vector).
FABS (vector): Floating-point
Absolute value (vector).
SQABS: Signed saturating
Absolute value.
FCMLA (by element): Floating-point Complex Multiply
Accumulate (by element).
SRSRA: Signed Rounding Shift Right and
Accumulate (immediate).
SSRA: Signed Shift Right and
Accumulate (immediate).
URSRA: Unsigned Rounding Shift Right and
Accumulate (immediate).
USRA: Unsigned Shift Right and
Accumulate (immediate).
SADALP: Signed Add and
Accumulate Long Pairwise.
UADALP: Unsigned Add and
Accumulate Long Pairwise.
SABAL, SABAL2: Signed Absolute difference and
Accumulate Long.
UABAL, UABAL2: Unsigned Absolute difference and
Accumulate Long.
USQADD: Unsigned saturating
Accumulate of Signed value.
SUQADD: Signed saturating
Accumulate of Unsigned value.
SQRDMLAH (by element): Signed Saturating Rounding Doubling Multiply
Accumulate returning High Half (by element).
SQRDMLAH (vector): Signed Saturating Rounding Doubling Multiply
Accumulate returning High Half (vector).
FCMLA: Floating-point Complex Multiply
Accumulate.
SABA: Signed Absolute difference and
Accumulate.
UABA: Unsigned Absolute difference and
Accumulate.
FMLA (by element): Floating-point fused Multiply-Add to
accumulator (by element).
FMLAL, FMLAL2 (by element): Floating-point fused Multiply-Add Long to
accumulator (by element).
FMLS (by element): Floating-point fused Multiply-Subtract from
accumulator (by element).
FMLSL, FMLSL2 (by element): Floating-point fused Multiply-Subtract Long from
accumulator (by element).
FMLA (vector): Floating-point fused Multiply-Add to
accumulator (vector).
FMLAL, FMLAL2 (vector): Floating-point fused Multiply-Add Long to
accumulator (vector).
FMLS (vector): Floating-point fused Multiply-Subtract from
accumulator (vector).
FMLSL, FMLSL2 (vector): Floating-point fused Multiply-Subtract Long from
accumulator (vector).
MLA (vector): Multiply-Add to
accumulator (vector).
MLS (vector): Multiply-Subtract from
accumulator (vector).
MLA (by element): Multiply-Add to
accumulator (vector, by element).
MLS (by element): Multiply-Subtract from
accumulator (vector, by element).
LDAXP: Load-
Acquire Exclusive Pair of Registers.
LDAXRB: Load-
Acquire Exclusive Register Byte.
LDAXRH: Load-
Acquire Exclusive Register Halfword.
LDAXR: Load-
Acquire Exclusive Register.
LDAPRB: Load-
Acquire RCpc Register Byte.
LDAPRH: Load-
Acquire RCpc Register Halfword.
LDAPR: Load-
Acquire RCpc Register.
LDARB: Load-
Acquire Register Byte.
LDLARB: Load LO
Acquire Register Byte.
LDARH: Load-
Acquire Register Halfword.
LDLARH: Load LO
Acquire Register Halfword.
LDAR: Load-
Acquire Register.
LDLAR: Load LO
Acquire Register.
ADDV: Add
across Vector.
FMAXNMV: Floating-point Maximum Number
across Vector.
FMAXV: Floating-point Maximum
across Vector.
FMINNMV: Floating-point Minimum Number
across Vector.
FMINV: Floating-point Minimum
across Vector.
SADDLV: Signed Add Long
across Vector.
SMAXV: Signed Maximum
across Vector.
SMINV: Signed Minimum
across Vector.
UADDLV: Unsigned sum Long
across Vector.
UMAXV: Unsigned Maximum
across Vector.
UMINV: Unsigned Minimum
across Vector.
ADC: Add with Carry.
ADCS: Add with Carry, setting flags.
Add (extended register), setting flags.
Add (extended register).
ADD (extended register): Add (extended register).
Add (immediate), setting flags.
Add (immediate).
MOV (to/from SP): Move between register and stack pointer: an alias of
ADD (immediate).
ADD (immediate): Add (immediate).
FADD (scalar): Floating-point
Add (scalar).
FMADD: Floating-point fused Multiply-
Add (scalar).
FNMADD: Floating-point Negated fused Multiply-
Add (scalar).
Add (shifted register), setting flags.
Add (shifted register).
ADD (shifted register): Add (shifted register).
Add (vector).
FADD (vector): Floating-point
Add (vector).
ADD (vector): Add (vector).
ADDV:
Add across Vector.
SADALP: Signed
Add and Accumulate Long Pairwise.
UADALP: Unsigned
Add and Accumulate Long Pairwise.
SQDMLAL, SQDMLAL2 (by element): Signed saturating Doubling Multiply-
Add Long (by element).
SADDL, SADDL2: Signed
Add Long (vector).
SMLAL, SMLAL2 (vector): Signed Multiply-
Add Long (vector).
UADDL, UADDL2: Unsigned
Add Long (vector).
UMLAL, UMLAL2 (vector): Unsigned Multiply-
Add Long (vector).
SMLAL, SMLAL2 (by element): Signed Multiply-
Add Long (vector, by element).
UMLAL, UMLAL2 (by element): Unsigned Multiply-
Add Long (vector, by element).
SADDLV: Signed
Add Long across Vector.
SADDLP: Signed
Add Long Pairwise.
UADDLP: Unsigned
Add Long Pairwise.
FMLAL, FMLAL2 (by element): Floating-point fused Multiply-
Add Long to accumulator (by element).
FMLAL, FMLAL2 (vector): Floating-point fused Multiply-
Add Long to accumulator (vector).
SMADDL: Signed Multiply-
Add Long.
SQDMLAL, SQDMLAL2 (vector): Signed saturating Doubling Multiply-
Add Long.
UMADDL: Unsigned Multiply-
Add Long.
STADDB, STADDLB: Atomic
add on byte in memory, without return: an alias of LDADDB, LDADDAB, LDADDALB, LDADDLB.
add on byte in memory.
STADDH, STADDLH: Atomic
add on halfword in memory, without return: an alias of LDADDH, LDADDAH, LDADDALH, LDADDLH.
add on halfword in memory.
STADD, STADDL: Atomic
add on word or doubleword in memory, without return: an alias of LDADD, LDADDA, LDADDAL, LDADDL.
LDADD, LDADDA, LDADDAL, LDADDL: Atomic
add on word or doubleword in memory.
Add Pair of elements (scalar).
FADDP (scalar): Floating-point
Add Pair of elements (scalar).
Add Pairwise (vector).
FADDP (vector): Floating-point
Add Pairwise (vector).
Add returning High Narrow.
RADDHN, RADDHN2: Rounding
Add returning High Narrow.
FMLA (by element): Floating-point fused Multiply-
Add to accumulator (by element).
FMLA (vector): Floating-point fused Multiply-
Add to accumulator (vector).
MLA (vector): Multiply-
Add to accumulator (vector).
MLA (by element): Multiply-
Add to accumulator (vector, by element).
SADDW, SADDW2: Signed
Add Wide.
UADDW, UADDW2: Unsigned
Add Wide.
ADCS:
Add with Carry, setting flags.
ADC:
Add with Carry.
FCADD: Floating-point Complex
Add.
MADD: Multiply-
Add.
SHADD: Signed Halving
Add.
SQADD: Signed saturating
Add.
SRHADD: Signed Rounding Halving
Add.
UHADD: Unsigned Halving
Add.
UQADD: Unsigned saturating
Add.
URHADD: Unsigned Rounding Halving
Add.
ADDHN, ADDHN2: Add returning High Narrow.
ADDP (scalar): Add Pair of elements (scalar).
ADDP (vector): Add Pairwise (vector).
ADRP: Form PC-relative
address to 4KB page.
AT:
Address Translate: an alias of SYS.
AUTDA, AUTDZA: Authenticate Data
address, using key A.
AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA: Authenticate Instruction
address, using key A.
PACDA, PACDZA: Pointer Authentication Code for Data
address, using key A.
PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA: Pointer Authentication Code for Instruction
address, using key A.
AUTDB, AUTDZB: Authenticate Data
address, using key B.
AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB: Authenticate Instruction
address, using key B.
PACDB, PACDZB: Pointer Authentication Code for Data
address, using key B.
PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB: Pointer Authentication Code for Instruction
address, using key B.
ADR: Form PC-relative
address.
CMN (extended register): Compare Negative (extended register): an alias of
ADDS (extended register).
ADDS (extended register): Add (extended register), setting flags.
CMN (immediate): Compare Negative (immediate): an alias of
ADDS (immediate).
ADDS (immediate): Add (immediate), setting flags.
CMN (shifted register): Compare Negative (shifted register): an alias of
ADDS (shifted register).
ADDS (shifted register): Add (shifted register), setting flags.
ADDV: Add across Vector.
ADR: Form PC-relative address.
ADRP: Form PC-relative address to 4KB page.
AES inverse mix columns.
AES mix columns.
AESD:
AES single round decryption.
AESE:
AES single round encryption.
AESD: AES single round decryption.
AESE: AES single round encryption.
AESIMC: AES inverse mix columns.
AESMC: AES mix columns.
MOV (to/from SP): Move between register and stack pointer: an
alias of ADD (immediate).
CMN (extended register): Compare Negative (extended register): an
alias of ADDS (extended register).
CMN (immediate): Compare Negative (immediate): an
alias of ADDS (immediate).
CMN (shifted register): Compare Negative (shifted register): an
alias of ADDS (shifted register).
TST (immediate): Test bits (immediate): an
alias of ANDS (immediate).
TST (shifted register): Test (shifted register): an
alias of ANDS (shifted register).
ASR (register): Arithmetic Shift Right (register): an
alias of ASRV.
BFC: Bitfield Clear, leaving other bits unchanged: an
alias of BFM.
BFI: Bitfield Insert: an
alias of BFM.
BFXIL: Bitfield extract and insert at low end: an
alias of BFM.
CINC: Conditional Increment: an
alias of CSINC.
CSET: Conditional Set: an
alias of CSINC.
CINV: Conditional Invert: an
alias of CSINV.
CSETM: Conditional Set Mask: an
alias of CSINV.
CNEG: Conditional Negate: an
alias of CSNEG.
MOV (scalar): Move vector element to scalar: an
alias of DUP (element).
ROR (immediate): Rotate right (immediate): an
alias of EXTR.
MOV (element): Move vector element to another vector element: an
alias of INS (element).
MOV (from general): Move general-purpose register to a vector element: an
alias of INS (general).
STADD, STADDL: Atomic add on word or doubleword in memory, without return: an
alias of LDADD, LDADDA, LDADDAL, LDADDL.
STADDB, STADDLB: Atomic add on byte in memory, without return: an
alias of LDADDB, LDADDAB, LDADDALB, LDADDLB.
STADDH, STADDLH: Atomic add on halfword in memory, without return: an
alias of LDADDH, LDADDAH, LDADDALH, LDADDLH.
STCLR, STCLRL: Atomic bit clear on word or doubleword in memory, without return: an
alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
STCLRB, STCLRLB: Atomic bit clear on byte in memory, without return: an
alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
STCLRH, STCLRLH: Atomic bit clear on halfword in memory, without return: an
alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
STEOR, STEORL: Atomic exclusive OR on word or doubleword in memory, without return: an
alias of LDEOR, LDEORA, LDEORAL, LDEORL.
STEORB, STEORLB: Atomic exclusive OR on byte in memory, without return: an
alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
STEORH, STEORLH: Atomic exclusive OR on halfword in memory, without return: an
alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
STSET, STSETL: Atomic bit set on word or doubleword in memory, without return: an
alias of LDSET, LDSETA, LDSETAL, LDSETL.
STSETB, STSETLB: Atomic bit set on byte in memory, without return: an
alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
STSETH, STSETLH: Atomic bit set on halfword in memory, without return: an
alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
STSMAX, STSMAXL: Atomic signed maximum on word or doubleword in memory, without return: an
alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
STSMAXB, STSMAXLB: Atomic signed maximum on byte in memory, without return: an
alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
STSMAXH, STSMAXLH: Atomic signed maximum on halfword in memory, without return: an
alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
STSMIN, STSMINL: Atomic signed minimum on word or doubleword in memory, without return: an
alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
STSMINB, STSMINLB: Atomic signed minimum on byte in memory, without return: an
alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
STSMINH, STSMINLH: Atomic signed minimum on halfword in memory, without return: an
alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
STUMAX, STUMAXL: Atomic unsigned maximum on word or doubleword in memory, without return: an
alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
STUMAXB, STUMAXLB: Atomic unsigned maximum on byte in memory, without return: an
alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
STUMAXH, STUMAXLH: Atomic unsigned maximum on halfword in memory, without return: an
alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
STUMIN, STUMINL: Atomic unsigned minimum on word or doubleword in memory, without return: an
alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
STUMINB, STUMINLB: Atomic unsigned minimum on byte in memory, without return: an
alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
STUMINH, STUMINLH: Atomic unsigned minimum on halfword in memory, without return: an
alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
LSL (register): Logical Shift Left (register): an
alias of LSLV.
LSR (register): Logical Shift Right (register): an
alias of LSRV.
MUL: Multiply: an
alias of MADD.
MOV (inverted wide immediate): Move (inverted wide immediate): an
alias of MOVN.
MOV (wide immediate): Move (wide immediate): an
alias of MOVZ.
MNEG: Multiply-Negate: an
alias of MSUB.
MVN: Bitwise NOT (vector): an
alias of NOT.
MVN: Bitwise NOT: an
alias of ORN (shifted register).
MOV (bitmask immediate): Move (bitmask immediate): an
alias of ORR (immediate).
MOV (register): Move (register): an
alias of ORR (shifted register).
MOV (vector): Move vector: an
alias of ORR (vector, register).
REV64: Reverse Bytes: an
alias of REV.
ROR (register): Rotate Right (register): an
alias of RORV.
NGC: Negate with Carry: an
alias of SBC.
NGCS: Negate with Carry, setting flags: an
alias of SBCS.
ASR (immediate): Arithmetic Shift Right (immediate): an
alias of SBFM.
SBFIZ: Signed Bitfield Insert in Zero: an
alias of SBFM.
SBFX: Signed Bitfield Extract: an
alias of SBFM.
SXTB: Signed Extend Byte: an
alias of SBFM.
SXTH: Sign Extend Halfword: an
alias of SBFM.
SXTW: Sign Extend Word: an
alias of SBFM.
SMULL: Signed Multiply Long: an
alias of SMADDL.
SMNEGL: Signed Multiply-Negate Long: an
alias of SMSUBL.
SXTL, SXTL2: Signed extend Long: an
alias of SSHLL, SSHLL2.
NEG (shifted register): Negate (shifted register): an
alias of SUB (shifted register).
CMP (extended register): Compare (extended register): an
alias of SUBS (extended register).
CMP (immediate): Compare (immediate): an
alias of SUBS (immediate).
CMP (shifted register): Compare (shifted register): an
alias of SUBS (shifted register).
NEGS: Negate, setting flags: an
alias of SUBS (shifted register).
AT: Address Translate: an
alias of SYS.
DC: Data Cache operation: an
alias of SYS.
IC: Instruction Cache operation: an
alias of SYS.
TLBI: TLB Invalidate operation: an
alias of SYS.
LSL (immediate): Logical Shift Left (immediate): an
alias of UBFM.
LSR (immediate): Logical Shift Right (immediate): an
alias of UBFM.
UBFIZ: Unsigned Bitfield Insert in Zero: an
alias of UBFM.
UBFX: Unsigned Bitfield Extract: an
alias of UBFM.
UXTB: Unsigned Extend Byte: an
alias of UBFM.
UXTH: Unsigned Extend Halfword: an
alias of UBFM.
UMULL: Unsigned Multiply Long: an
alias of UMADDL.
MOV (to general): Move vector element to general-purpose register: an
alias of UMOV.
UMNEGL: Unsigned Multiply-Negate Long: an
alias of UMSUBL.
UXTL, UXTL2: Unsigned extend Long: an
alias of USHLL, USHLL2.
LD1R: Load one single-element structure and Replicate to
all lanes (of one register).
LD4R: Load single 4-element structure and Replicate to
all lanes of four registers.
LD3R: Load single 3-element structure and Replicate to
all lanes of three registers.
LD2R: Load single 2-element structure and Replicate to
all lanes of two registers.
MOV (to/from SP): Move between register and stack pointer:
an alias of ADD (immediate).
CMN (extended register): Compare Negative (extended register):
an alias of ADDS (extended register).
CMN (immediate): Compare Negative (immediate):
an alias of ADDS (immediate).
CMN (shifted register): Compare Negative (shifted register):
an alias of ADDS (shifted register).
TST (immediate): Test bits (immediate):
an alias of ANDS (immediate).
TST (shifted register): Test (shifted register):
an alias of ANDS (shifted register).
ASR (register): Arithmetic Shift Right (register):
an alias of ASRV.
BFC: Bitfield Clear, leaving other bits unchanged:
an alias of BFM.
BFI: Bitfield Insert:
an alias of BFM.
BFXIL: Bitfield extract and insert at low end:
an alias of BFM.
CINC: Conditional Increment:
an alias of CSINC.
CSET: Conditional Set:
an alias of CSINC.
CINV: Conditional Invert:
an alias of CSINV.
CSETM: Conditional Set Mask:
an alias of CSINV.
CNEG: Conditional Negate:
an alias of CSNEG.
MOV (scalar): Move vector element to scalar:
an alias of DUP (element).
ROR (immediate): Rotate right (immediate):
an alias of EXTR.
MOV (element): Move vector element to another vector element:
an alias of INS (element).
MOV (from general): Move general-purpose register to a vector element:
an alias of INS (general).
STADD, STADDL: Atomic add on word or doubleword in memory, without return:
an alias of LDADD, LDADDA, LDADDAL, LDADDL.
STADDB, STADDLB: Atomic add on byte in memory, without return:
an alias of LDADDB, LDADDAB, LDADDALB, LDADDLB.
STADDH, STADDLH: Atomic add on halfword in memory, without return:
an alias of LDADDH, LDADDAH, LDADDALH, LDADDLH.
STCLR, STCLRL: Atomic bit clear on word or doubleword in memory, without return:
an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
STCLRB, STCLRLB: Atomic bit clear on byte in memory, without return:
an alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
STCLRH, STCLRLH: Atomic bit clear on halfword in memory, without return:
an alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
STEOR, STEORL: Atomic exclusive OR on word or doubleword in memory, without return:
an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
STEORB, STEORLB: Atomic exclusive OR on byte in memory, without return:
an alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
STEORH, STEORLH: Atomic exclusive OR on halfword in memory, without return:
an alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
STSET, STSETL: Atomic bit set on word or doubleword in memory, without return:
an alias of LDSET, LDSETA, LDSETAL, LDSETL.
STSETB, STSETLB: Atomic bit set on byte in memory, without return:
an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
STSETH, STSETLH: Atomic bit set on halfword in memory, without return:
an alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
STSMAX, STSMAXL: Atomic signed maximum on word or doubleword in memory, without return:
an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
STSMAXB, STSMAXLB: Atomic signed maximum on byte in memory, without return:
an alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
STSMAXH, STSMAXLH: Atomic signed maximum on halfword in memory, without return:
an alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
STSMIN, STSMINL: Atomic signed minimum on word or doubleword in memory, without return:
an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
STSMINB, STSMINLB: Atomic signed minimum on byte in memory, without return:
an alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
STSMINH, STSMINLH: Atomic signed minimum on halfword in memory, without return:
an alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
STUMAX, STUMAXL: Atomic unsigned maximum on word or doubleword in memory, without return:
an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
STUMAXB, STUMAXLB: Atomic unsigned maximum on byte in memory, without return:
an alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
STUMAXH, STUMAXLH: Atomic unsigned maximum on halfword in memory, without return:
an alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
STUMIN, STUMINL: Atomic unsigned minimum on word or doubleword in memory, without return:
an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
STUMINB, STUMINLB: Atomic unsigned minimum on byte in memory, without return:
an alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
STUMINH, STUMINLH: Atomic unsigned minimum on halfword in memory, without return:
an alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
LSL (register): Logical Shift Left (register):
an alias of LSLV.
LSR (register): Logical Shift Right (register):
an alias of LSRV.
MUL: Multiply:
an alias of MADD.
MOV (inverted wide immediate): Move (inverted wide immediate):
an alias of MOVN.
MOV (wide immediate): Move (wide immediate):
an alias of MOVZ.
MNEG: Multiply-Negate:
an alias of MSUB.
MVN: Bitwise NOT (vector):
an alias of NOT.
MVN: Bitwise NOT:
an alias of ORN (shifted register).
MOV (bitmask immediate): Move (bitmask immediate):
an alias of ORR (immediate).
MOV (register): Move (register):
an alias of ORR (shifted register).
MOV (vector): Move vector:
an alias of ORR (vector, register).
REV64: Reverse Bytes:
an alias of REV.
ROR (register): Rotate Right (register):
an alias of RORV.
NGC: Negate with Carry:
an alias of SBC.
NGCS: Negate with Carry, setting flags:
an alias of SBCS.
ASR (immediate): Arithmetic Shift Right (immediate):
an alias of SBFM.
SBFIZ: Signed Bitfield Insert in Zero:
an alias of SBFM.
SBFX: Signed Bitfield Extract:
an alias of SBFM.
SXTB: Signed Extend Byte:
an alias of SBFM.
SXTH: Sign Extend Halfword:
an alias of SBFM.
SXTW: Sign Extend Word:
an alias of SBFM.
SMULL: Signed Multiply Long:
an alias of SMADDL.
SMNEGL: Signed Multiply-Negate Long:
an alias of SMSUBL.
SXTL, SXTL2: Signed extend Long:
an alias of SSHLL, SSHLL2.
NEG (shifted register): Negate (shifted register):
an alias of SUB (shifted register).
CMP (extended register): Compare (extended register):
an alias of SUBS (extended register).
CMP (immediate): Compare (immediate):
an alias of SUBS (immediate).
CMP (shifted register): Compare (shifted register):
an alias of SUBS (shifted register).
NEGS: Negate, setting flags:
an alias of SUBS (shifted register).
AT: Address Translate:
an alias of SYS.
DC: Data Cache operation:
an alias of SYS.
IC: Instruction Cache operation:
an alias of SYS.
TLBI: TLB Invalidate operation:
an alias of SYS.
LSL (immediate): Logical Shift Left (immediate):
an alias of UBFM.
LSR (immediate): Logical Shift Right (immediate):
an alias of UBFM.
UBFIZ: Unsigned Bitfield Insert in Zero:
an alias of UBFM.
UBFX: Unsigned Bitfield Extract:
an alias of UBFM.
UXTB: Unsigned Extend Byte:
an alias of UBFM.
UXTH: Unsigned Extend Halfword:
an alias of UBFM.
UMULL: Unsigned Multiply Long:
an alias of UMADDL.
MOV (to general): Move vector element to general-purpose register:
an alias of UMOV.
UMNEGL: Unsigned Multiply-Negate Long:
an alias of UMSUBL.
UXTL, UXTL2: Unsigned extend Long:
an alias of USHLL, USHLL2.
ANDS (immediate): Bitwise
AND (immediate), setting flags.
AND (immediate): Bitwise
AND (immediate).
AND (immediate): Bitwise AND (immediate).
ANDS (shifted register): Bitwise
AND (shifted register), setting flags.
AND (shifted register): Bitwise
AND (shifted register).
AND (shifted register): Bitwise AND (shifted register).
AND (vector): Bitwise
AND (vector).
AND (vector): Bitwise AND (vector).
TST (immediate): Test bits (immediate): an alias of
ANDS (immediate).
ANDS (immediate): Bitwise AND (immediate), setting flags.
TST (shifted register): Test (shifted register): an alias of
ANDS (shifted register).
ANDS (shifted register): Bitwise AND (shifted register), setting flags.
INS (element): Insert vector element from
another vector element.
MOV (element): Move vector element to
another vector element: an alias of INS (element).
SDOT (vector): Dot Product signed
arithmetic (vector).
UDOT (vector): Dot Product unsigned
arithmetic (vector).
SDOT (by element): Dot Product signed
arithmetic (vector, by element).
UDOT (by element): Dot Product unsigned
arithmetic (vector, by element).
Arithmetic Shift Right (immediate): an alias of SBFM.
Arithmetic Shift Right (register): an alias of ASRV.
ASRV:
Arithmetic Shift Right Variable.
ASR (immediate): Arithmetic Shift Right (immediate): an alias of SBFM.
ASR (register): Arithmetic Shift Right (register): an alias of ASRV.
ASR (register): Arithmetic Shift Right (register): an alias of
ASRV.
ASRV: Arithmetic Shift Right Variable.
BFXIL: Bitfield extract and insert
at low end: an alias of BFM.
AT: Address Translate: an alias of SYS.
Atomic add on byte in memory, without return: an alias of LDADDB, LDADDAB, LDADDALB, LDADDLB.
Atomic add on byte in memory.
Atomic add on halfword in memory, without return: an alias of LDADDH, LDADDAH, LDADDALH, LDADDLH.
Atomic add on halfword in memory.
Atomic add on word or doubleword in memory, without return: an alias of LDADD, LDADDA, LDADDAL, LDADDL.
Atomic add on word or doubleword in memory.
Atomic bit clear on byte in memory, without return: an alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
Atomic bit clear on byte in memory.
Atomic bit clear on halfword in memory, without return: an alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
Atomic bit clear on halfword in memory.
Atomic bit clear on word or doubleword in memory, without return: an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
Atomic bit clear on word or doubleword in memory.
Atomic bit set on byte in memory, without return: an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
Atomic bit set on byte in memory.
Atomic bit set on halfword in memory, without return: an alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
Atomic bit set on halfword in memory.
Atomic bit set on word or doubleword in memory, without return: an alias of LDSET, LDSETA, LDSETAL, LDSETL.
Atomic bit set on word or doubleword in memory.
Atomic exclusive OR on byte in memory, without return: an alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
Atomic exclusive OR on byte in memory.
Atomic exclusive OR on halfword in memory, without return: an alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
Atomic exclusive OR on halfword in memory.
Atomic exclusive OR on word or doubleword in memory, without return: an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
Atomic exclusive OR on word or doubleword in memory.
Atomic signed maximum on byte in memory, without return: an alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
Atomic signed maximum on byte in memory.
Atomic signed maximum on halfword in memory, without return: an alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
Atomic signed maximum on halfword in memory.
Atomic signed maximum on word or doubleword in memory, without return: an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
Atomic signed maximum on word or doubleword in memory.
Atomic signed minimum on byte in memory, without return: an alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
Atomic signed minimum on byte in memory.
Atomic signed minimum on halfword in memory, without return: an alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
Atomic signed minimum on halfword in memory.
Atomic signed minimum on word or doubleword in memory, without return: an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
Atomic signed minimum on word or doubleword in memory.
Atomic unsigned maximum on byte in memory, without return: an alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
Atomic unsigned maximum on byte in memory.
Atomic unsigned maximum on halfword in memory, without return: an alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
Atomic unsigned maximum on halfword in memory.
Atomic unsigned maximum on word or doubleword in memory, without return: an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
Atomic unsigned maximum on word or doubleword in memory.
Atomic unsigned minimum on byte in memory, without return: an alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
Atomic unsigned minimum on byte in memory.
Atomic unsigned minimum on halfword in memory, without return: an alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
Atomic unsigned minimum on halfword in memory.
Atomic unsigned minimum on word or doubleword in memory, without return: an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
Atomic unsigned minimum on word or doubleword in memory.
AUTDA, AUTDZA: Authenticate Data address, using key A.
AUTDB, AUTDZB: Authenticate Data address, using key B.
Authenticate Data address, using key A.
Authenticate Data address, using key B.
Authenticate Instruction address, using key A.
Authenticate Instruction address, using key B.
PACDA, PACDZA: Pointer
Authentication Code for Data address, using key A.
PACDB, PACDZB: Pointer
Authentication Code for Data address, using key B.
Authentication Code for Instruction address, using key A.
Authentication Code for Instruction address, using key B.
PACGA: Pointer
Authentication Code, using Generic key.
XPACD, XPACI, XPACLRI: Strip Pointer
Authentication Code.
BLRAA, BLRAAZ, BLRAB, BLRABZ: Branch with Link to Register, with pointer
authentication.
BRAA, BRAAZ, BRAB, BRABZ: Branch to Register, with pointer
authentication.
ERETAA, ERETAB: Exception Return, with pointer
authentication.
LDRAA, LDRAB: Load Register, with pointer
authentication.
RETAA, RETAB: Return from subroutine, with pointer
authentication.
AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA: Authenticate Instruction address, using key A.
AUTIA1716, AUTIASP, AUTIAZ, AUTIZA: Authenticate Instruction address, using key A.
AUTIASP, AUTIAZ, AUTIZA: Authenticate Instruction address, using key A.
AUTIAZ, AUTIZA: Authenticate Instruction address, using key A.
AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB: Authenticate Instruction address, using key B.
AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB: Authenticate Instruction address, using key B.
AUTIBSP, AUTIBZ, AUTIZB: Authenticate Instruction address, using key B.
AUTIBZ, AUTIZB: Authenticate Instruction address, using key B.
AUTIZA: Authenticate Instruction address, using key A.
AUTIZB: Authenticate Instruction address, using key B.
FCVTAS (scalar): Floating-point Convert to Signed integer, rounding to nearest with ties to
Away (scalar).
FCVTAU (scalar): Floating-point Convert to Unsigned integer, rounding to nearest with ties to
Away (scalar).
FRINTA (scalar): Floating-point Round to Integral, to nearest with ties to
Away (scalar).
FCVTAS (vector): Floating-point Convert to Signed integer, rounding to nearest with ties to
Away (vector).
FCVTAU (vector): Floating-point Convert to Unsigned integer, rounding to nearest with ties to
Away (vector).
FRINTA (vector): Floating-point Round to Integral, to nearest with ties to
Away (vector).
AUTDB, AUTDZB: Authenticate Data address, using key
AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB: Authenticate Instruction address, using key
B.
PACDB, PACDZB: Pointer Authentication Code for Data address, using key
B.
PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB: Pointer Authentication Code for Instruction address, using key
B.
B.cond: Branch conditionally.
B: Branch.
CSDB: Consumption of Speculative Data
Barrier.
DMB: Data Memory
Barrier.
DSB: Data Synchronization
Barrier.
ESB: Error Synchronization
Barrier.
ISB: Instruction Synchronization
Barrier.
PSB CSYNC: Profiling Synchronization
Barrier.
BCAX: Bit Clear and XOR.
MOV (to/from SP): Move
between register and stack pointer: an alias of ADD (immediate).
BFC: Bitfield Clear, leaving other bits unchanged: an alias of BFM.
BFI: Bitfield Insert: an alias of BFM.
BFC: Bitfield Clear, leaving other bits unchanged: an alias of
BFM.
BFI: Bitfield Insert: an alias of
BFM.
BFXIL: Bitfield extract and insert at low end: an alias of
BFM.
BFM: Bitfield Move.
BFXIL: Bitfield extract and insert at low end: an alias of BFM.
BIC (shifted register): Bitwise Bit Clear (shifted register).
BIC (vector, immediate): Bitwise bit Clear (vector, immediate).
BIC (vector, register): Bitwise bit Clear (vector, register).
BICS (shifted register): Bitwise Bit Clear (shifted register), setting flags.
BIF: Bitwise Insert if False.
TBNZ: Test
bit and Branch if Nonzero.
TBZ: Test
bit and Branch if Zero.
BICS (shifted register): Bitwise
Bit Clear (shifted register), setting flags.
BIC (shifted register): Bitwise
Bit Clear (shifted register).
BIC (vector, immediate): Bitwise
bit Clear (vector, immediate).
BIC (vector, register): Bitwise
bit Clear (vector, register).
BCAX:
Bit Clear and XOR.
STCLRB, STCLRLB: Atomic
bit clear on byte in memory, without return: an alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
bit clear on byte in memory.
STCLRH, STCLRLH: Atomic
bit clear on halfword in memory, without return: an alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
bit clear on halfword in memory.
STCLR, STCLRL: Atomic
bit clear on word or doubleword in memory, without return: an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
LDCLR, LDCLRA, LDCLRAL, LDCLRL: Atomic
bit clear on word or doubleword in memory.
RBIT (vector): Reverse
Bit order (vector).
STSETB, STSETLB: Atomic
bit set on byte in memory, without return: an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
bit set on byte in memory.
STSETH, STSETLH: Atomic
bit set on halfword in memory, without return: an alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
bit set on halfword in memory.
STSET, STSETL: Atomic
bit set on word or doubleword in memory, without return: an alias of LDSET, LDSETA, LDSETAL, LDSETL.
LDSET, LDSETA, LDSETAL, LDSETL: Atomic
bit set on word or doubleword in memory.
BIT: Bitwise Insert if True.
BFC:
Bitfield Clear, leaving other bits unchanged: an alias of BFM.
Bitfield extract and insert at low end: an alias of BFM.
SBFX: Signed
Bitfield Extract: an alias of SBFM.
UBFX: Unsigned
Bitfield Extract: an alias of UBFM.
SBFIZ: Signed
Bitfield Insert in Zero: an alias of SBFM.
UBFIZ: Unsigned
Bitfield Insert in Zero: an alias of UBFM.
BFI:
Bitfield Insert: an alias of BFM.
BFM:
Bitfield Move.
SBFM: Signed
Bitfield Move.
UBFM: Unsigned
Bitfield Move.
MOV (bitmask immediate): Move (
bitmask immediate): an alias of ORR (immediate).
bitmask immediate): Move (bitmask immediate): an alias of ORR (immediate).
TST (immediate): Test
bits (immediate): an alias of ANDS (immediate).
CLS (vector): Count Leading Sign
bits (vector).
CLZ (vector): Count Leading Zero
bits (vector).
CMTST: Compare bitwise Test
bits nonzero (vector).
BFC: Bitfield Clear, leaving other
bits unchanged: an alias of BFM.
CLS: Count leading sign
bits.
CLZ: Count leading zero
bits.
RBIT: Reverse
Bits.
Bitwise AND (immediate), setting flags.
Bitwise AND (immediate).
Bitwise AND (shifted register), setting flags.
Bitwise AND (shifted register).
Bitwise AND (vector).
Bitwise Bit Clear (shifted register), setting flags.
Bitwise Bit Clear (shifted register).
Bitwise bit Clear (vector, immediate).
Bitwise bit Clear (vector, register).
CMEQ (register): Compare
bitwise Equal (vector).
CMEQ (zero): Compare
bitwise Equal to zero (vector).
Bitwise Exclusive OR (immediate).
Bitwise Exclusive OR (shifted register).
Bitwise Exclusive OR (vector).
Bitwise Exclusive OR NOT (shifted register).
Bitwise inclusive OR (vector, immediate).
Bitwise inclusive OR (vector, register).
Bitwise inclusive OR NOT (vector).
BIF:
Bitwise Insert if False.
BIT:
Bitwise Insert if True.
NOT:
Bitwise NOT (vector).
MVN:
Bitwise NOT (vector): an alias of NOT.
MVN:
Bitwise NOT: an alias of ORN (shifted register).
Bitwise OR (immediate).
Bitwise OR (shifted register).
Bitwise OR NOT (shifted register).
BSL:
Bitwise Select.
CMTST: Compare
bitwise Test bits nonzero (vector).
BL: Branch with Link.
BLR: Branch with Link to Register.
BLRAA, BLRAAZ, BLRAB, BLRABZ: Branch with Link to Register, with pointer authentication.
BLRAAZ, BLRAB, BLRABZ: Branch with Link to Register, with pointer authentication.
BLRAB, BLRABZ: Branch with Link to Register, with pointer authentication.
BLRABZ: Branch with Link to Register, with pointer authentication.
BR: Branch to Register.
BRAA, BRAAZ, BRAB, BRABZ: Branch to Register, with pointer authentication.
BRAAZ, BRAB, BRABZ: Branch to Register, with pointer authentication.
BRAB, BRABZ: Branch to Register, with pointer authentication.
BRABZ: Branch to Register, with pointer authentication.
Branch conditionally.
TBNZ: Test bit and
Branch if Nonzero.
TBZ: Test bit and
Branch if Zero.
CBNZ: Compare and
Branch on Nonzero.
CBZ: Compare and
Branch on Zero.
Branch to Register, with pointer authentication.
BR:
Branch to Register.
Branch with Link to Register, with pointer authentication.
BLR:
Branch with Link to Register.
BL:
Branch with Link.
B:
Branch.
BRK:
Breakpoint instruction.
BRK: Breakpoint instruction.
BSL: Bitwise Select.
LDRB (immediate): Load Register
Byte (immediate).
LDRSB (immediate): Load Register Signed
Byte (immediate).
STRB (immediate): Store Register
Byte (immediate).
LDRB (register): Load Register
Byte (register).
LDRSB (register): Load Register Signed
Byte (register).
STRB (register): Store Register
Byte (register).
LDTRB: Load Register
Byte (unprivileged).
LDTRSB: Load Register Signed
Byte (unprivileged).
STTRB: Store Register
Byte (unprivileged).
LDURB: Load Register
Byte (unscaled).
LDURSB: Load Register Signed
Byte (unscaled).
STURB: Store Register
Byte (unscaled).
STADDB, STADDLB: Atomic add on
byte in memory, without return: an alias of LDADDB, LDADDAB, LDADDALB, LDADDLB.
STCLRB, STCLRLB: Atomic bit clear on
byte in memory, without return: an alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
STEORB, STEORLB: Atomic exclusive OR on
byte in memory, without return: an alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
STSETB, STSETLB: Atomic bit set on
byte in memory, without return: an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
STSMAXB, STSMAXLB: Atomic signed maximum on
byte in memory, without return: an alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
STSMINB, STSMINLB: Atomic signed minimum on
byte in memory, without return: an alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
STUMAXB, STUMAXLB: Atomic unsigned maximum on
byte in memory, without return: an alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
STUMINB, STUMINLB: Atomic unsigned minimum on
byte in memory, without return: an alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
CASB, CASAB, CASALB, CASLB: Compare and Swap
byte in memory.
LDADDB, LDADDAB, LDADDALB, LDADDLB: Atomic add on
byte in memory.
LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB: Atomic bit clear on
byte in memory.
LDEORB, LDEORAB, LDEORALB, LDEORLB: Atomic exclusive OR on
byte in memory.
LDSETB, LDSETAB, LDSETALB, LDSETLB: Atomic bit set on
byte in memory.
LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB: Atomic signed maximum on
byte in memory.
LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB: Atomic signed minimum on
byte in memory.
LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB: Atomic unsigned maximum on
byte in memory.
LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB: Atomic unsigned minimum on
byte in memory.
byte in memory.
CNT: Population Count per
byte.
LDAPRB: Load-Acquire RCpc Register
Byte.
LDARB: Load-Acquire Register
Byte.
LDAXRB: Load-Acquire Exclusive Register
Byte.
LDLARB: Load LOAcquire Register
Byte.
LDXRB: Load Exclusive Register
Byte.
STLLRB: Store LORelease Register
Byte.
STLRB: Store-Release Register
Byte.
STLXRB: Store-Release Exclusive Register
Byte.
STXRB: Store Exclusive Register
Byte.
SXTB: Signed Extend
Byte: an alias of SBFM.
UXTB: Unsigned Extend
Byte: an alias of UBFM.
REV16: Reverse
bytes in 16-bit halfwords.
REV32: Reverse
bytes in 32-bit words.
REV: Reverse
Bytes.
REV64: Reverse
Bytes: an alias of REV.
IC: Instruction
Cache operation: an alias of SYS.
HVC: Hypervisor
Call.
SMC: Secure Monitor
Call.
SVC: Supervisor
Call.
ADCS: Add with
Carry, setting flags.
SBCS: Subtract with
Carry, setting flags.
NGCS: Negate with
Carry, setting flags: an alias of SBCS.
ADC: Add with
Carry.
SBC: Subtract with
Carry.
NGC: Negate with
Carry: an alias of SBC.
CAS, CASA, CASAL, CASL: Compare and Swap word or doubleword in memory.
CASA, CASAL, CASL: Compare and Swap word or doubleword in memory.
CASAB, CASALB, CASLB: Compare and Swap byte in memory.
CASAH, CASALH, CASLH: Compare and Swap halfword in memory.
CASAL, CASL: Compare and Swap word or doubleword in memory.
CASALB, CASLB: Compare and Swap byte in memory.
CASALH, CASLH: Compare and Swap halfword in memory.
CASB, CASAB, CASALB, CASLB: Compare and Swap byte in memory.
CASH, CASAH, CASALH, CASLH: Compare and Swap halfword in memory.
CASL: Compare and Swap word or doubleword in memory.
CASLB: Compare and Swap byte in memory.
CASLH: Compare and Swap halfword in memory.
CASP, CASPA, CASPAL, CASPL: Compare and Swap Pair of words or doublewords in memory.
CASPA, CASPAL, CASPL: Compare and Swap Pair of words or doublewords in memory.
CASPAL, CASPL: Compare and Swap Pair of words or doublewords in memory.
CASPL: Compare and Swap Pair of words or doublewords in memory.
CBNZ: Compare and Branch on Nonzero.
CBZ: Compare and Branch on Zero.
CCMN (immediate): Conditional Compare Negative (immediate).
CCMN (register): Conditional Compare Negative (register).
CCMP (immediate): Conditional Compare (immediate).
CCMP (register): Conditional Compare (register).
DCPS1: Debug
Change PE State to EL1..
DCPS2: Debug
Change PE State to EL2..
DCPS3: Debug
Change PE State to EL3.
checksum.
checksum.
SHA1C: SHA1 hash update (
choose).
CINC: Conditional Increment: an alias of CSINC.
CINV: Conditional Invert: an alias of CSINV.
BICS (shifted register): Bitwise Bit
Clear (shifted register), setting flags.
BIC (shifted register): Bitwise Bit
Clear (shifted register).
BIC (vector, immediate): Bitwise bit
Clear (vector, immediate).
BIC (vector, register): Bitwise bit
Clear (vector, register).
BCAX: Bit
Clear and XOR.
Clear Exclusive.
STCLRB, STCLRLB: Atomic bit
clear on byte in memory, without return: an alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB: Atomic bit
clear on byte in memory.
STCLRH, STCLRLH: Atomic bit
clear on halfword in memory, without return: an alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH: Atomic bit
clear on halfword in memory.
STCLR, STCLRL: Atomic bit
clear on word or doubleword in memory, without return: an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
LDCLR, LDCLRA, LDCLRAL, LDCLRL: Atomic bit
clear on word or doubleword in memory.
BFC: Bitfield
Clear, leaving other bits unchanged: an alias of BFM.
CLREX: Clear Exclusive.
CLS (vector): Count Leading Sign bits (vector).
CLS: Count leading sign bits.
CLZ (vector): Count Leading Zero bits (vector).
CLZ: Count leading zero bits.
CMEQ (register): Compare bitwise Equal (vector).
CMEQ (zero): Compare bitwise Equal to zero (vector).
CMGE (register): Compare signed Greater than or Equal (vector).
CMGE (zero): Compare signed Greater than or Equal to zero (vector).
CMGT (register): Compare signed Greater than (vector).
CMGT (zero): Compare signed Greater than zero (vector).
CMHI (register): Compare unsigned Higher (vector).
CMHS (register): Compare unsigned Higher or Same (vector).
CMLE (zero): Compare signed Less than or Equal to zero (vector).
CMLT (zero): Compare signed Less than zero (vector).
CMN (extended register): Compare Negative (extended register): an alias of ADDS (extended register).
CMN (immediate): Compare Negative (immediate): an alias of ADDS (immediate).
CMN (shifted register): Compare Negative (shifted register): an alias of ADDS (shifted register).
CMP (extended register): Compare (extended register): an alias of SUBS (extended register).
CMP (immediate): Compare (immediate): an alias of SUBS (immediate).
CMP (shifted register): Compare (shifted register): an alias of SUBS (shifted register).
CMTST: Compare bitwise Test bits nonzero (vector).
CNEG: Conditional Negate: an alias of CSNEG.
CNT: Population Count per byte.
PACDA, PACDZA: Pointer Authentication
Code for Data address, using key A.
PACDB, PACDZB: Pointer Authentication
Code for Data address, using key B.
PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA: Pointer Authentication
Code for Instruction address, using key A.
PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB: Pointer Authentication
Code for Instruction address, using key B.
PACGA: Pointer Authentication
Code, using Generic key.
XPACD, XPACI, XPACLRI: Strip Pointer Authentication
Code.
AESIMC: AES inverse mix
columns.
AESMC: AES mix
columns.
Compare (extended register): an alias of SUBS (extended register).
CCMP (immediate): Conditional
Compare (immediate).
Compare (immediate): an alias of SUBS (immediate).
CCMP (register): Conditional
Compare (register).
FCCMP: Floating-point Conditional quiet
Compare (scalar).
FCCMPE: Floating-point Conditional signaling
Compare (scalar).
FCMP: Floating-point quiet
Compare (scalar).
FCMPE: Floating-point signaling
Compare (scalar).
Compare (shifted register): an alias of SUBS (shifted register).
CBNZ:
Compare and Branch on Nonzero.
CBZ:
Compare and Branch on Zero.
Compare and Swap byte in memory.
Compare and Swap halfword in memory.
Compare and Swap Pair of words or doublewords in memory.
Compare and Swap word or doubleword in memory.
Compare bitwise Equal (vector).
Compare bitwise Equal to zero (vector).
Compare bitwise Test bits nonzero (vector).
FCMEQ (register): Floating-point
Compare Equal (vector).
FCMEQ (zero): Floating-point
Compare Equal to zero (vector).
FACGT: Floating-point Absolute
Compare Greater than (vector).
FCMGT (register): Floating-point
Compare Greater than (vector).
FACGE: Floating-point Absolute
Compare Greater than or Equal (vector).
FCMGE (register): Floating-point
Compare Greater than or Equal (vector).
FCMGE (zero): Floating-point
Compare Greater than or Equal to zero (vector).
FCMGT (zero): Floating-point
Compare Greater than zero (vector).
FCMLE (zero): Floating-point
Compare Less than or Equal to zero (vector).
FCMLT (zero): Floating-point
Compare Less than zero (vector).
Compare Negative (extended register): an alias of ADDS (extended register).
CCMN (immediate): Conditional
Compare Negative (immediate).
Compare Negative (immediate): an alias of ADDS (immediate).
CCMN (register): Conditional
Compare Negative (register).
Compare Negative (shifted register): an alias of ADDS (shifted register).
Compare signed Greater than (vector).
Compare signed Greater than or Equal (vector).
Compare signed Greater than or Equal to zero (vector).
Compare signed Greater than zero (vector).
Compare signed Less than or Equal to zero (vector).
Compare signed Less than zero (vector).
Compare unsigned Higher (vector).
Compare unsigned Higher or Same (vector).
FCADD: Floating-point
Complex Add.
FCMLA (by element): Floating-point
Complex Multiply Accumulate (by element).
FCMLA: Floating-point
Complex Multiply Accumulate.
Conditional Compare (immediate).
Conditional Compare (register).
Conditional Compare Negative (immediate).
Conditional Compare Negative (register).
CINC:
Conditional Increment: an alias of CSINC.
CINV:
Conditional Invert: an alias of CSINV.
CNEG:
Conditional Negate: an alias of CSNEG.
FCCMP: Floating-point
Conditional quiet Compare (scalar).
FCSEL: Floating-point
Conditional Select (scalar).
Conditional Select Increment.
Conditional Select Invert.
Conditional Select Negation.
CSEL:
Conditional Select.
Conditional Set Mask: an alias of CSINV.
CSET:
Conditional Set: an alias of CSINC.
FCCMPE: Floating-point
Conditional signaling Compare (scalar).
B.cond: Branch
conditionally.
CSDB:
Consumption of Speculative Data Barrier.
FMOV (general): Floating-point Move to or from general-purpose register without
conversion.
FMOV (register): Floating-point Move register without
conversion.
FCVT: Floating-point
Convert precision (scalar).
SCVTF (scalar, fixed-point): Signed fixed-point
Convert to Floating-point (scalar).
SCVTF (scalar, integer): Signed integer
Convert to Floating-point (scalar).
UCVTF (scalar, fixed-point): Unsigned fixed-point
Convert to Floating-point (scalar).
UCVTF (scalar, integer): Unsigned integer
Convert to Floating-point (scalar).
SCVTF (vector, fixed-point): Signed fixed-point
Convert to Floating-point (vector).
SCVTF (vector, integer): Signed integer
Convert to Floating-point (vector).
UCVTF (vector, fixed-point): Unsigned fixed-point
Convert to Floating-point (vector).
UCVTF (vector, integer): Unsigned integer
Convert to Floating-point (vector).
FCVTL, FCVTL2: Floating-point
Convert to higher precision Long (vector).
FCVTN, FCVTN2: Floating-point
Convert to lower precision Narrow (vector).
FCVTXN, FCVTXN2: Floating-point
Convert to lower precision Narrow, rounding to odd (vector).
FCVTZS (scalar, fixed-point): Floating-point
Convert to Signed fixed-point, rounding toward Zero (scalar).
FCVTZS (vector, fixed-point): Floating-point
Convert to Signed fixed-point, rounding toward Zero (vector).
FJCVTZS: Floating-point Javascript
Convert to Signed fixed-point, rounding toward Zero.
FCVTAS (scalar): Floating-point
Convert to Signed integer, rounding to nearest with ties to Away (scalar).
FCVTAS (vector): Floating-point
Convert to Signed integer, rounding to nearest with ties to Away (vector).
FCVTNS (scalar): Floating-point
Convert to Signed integer, rounding to nearest with ties to even (scalar).
FCVTNS (vector): Floating-point
Convert to Signed integer, rounding to nearest with ties to even (vector).
FCVTMS (scalar): Floating-point
Convert to Signed integer, rounding toward Minus infinity (scalar).
FCVTMS (vector): Floating-point
Convert to Signed integer, rounding toward Minus infinity (vector).
FCVTPS (scalar): Floating-point
Convert to Signed integer, rounding toward Plus infinity (scalar).
FCVTPS (vector): Floating-point
Convert to Signed integer, rounding toward Plus infinity (vector).
FCVTZS (scalar, integer): Floating-point
Convert to Signed integer, rounding toward Zero (scalar).
FCVTZS (vector, integer): Floating-point
Convert to Signed integer, rounding toward Zero (vector).
FCVTZU (scalar, fixed-point): Floating-point
Convert to Unsigned fixed-point, rounding toward Zero (scalar).
FCVTZU (vector, fixed-point): Floating-point
Convert to Unsigned fixed-point, rounding toward Zero (vector).
FCVTAU (scalar): Floating-point
Convert to Unsigned integer, rounding to nearest with ties to Away (scalar).
FCVTAU (vector): Floating-point
Convert to Unsigned integer, rounding to nearest with ties to Away (vector).
FCVTNU (scalar): Floating-point
Convert to Unsigned integer, rounding to nearest with ties to even (scalar).
FCVTNU (vector): Floating-point
Convert to Unsigned integer, rounding to nearest with ties to even (vector).
FCVTMU (scalar): Floating-point
Convert to Unsigned integer, rounding toward Minus infinity (scalar).
FCVTMU (vector): Floating-point
Convert to Unsigned integer, rounding toward Minus infinity (vector).
FCVTPU (scalar): Floating-point
Convert to Unsigned integer, rounding toward Plus infinity (scalar).
FCVTPU (vector): Floating-point
Convert to Unsigned integer, rounding toward Plus infinity (vector).
FCVTZU (scalar, integer): Floating-point
Convert to Unsigned integer, rounding toward Zero (scalar).
FCVTZU (vector, integer): Floating-point
Convert to Unsigned integer, rounding toward Zero (vector).
Count Leading Sign bits (vector).
CLS:
Count leading sign bits.
Count Leading Zero bits (vector).
CLZ:
Count leading zero bits.
CNT: Population
Count per byte.
LDAPRB: Load-Acquire R
Cpc Register Byte.
LDAPRH: Load-Acquire R
Cpc Register Halfword.
LDAPR: Load-Acquire R
Cpc Register.
CRC32 checksum.
CRC32B, CRC32H, CRC32W, CRC32X: CRC32 checksum.
CRC32C checksum.
CRC32CB, CRC32CH, CRC32CW, CRC32CX: CRC32C checksum.
CRC32CH, CRC32CW, CRC32CX: CRC32C checksum.
CRC32CW, CRC32CX: CRC32C checksum.
CRC32CX: CRC32C checksum.
CRC32H, CRC32W, CRC32X: CRC32 checksum.
CRC32W, CRC32X: CRC32 checksum.
CRC32X: CRC32 checksum.
CSDB: Consumption of Speculative Data Barrier.
CSEL: Conditional Select.
CSET: Conditional Set: an alias of CSINC.
CSETM: Conditional Set Mask: an alias of CSINV.
CINC: Conditional Increment: an alias of
CSINC.
CSET: Conditional Set: an alias of
CSINC.
CSINC: Conditional Select Increment.
CINV: Conditional Invert: an alias of
CSINV.
CSETM: Conditional Set Mask: an alias of
CSINV.
CSINV: Conditional Select Invert.
CNEG: Conditional Negate: an alias of
CSNEG.
CSNEG: Conditional Select Negation.
FRINTI (scalar): Floating-point Round to Integral, using
current rounding mode (scalar).
FRINTX (scalar): Floating-point Round to Integral exact, using
current rounding mode (scalar).
FRINTI (vector): Floating-point Round to Integral, using
current rounding mode (vector).
FRINTX (vector): Floating-point Round to Integral exact, using
current rounding mode (vector).
AUTDA, AUTDZA: Authenticate
PACDA, PACDZA: Pointer Authentication Code for
Data address, using key A.
AUTDB, AUTDZB: Authenticate
Data address, using key B.
PACDB, PACDZB: Pointer Authentication Code for
Data address, using key B.
CSDB: Consumption of Speculative
Data Barrier.
DC:
Data Cache operation: an alias of SYS.
DMB:
Data Memory Barrier.
DSB:
Data Synchronization Barrier.
DC: Data Cache operation: an alias of SYS.
DCPS1: Debug Change PE State to EL1..
DCPS2: Debug Change PE State to EL2..
DCPS3: Debug Change PE State to EL3.
Debug Change PE State to EL1..
Debug Change PE State to EL2..
Debug Change PE State to EL3.
DRPS:
Debug restore process state.
AESD: AES single round
decryption.
FABD: Floating-point Absolute
Difference (vector).
UABD: Unsigned Absolute
Difference (vector).
SABAL, SABAL2: Signed Absolute
difference and Accumulate Long.
UABAL, UABAL2: Unsigned Absolute
difference and Accumulate Long.
SABA: Signed Absolute
difference and Accumulate.
UABA: Unsigned Absolute
difference and Accumulate.
SABDL, SABDL2: Signed Absolute
Difference Long.
UABDL, UABDL2: Unsigned Absolute
Difference Long.
SABD: Signed Absolute
Difference.
FDIV (scalar): Floating-point
Divide (scalar).
FDIV (vector): Floating-point
Divide (vector).
SDIV: Signed
Divide.
UDIV: Unsigned
Divide.
DMB: Data Memory Barrier.
Dot Product signed arithmetic (vector).
Dot Product signed arithmetic (vector, by element).
Dot Product unsigned arithmetic (vector).
Dot Product unsigned arithmetic (vector, by element).
STADD, STADDL: Atomic add on word or
doubleword in memory, without return: an alias of LDADD, LDADDA, LDADDAL, LDADDL.
STCLR, STCLRL: Atomic bit clear on word or
doubleword in memory, without return: an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
STEOR, STEORL: Atomic exclusive OR on word or
doubleword in memory, without return: an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
STSET, STSETL: Atomic bit set on word or
doubleword in memory, without return: an alias of LDSET, LDSETA, LDSETAL, LDSETL.
STSMAX, STSMAXL: Atomic signed maximum on word or
doubleword in memory, without return: an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
STSMIN, STSMINL: Atomic signed minimum on word or
doubleword in memory, without return: an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
STUMAX, STUMAXL: Atomic unsigned maximum on word or
doubleword in memory, without return: an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
STUMIN, STUMINL: Atomic unsigned minimum on word or
doubleword in memory, without return: an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
CAS, CASA, CASAL, CASL: Compare and Swap word or
doubleword in memory.
LDADD, LDADDA, LDADDAL, LDADDL: Atomic add on word or
doubleword in memory.
LDCLR, LDCLRA, LDCLRAL, LDCLRL: Atomic bit clear on word or
doubleword in memory.
LDEOR, LDEORA, LDEORAL, LDEORL: Atomic exclusive OR on word or
doubleword in memory.
LDSET, LDSETA, LDSETAL, LDSETL: Atomic bit set on word or
doubleword in memory.
LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL: Atomic signed maximum on word or
doubleword in memory.
LDSMIN, LDSMINA, LDSMINAL, LDSMINL: Atomic signed minimum on word or
doubleword in memory.
LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL: Atomic unsigned maximum on word or
doubleword in memory.
LDUMIN, LDUMINA, LDUMINAL, LDUMINL: Atomic unsigned minimum on word or
doubleword in memory.
SWP, SWPA, SWPAL, SWPL: Swap word or
doubleword in memory.
REV64: Reverse elements in 64-bit
doublewords (vector).
CASP, CASPA, CASPAL, CASPL: Compare and Swap Pair of words or
doublewords in memory.
SQRDMLAH (by element): Signed Saturating Rounding
Doubling Multiply Accumulate returning High Half (by element).
SQRDMLAH (vector): Signed Saturating Rounding
Doubling Multiply Accumulate returning High Half (vector).
SQDMULL, SQDMULL2 (by element): Signed saturating
Doubling Multiply Long (by element).
SQDMULL, SQDMULL2 (vector): Signed saturating
Doubling Multiply Long.
SQDMULH (by element): Signed saturating
Doubling Multiply returning High half (by element).
SQRDMULH (by element): Signed saturating Rounding
Doubling Multiply returning High half (by element).
SQDMULH (vector): Signed saturating
Doubling Multiply returning High half.
SQRDMULH (vector): Signed saturating Rounding
Doubling Multiply returning High half.
SQRDMLSH (by element): Signed Saturating Rounding
Doubling Multiply Subtract returning High Half (by element).
SQRDMLSH (vector): Signed Saturating Rounding
Doubling Multiply Subtract returning High Half (vector).
SQDMLAL, SQDMLAL2 (by element): Signed saturating
Doubling Multiply-Add Long (by element).
SQDMLAL, SQDMLAL2 (vector): Signed saturating
Doubling Multiply-Add Long.
SQDMLSL, SQDMLSL2 (by element): Signed saturating
Doubling Multiply-Subtract Long (by element).
SQDMLSL, SQDMLSL2 (vector): Signed saturating
Doubling Multiply-Subtract Long.
DRPS: Debug restore process state.
DSB: Data Synchronization Barrier.
MOV (scalar): Move vector element to scalar: an alias of
DUP (element).
DUP (element): Duplicate vector element to vector or scalar.
DUP (general): Duplicate general-purpose register to vector.
Duplicate general-purpose register to vector.
Duplicate vector element to vector or scalar.
DCPS2: Debug Change PE State to
EL2..
DCPS3: Debug Change PE State to
EL3.
INS (element): Insert vector
element from another vector element.
INS (general): Insert vector
element from general-purpose register.
SHLL, SHLL2: Shift Left Long (by
element size).
LD1R: Load one single-
element structure and Replicate to all lanes (of one register).
ST1 (single structure): Store a single-
element structure from one lane of one register.
LD1 (single structure): Load one single-
element structure to one lane of one register.
ST1 (multiple structures): Store multiple single-
element structures from one, two, three, or four registers.
LD1 (multiple structures): Load multiple single-
element structures to one, two, three, or four registers.
MOV (element): Move vector
element to another vector element: an alias of INS (element).
SMOV: Signed Move vector
element to general-purpose register.
UMOV: Unsigned Move vector
element to general-purpose register.
MOV (to general): Move vector
element to general-purpose register: an alias of UMOV.
MOV (scalar): Move vector
element to scalar: an alias of DUP (element).
DUP (element): Duplicate vector
element to vector or scalar.
FCMLA (by element): Floating-point Complex Multiply Accumulate (by
element).
FMLA (by element): Floating-point fused Multiply-Add to accumulator (by
element).
FMLAL, FMLAL2 (by element): Floating-point fused Multiply-Add Long to accumulator (by
element).
FMLS (by element): Floating-point fused Multiply-Subtract from accumulator (by
element).
FMLSL, FMLSL2 (by element): Floating-point fused Multiply-Subtract Long from accumulator (by
element).
FMUL (by element): Floating-point Multiply (by
element).
FMULX (by element): Floating-point Multiply extended (by
element).
MLA (by element): Multiply-Add to accumulator (vector, by
element).
MLS (by element): Multiply-Subtract from accumulator (vector, by
element).
MOV (element): Move vector element to another vector element: an alias of INS (
element).
MOV (scalar): Move vector element to scalar: an alias of DUP (
element).
MUL (by element): Multiply (vector, by
element).
SDOT (by element): Dot Product signed arithmetic (vector, by
element).
SMLAL, SMLAL2 (by element): Signed Multiply-Add Long (vector, by
element).
SMLSL, SMLSL2 (by element): Signed Multiply-Subtract Long (vector, by
element).
SMULL, SMULL2 (by element): Signed Multiply Long (vector, by
element).
SQDMLAL, SQDMLAL2 (by element): Signed saturating Doubling Multiply-Add Long (by
element).
SQDMLSL, SQDMLSL2 (by element): Signed saturating Doubling Multiply-Subtract Long (by
element).
SQDMULH (by element): Signed saturating Doubling Multiply returning High half (by
element).
SQDMULL, SQDMULL2 (by element): Signed saturating Doubling Multiply Long (by
element).
SQRDMLAH (by element): Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (by
element).
SQRDMLSH (by element): Signed Saturating Rounding Doubling Multiply Subtract returning High Half (by
element).
SQRDMULH (by element): Signed saturating Rounding Doubling Multiply returning High half (by
element).
UDOT (by element): Dot Product unsigned arithmetic (vector, by
element).
UMLAL, UMLAL2 (by element): Unsigned Multiply-Add Long (vector, by
element).
UMLSL, UMLSL2 (by element): Unsigned Multiply-Subtract Long (vector, by
element).
UMULL, UMULL2 (by element): Unsigned Multiply Long (vector, by
element).
element): Floating-point fused Multiply-Add Long to accumulator (by element).
element): Floating-point fused Multiply-Subtract Long from accumulator (by element).
element): Signed Multiply Long (vector, by element).
element): Signed Multiply-Add Long (vector, by element).
element): Signed Multiply-Subtract Long (vector, by element).
element): Signed saturating Doubling Multiply Long (by element).
element): Signed saturating Doubling Multiply returning High half (by element).
element): Signed saturating Doubling Multiply-Add Long (by element).
element): Signed saturating Doubling Multiply-Subtract Long (by element).
element): Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (by element).
element): Signed saturating Rounding Doubling Multiply returning High half (by element).
element): Signed Saturating Rounding Doubling Multiply Subtract returning High Half (by element).
element): Unsigned Multiply Long (vector, by element).
element): Unsigned Multiply-Add Long (vector, by element).
element): Unsigned Multiply-Subtract Long (vector, by element).
INS (element): Insert vector element from another vector
element.
MOV (element): Move vector element to another vector
element: an alias of INS (element).
MOV (from general): Move general-purpose register to a vector
element: an alias of INS (general).
ADDP (scalar): Add Pair of
elements (scalar).
FADDP (scalar): Floating-point Add Pair of
elements (scalar).
FMAXNMP (scalar): Floating-point Maximum Number of Pair of
elements (scalar).
FMAXP (scalar): Floating-point Maximum of Pair of
elements (scalar).
FMINNMP (scalar): Floating-point Minimum Number of Pair of
elements (scalar).
FMINP (scalar): Floating-point Minimum of Pair of
elements (scalar).
REV16 (vector): Reverse
elements in 16-bit halfwords (vector).
REV32 (vector): Reverse
elements in 32-bit words (vector).
REV64: Reverse
elements in 64-bit doublewords (vector).
SM4E: SM4
Encode.
AESE: AES single round
encryption.
BFXIL: Bitfield extract and insert at low
end: an alias of BFM.
EON (shifted register): Bitwise Exclusive OR NOT (shifted register).
EOR (immediate): Bitwise Exclusive OR (immediate).
EOR (shifted register): Bitwise Exclusive OR (shifted register).
EOR (vector): Bitwise Exclusive OR (vector).
EOR3: Three-way Exclusive OR.
CMEQ (register): Compare bitwise
Equal (vector).
CMGE (register): Compare signed Greater than or
Equal (vector).
FACGE: Floating-point Absolute Compare Greater than or
Equal (vector).
FCMEQ (register): Floating-point Compare
Equal (vector).
FCMGE (register): Floating-point Compare Greater than or
Equal (vector).
CMEQ (zero): Compare bitwise
Equal to zero (vector).
CMGE (zero): Compare signed Greater than or
Equal to zero (vector).
CMLE (zero): Compare signed Less than or
Equal to zero (vector).
FCMEQ (zero): Floating-point Compare
Equal to zero (vector).
FCMGE (zero): Floating-point Compare Greater than or
Equal to zero (vector).
FCMLE (zero): Floating-point Compare Less than or
Equal to zero (vector).
ERET: Exception Return.
ERETAA, ERETAB: Exception Return, with pointer authentication.
ESB:
Error Synchronization Barrier.
ESB: Error Synchronization Barrier.
FRECPE: Floating-point Reciprocal
Estimate.
FRSQRTE: Floating-point Reciprocal Square Root
Estimate.
URECPE: Unsigned Reciprocal
Estimate.
URSQRTE: Unsigned Reciprocal Square Root
Estimate.
FCVTNS (scalar): Floating-point Convert to Signed integer, rounding to nearest with ties to
even (scalar).
FCVTNU (scalar): Floating-point Convert to Unsigned integer, rounding to nearest with ties to
even (scalar).
FRINTN (scalar): Floating-point Round to Integral, to nearest with ties to
even (scalar).
FCVTNS (vector): Floating-point Convert to Signed integer, rounding to nearest with ties to
even (vector).
FCVTNU (vector): Floating-point Convert to Unsigned integer, rounding to nearest with ties to
even (vector).
FRINTN (vector): Floating-point Round to Integral, to nearest with ties to
even (vector).
SEVL: Send
Event Local.
SEV: Send
Event.
WFE: Wait For
Event.
FRINTX (scalar): Floating-point Round to Integral
exact, using current rounding mode (scalar).
FRINTX (vector): Floating-point Round to Integral
exact, using current rounding mode (vector).
Exception Return, with pointer authentication.
ERET:
Exception Return.
EOR (immediate): Bitwise
Exclusive OR (immediate).
EOR (shifted register): Bitwise
Exclusive OR (shifted register).
EOR (vector): Bitwise
Exclusive OR (vector).
XAR:
Exclusive OR and Rotate.
EON (shifted register): Bitwise
Exclusive OR NOT (shifted register).
STEORB, STEORLB: Atomic
exclusive OR on byte in memory, without return: an alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
exclusive OR on byte in memory.
STEORH, STEORLH: Atomic
exclusive OR on halfword in memory, without return: an alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
exclusive OR on halfword in memory.
STEOR, STEORL: Atomic
exclusive OR on word or doubleword in memory, without return: an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
LDEOR, LDEORA, LDEORAL, LDEORL: Atomic
exclusive OR on word or doubleword in memory.
EOR3: Three-way
Exclusive OR.
RAX1: Rotate and
Exclusive OR.
LDAXP: Load-Acquire
Exclusive Pair of Registers.
LDXP: Load
Exclusive Pair of Registers.
STLXP: Store-Release
Exclusive Pair of registers.
STXP: Store
Exclusive Pair of registers.
LDAXRB: Load-Acquire
Exclusive Register Byte.
LDXRB: Load
Exclusive Register Byte.
STLXRB: Store-Release
Exclusive Register Byte.
STXRB: Store
Exclusive Register Byte.
LDAXRH: Load-Acquire
Exclusive Register Halfword.
LDXRH: Load
Exclusive Register Halfword.
STLXRH: Store-Release
Exclusive Register Halfword.
STXRH: Store
Exclusive Register Halfword.
LDAXR: Load-Acquire
Exclusive Register.
LDXR: Load
Exclusive Register.
STLXR: Store-Release
Exclusive Register.
STXR: Store
Exclusive Register.
CLREX: Clear
Exclusive.
FRECPX: Floating-point Reciprocal
exponent (scalar).
EXT: Extract vector from pair of vectors.
SXTB: Signed
Extend Byte: an alias of SBFM.
UXTB: Unsigned
Extend Byte: an alias of UBFM.
SXTH: Sign
Extend Halfword: an alias of SBFM.
UXTH: Unsigned
Extend Halfword: an alias of UBFM.
SXTL, SXTL2: Signed
extend Long: an alias of SSHLL, SSHLL2.
UXTL, UXTL2: Unsigned
extend Long: an alias of USHLL, USHLL2.
SXTW: Sign
Extend Word: an alias of SBFM.
FMULX (by element): Floating-point Multiply
extended (by element).
ADDS (extended register): Add (
extended register), setting flags.
SUBS (extended register): Subtract (
extended register), setting flags.
ADD (extended register): Add (
extended register).
CMN (extended register): Compare Negative (extended register): an alias of ADDS (
extended register).
CMP (extended register): Compare (extended register): an alias of SUBS (
extended register).
SUB (extended register): Subtract (
extended register).
extended register): Add (extended register), setting flags.
extended register): Add (extended register).
CMN (extended register): Compare Negative (
extended register): an alias of ADDS (extended register).
CMP (extended register): Compare (
extended register): an alias of SUBS (extended register).
extended register): Compare (extended register): an alias of SUBS (extended register).
extended register): Compare Negative (extended register): an alias of ADDS (extended register).
extended register): Subtract (extended register), setting flags.
extended register): Subtract (extended register).
FMULX: Floating-point Multiply
extended.
TBX: Table vector lookup
extension.
ROR (immediate): Rotate right (immediate): an alias of
EXTR.
EXTR: Extract register.
BFXIL: Bitfield
extract and insert at low end: an alias of BFM.
SQXTN, SQXTN2: Signed saturating
extract Narrow.
UQXTN, UQXTN2: Unsigned saturating
extract Narrow.
Extract Narrow.
EXTR:
Extract register.
SQXTUN, SQXTUN2: Signed saturating
extract Unsigned Narrow.
EXT:
Extract vector from pair of vectors.
SBFX: Signed Bitfield
Extract: an alias of SBFM.
UBFX: Unsigned Bitfield
Extract: an alias of UBFM.
FABS (scalar): Floating-point Absolute value (scalar).
FABS (vector): Floating-point Absolute value (vector).
FACGE: Floating-point Absolute Compare Greater than or Equal (vector).
FACGT: Floating-point Absolute Compare Greater than (vector).
FADD (scalar): Floating-point Add (scalar).
FADD (vector): Floating-point Add (vector).
FADDP (scalar): Floating-point Add Pair of elements (scalar).
FADDP (vector): Floating-point Add Pairwise (vector).
BIF: Bitwise Insert if
False.
FCADD: Floating-point Complex Add.
FCCMP: Floating-point Conditional quiet Compare (scalar).
FCCMPE: Floating-point Conditional signaling Compare (scalar).
FCMEQ (register): Floating-point Compare Equal (vector).
FCMEQ (zero): Floating-point Compare Equal to zero (vector).
FCMGE (register): Floating-point Compare Greater than or Equal (vector).
FCMGE (zero): Floating-point Compare Greater than or Equal to zero (vector).
FCMGT (register): Floating-point Compare Greater than (vector).
FCMGT (zero): Floating-point Compare Greater than zero (vector).
FCMLA (by element): Floating-point Complex Multiply Accumulate (by element).
FCMLA: Floating-point Complex Multiply Accumulate.
FCMLE (zero): Floating-point Compare Less than or Equal to zero (vector).
FCMLT (zero): Floating-point Compare Less than zero (vector).
FCMP: Floating-point quiet Compare (scalar).
FCMPE: Floating-point signaling Compare (scalar).
FCSEL: Floating-point Conditional Select (scalar).
FCVT: Floating-point Convert precision (scalar).
FCVTAS (scalar): Floating-point Convert to Signed integer, rounding to nearest with ties to Away (scalar).
FCVTAS (vector): Floating-point Convert to Signed integer, rounding to nearest with ties to Away (vector).
FCVTAU (scalar): Floating-point Convert to Unsigned integer, rounding to nearest with ties to Away (scalar).
FCVTAU (vector): Floating-point Convert to Unsigned integer, rounding to nearest with ties to Away (vector).
FCVTL, FCVTL2: Floating-point Convert to higher precision Long (vector).
FCVTMS (scalar): Floating-point Convert to Signed integer, rounding toward Minus infinity (scalar).
FCVTMS (vector): Floating-point Convert to Signed integer, rounding toward Minus infinity (vector).
FCVTMU (scalar): Floating-point Convert to Unsigned integer, rounding toward Minus infinity (scalar).
FCVTMU (vector): Floating-point Convert to Unsigned integer, rounding toward Minus infinity (vector).
FCVTN, FCVTN2: Floating-point Convert to lower precision Narrow (vector).
FCVTNS (scalar): Floating-point Convert to Signed integer, rounding to nearest with ties to even (scalar).
FCVTNS (vector): Floating-point Convert to Signed integer, rounding to nearest with ties to even (vector).
FCVTNU (scalar): Floating-point Convert to Unsigned integer, rounding to nearest with ties to even (scalar).
FCVTNU (vector): Floating-point Convert to Unsigned integer, rounding to nearest with ties to even (vector).
FCVTPS (scalar): Floating-point Convert to Signed integer, rounding toward Plus infinity (scalar).
FCVTPS (vector): Floating-point Convert to Signed integer, rounding toward Plus infinity (vector).
FCVTPU (scalar): Floating-point Convert to Unsigned integer, rounding toward Plus infinity (scalar).
FCVTPU (vector): Floating-point Convert to Unsigned integer, rounding toward Plus infinity (vector).
FCVTXN, FCVTXN2: Floating-point Convert to lower precision Narrow, rounding to odd (vector).
FCVTZS (scalar, fixed-point): Floating-point Convert to Signed fixed-point, rounding toward Zero (scalar).
FCVTZS (scalar, integer): Floating-point Convert to Signed integer, rounding toward Zero (scalar).
FCVTZS (vector, fixed-point): Floating-point Convert to Signed fixed-point, rounding toward Zero (vector).
FCVTZS (vector, integer): Floating-point Convert to Signed integer, rounding toward Zero (vector).
FCVTZU (scalar, fixed-point): Floating-point Convert to Unsigned fixed-point, rounding toward Zero (scalar).
FCVTZU (scalar, integer): Floating-point Convert to Unsigned integer, rounding toward Zero (scalar).
FCVTZU (vector, fixed-point): Floating-point Convert to Unsigned fixed-point, rounding toward Zero (vector).
FCVTZU (vector, integer): Floating-point Convert to Unsigned integer, rounding toward Zero (vector).
FDIV (scalar): Floating-point Divide (scalar).
FDIV (vector): Floating-point Divide (vector).
SHA1H: SHA1
fixed rotate.
SCVTF (scalar, fixed-point): Signed
fixed-point Convert to Floating-point (scalar).
UCVTF (scalar, fixed-point): Unsigned
fixed-point Convert to Floating-point (scalar).
SCVTF (vector, fixed-point): Signed
fixed-point Convert to Floating-point (vector).
UCVTF (vector, fixed-point): Unsigned
fixed-point Convert to Floating-point (vector).
fixed-point): Floating-point Convert to Signed fixed-point, rounding toward Zero (scalar).
fixed-point): Floating-point Convert to Signed fixed-point, rounding toward Zero (vector).
fixed-point): Floating-point Convert to Unsigned fixed-point, rounding toward Zero (scalar).
fixed-point): Floating-point Convert to Unsigned fixed-point, rounding toward Zero (vector).
fixed-point): Signed fixed-point Convert to Floating-point (scalar).
fixed-point): Signed fixed-point Convert to Floating-point (vector).
fixed-point): Unsigned fixed-point Convert to Floating-point (scalar).
fixed-point): Unsigned fixed-point Convert to Floating-point (vector).
FCVTZS (scalar, fixed-point): Floating-point Convert to Signed
fixed-point, rounding toward Zero (scalar).
FCVTZU (scalar, fixed-point): Floating-point Convert to Unsigned
fixed-point, rounding toward Zero (scalar).
FCVTZS (vector, fixed-point): Floating-point Convert to Signed
fixed-point, rounding toward Zero (vector).
FCVTZU (vector, fixed-point): Floating-point Convert to Unsigned
fixed-point, rounding toward Zero (vector).
FJCVTZS: Floating-point Javascript Convert to Signed
fixed-point, rounding toward Zero.
FJCVTZS: Floating-point Javascript Convert to Signed fixed-point, rounding toward Zero.
ADCS: Add with Carry, setting
flags.
ADDS (extended register): Add (extended register), setting
flags.
ADDS (immediate): Add (immediate), setting
flags.
ADDS (shifted register): Add (shifted register), setting
flags.
ANDS (immediate): Bitwise AND (immediate), setting
flags.
ANDS (shifted register): Bitwise AND (shifted register), setting
flags.
BICS (shifted register): Bitwise Bit Clear (shifted register), setting
flags.
SBCS: Subtract with Carry, setting
flags.
SUBS (extended register): Subtract (extended register), setting
flags.
SUBS (immediate): Subtract (immediate), setting
flags.
SUBS (shifted register): Subtract (shifted register), setting
flags.
NGCS: Negate with Carry, setting
flags: an alias of SBCS.
NEGS: Negate, setting
flags: an alias of SUBS (shifted register).
SCVTF (scalar, fixed-point): Signed fixed-point Convert to
Floating-point (scalar).
SCVTF (scalar, integer): Signed integer Convert to
Floating-point (scalar).
UCVTF (scalar, fixed-point): Unsigned fixed-point Convert to
Floating-point (scalar).
UCVTF (scalar, integer): Unsigned integer Convert to
Floating-point (scalar).
SCVTF (vector, fixed-point): Signed fixed-point Convert to
Floating-point (vector).
SCVTF (vector, integer): Signed integer Convert to
Floating-point (vector).
UCVTF (vector, fixed-point): Unsigned fixed-point Convert to
Floating-point (vector).
UCVTF (vector, integer): Unsigned integer Convert to
Floating-point (vector).
Floating-point Absolute Compare Greater than (vector).
Floating-point Absolute Compare Greater than or Equal (vector).
FABD:
Floating-point Absolute Difference (vector).
Floating-point Absolute value (scalar).
Floating-point Absolute value (vector).
Floating-point Add (scalar).
Floating-point Add (vector).
Floating-point Add Pair of elements (scalar).
Floating-point Add Pairwise (vector).
Floating-point Compare Equal (vector).
Floating-point Compare Equal to zero (vector).
Floating-point Compare Greater than (vector).
Floating-point Compare Greater than or Equal (vector).
Floating-point Compare Greater than or Equal to zero (vector).
Floating-point Compare Greater than zero (vector).
Floating-point Compare Less than or Equal to zero (vector).
Floating-point Compare Less than zero (vector).
Floating-point Complex Add.
Floating-point Complex Multiply Accumulate (by element).
Floating-point Complex Multiply Accumulate.
Floating-point Conditional quiet Compare (scalar).
Floating-point Conditional Select (scalar).
Floating-point Conditional signaling Compare (scalar).
FCVT:
Floating-point Convert precision (scalar).
Floating-point Convert to higher precision Long (vector).
Floating-point Convert to lower precision Narrow (vector).
Floating-point Convert to lower precision Narrow, rounding to odd (vector).
Floating-point Convert to Signed fixed-point, rounding toward Zero (scalar).
Floating-point Convert to Signed fixed-point, rounding toward Zero (vector).
Floating-point Convert to Signed integer, rounding to nearest with ties to Away (scalar).
Floating-point Convert to Signed integer, rounding to nearest with ties to Away (vector).
Floating-point Convert to Signed integer, rounding to nearest with ties to even (scalar).
Floating-point Convert to Signed integer, rounding to nearest with ties to even (vector).
Floating-point Convert to Signed integer, rounding toward Minus infinity (scalar).
Floating-point Convert to Signed integer, rounding toward Minus infinity (vector).
Floating-point Convert to Signed integer, rounding toward Plus infinity (scalar).
Floating-point Convert to Signed integer, rounding toward Plus infinity (vector).
Floating-point Convert to Signed integer, rounding toward Zero (scalar).
Floating-point Convert to Signed integer, rounding toward Zero (vector).
Floating-point Convert to Unsigned fixed-point, rounding toward Zero (scalar).
Floating-point Convert to Unsigned fixed-point, rounding toward Zero (vector).
Floating-point Convert to Unsigned integer, rounding to nearest with ties to Away (scalar).
Floating-point Convert to Unsigned integer, rounding to nearest with ties to Away (vector).
Floating-point Convert to Unsigned integer, rounding to nearest with ties to even (scalar).
Floating-point Convert to Unsigned integer, rounding to nearest with ties to even (vector).
Floating-point Convert to Unsigned integer, rounding toward Minus infinity (scalar).
Floating-point Convert to Unsigned integer, rounding toward Minus infinity (vector).
Floating-point Convert to Unsigned integer, rounding toward Plus infinity (scalar).
Floating-point Convert to Unsigned integer, rounding toward Plus infinity (vector).
Floating-point Convert to Unsigned integer, rounding toward Zero (scalar).
Floating-point Convert to Unsigned integer, rounding toward Zero (vector).
Floating-point Divide (scalar).
Floating-point Divide (vector).
Floating-point fused Multiply-Add (scalar).
Floating-point fused Multiply-Add Long to accumulator (by element).
Floating-point fused Multiply-Add Long to accumulator (vector).
Floating-point fused Multiply-Add to accumulator (by element).
Floating-point fused Multiply-Add to accumulator (vector).
Floating-point Fused Multiply-Subtract (scalar).
Floating-point fused Multiply-Subtract from accumulator (by element).
Floating-point fused Multiply-Subtract from accumulator (vector).
Floating-point fused Multiply-Subtract Long from accumulator (by element).
Floating-point fused Multiply-Subtract Long from accumulator (vector).
Floating-point Javascript Convert to Signed fixed-point, rounding toward Zero.
Floating-point Maximum (scalar).
Floating-point Maximum (vector).
Floating-point Maximum across Vector.
Floating-point Maximum Number (scalar).
Floating-point Maximum Number (vector).
Floating-point Maximum Number across Vector.
Floating-point Maximum Number of Pair of elements (scalar).
Floating-point Maximum Number Pairwise (vector).
Floating-point Maximum of Pair of elements (scalar).
Floating-point Maximum Pairwise (vector).
Floating-point Minimum (scalar).
Floating-point minimum (vector).
Floating-point Minimum across Vector.
Floating-point Minimum Number (scalar).
Floating-point Minimum Number (vector).
Floating-point Minimum Number across Vector.
Floating-point Minimum Number of Pair of elements (scalar).
Floating-point Minimum Number Pairwise (vector).
Floating-point Minimum of Pair of elements (scalar).
Floating-point Minimum Pairwise (vector).
Floating-point move immediate (scalar).
Floating-point move immediate (vector).
Floating-point Move register without conversion.
Floating-point Move to or from general-purpose register without conversion.
Floating-point Multiply (by element).
Floating-point Multiply (scalar).
Floating-point Multiply (vector).
Floating-point Multiply extended (by element).
Floating-point Multiply extended.
Floating-point Multiply-Negate (scalar).
Floating-point Negate (scalar).
Floating-point Negate (vector).
Floating-point Negated fused Multiply-Add (scalar).
Floating-point Negated fused Multiply-Subtract (scalar).
FCMP:
Floating-point quiet Compare (scalar).
Floating-point Reciprocal Estimate.
Floating-point Reciprocal exponent (scalar).
Floating-point Reciprocal Square Root Estimate.
Floating-point Reciprocal Square Root Step.
Floating-point Reciprocal Step.
Floating-point Round to Integral exact, using current rounding mode (scalar).
Floating-point Round to Integral exact, using current rounding mode (vector).
Floating-point Round to Integral, to nearest with ties to Away (scalar).
Floating-point Round to Integral, to nearest with ties to Away (vector).
Floating-point Round to Integral, to nearest with ties to even (scalar).
Floating-point Round to Integral, to nearest with ties to even (vector).
Floating-point Round to Integral, toward Minus infinity (scalar).
Floating-point Round to Integral, toward Minus infinity (vector).
Floating-point Round to Integral, toward Plus infinity (scalar).
Floating-point Round to Integral, toward Plus infinity (vector).
Floating-point Round to Integral, toward Zero (scalar).
Floating-point Round to Integral, toward Zero (vector).
Floating-point Round to Integral, using current rounding mode (scalar).
Floating-point Round to Integral, using current rounding mode (vector).
Floating-point signaling Compare (scalar).
Floating-point Square Root (scalar).
Floating-point Square Root (vector).
Floating-point Subtract (scalar).
Floating-point Subtract (vector).
FMADD: Floating-point fused Multiply-Add (scalar).
FMAX (scalar): Floating-point Maximum (scalar).
FMAX (vector): Floating-point Maximum (vector).
FMAXNM (scalar): Floating-point Maximum Number (scalar).
FMAXNM (vector): Floating-point Maximum Number (vector).
FMAXNMP (scalar): Floating-point Maximum Number of Pair of elements (scalar).
FMAXNMP (vector): Floating-point Maximum Number Pairwise (vector).
FMAXNMV: Floating-point Maximum Number across Vector.
FMAXP (scalar): Floating-point Maximum of Pair of elements (scalar).
FMAXP (vector): Floating-point Maximum Pairwise (vector).
FMAXV: Floating-point Maximum across Vector.
FMIN (scalar): Floating-point Minimum (scalar).
FMIN (vector): Floating-point minimum (vector).
FMINNM (scalar): Floating-point Minimum Number (scalar).
FMINNM (vector): Floating-point Minimum Number (vector).
FMINNMP (scalar): Floating-point Minimum Number of Pair of elements (scalar).
FMINNMP (vector): Floating-point Minimum Number Pairwise (vector).
FMINNMV: Floating-point Minimum Number across Vector.
FMINP (scalar): Floating-point Minimum of Pair of elements (scalar).
FMINP (vector): Floating-point Minimum Pairwise (vector).
FMINV: Floating-point Minimum across Vector.
FMLA (by element): Floating-point fused Multiply-Add to accumulator (by element).
FMLA (vector): Floating-point fused Multiply-Add to accumulator (vector).
FMLAL, FMLAL2 (by element): Floating-point fused Multiply-Add Long to accumulator (by element).
FMLAL, FMLAL2 (vector): Floating-point fused Multiply-Add Long to accumulator (vector).
FMLAL2 (by element): Floating-point fused Multiply-Add Long to accumulator (by element).
FMLAL2 (vector): Floating-point fused Multiply-Add Long to accumulator (vector).
FMLS (by element): Floating-point fused Multiply-Subtract from accumulator (by element).
FMLS (vector): Floating-point fused Multiply-Subtract from accumulator (vector).
FMLSL, FMLSL2 (by element): Floating-point fused Multiply-Subtract Long from accumulator (by element).
FMLSL, FMLSL2 (vector): Floating-point fused Multiply-Subtract Long from accumulator (vector).
FMLSL2 (by element): Floating-point fused Multiply-Subtract Long from accumulator (by element).
FMLSL2 (vector): Floating-point fused Multiply-Subtract Long from accumulator (vector).
FMOV (general): Floating-point Move to or from general-purpose register without conversion.
FMOV (register): Floating-point Move register without conversion.
FMOV (scalar, immediate): Floating-point move immediate (scalar).
FMOV (vector, immediate): Floating-point move immediate (vector).
FMSUB: Floating-point Fused Multiply-Subtract (scalar).
FMUL (by element): Floating-point Multiply (by element).
FMUL (scalar): Floating-point Multiply (scalar).
FMUL (vector): Floating-point Multiply (vector).
FMULX (by element): Floating-point Multiply extended (by element).
FMULX: Floating-point Multiply extended.
FNEG (scalar): Floating-point Negate (scalar).
FNEG (vector): Floating-point Negate (vector).
FNMADD: Floating-point Negated fused Multiply-Add (scalar).
FNMSUB: Floating-point Negated fused Multiply-Subtract (scalar).
FNMUL (scalar): Floating-point Multiply-Negate (scalar).
PACDA, PACDZA: Pointer Authentication Code
for Data address, using key A.
PACDB, PACDZB: Pointer Authentication Code
for Data address, using key B.
WFE: Wait
For Event.
PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA: Pointer Authentication Code
for Instruction address, using key A.
PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB: Pointer Authentication Code
for Instruction address, using key B.
WFI: Wait
For Interrupt.
ADRP:
Form PC-relative address to 4KB page.
ADR:
Form PC-relative address.
LD1 (multiple structures): Load multiple single-element structures to one, two, three, or
four registers.
LD4 (multiple structures): Load multiple 4-element structures to
four registers.
LD4 (single structure): Load single 4-element structure to one lane of
four registers.
LD4R: Load single 4-element structure and Replicate to all lanes of
four registers.
ST1 (multiple structures): Store multiple single-element structures from one, two, three, or
four registers.
ST4 (multiple structures): Store multiple 4-element structures from
four registers.
ST4 (single structure): Store single 4-element structure from one lane of
four registers.
LDR (immediate, SIMD&FP): Load SIMD&
FP Register (immediate offset).
STR (immediate, SIMD&FP): Store SIMD&
FP register (immediate offset).
LDR (literal, SIMD&FP): Load SIMD&
FP Register (PC-relative literal).
LDR (register, SIMD&FP): Load SIMD&
FP Register (register offset).
STR (register, SIMD&FP): Store SIMD&
FP register (register offset).
LDUR (SIMD&FP): Load SIMD&
FP Register (unscaled offset).
STUR (SIMD&FP): Store SIMD&
FP register (unscaled offset).
LDNP (SIMD&FP): Load Pair of SIMD&
FP registers, with Non-temporal hint.
STNP (SIMD&FP): Store Pair of SIMD&
FP registers, with Non-temporal hint.
LDP (SIMD&FP): Load Pair of SIMD&
FP registers.
STP (SIMD&FP): Store Pair of SIMD&
FP registers.
FP): Load Pair of SIMD&FP registers, with Non-temporal hint.
FP): Load Pair of SIMD&FP registers.
FP): Load SIMD&FP Register (immediate offset).
FP): Load SIMD&FP Register (PC-relative literal).
FP): Load SIMD&FP Register (register offset).
FP): Load SIMD&FP Register (unscaled offset).
FP): Store Pair of SIMD&FP registers, with Non-temporal hint.
FP): Store Pair of SIMD&FP registers.
FP): Store SIMD&FP register (immediate offset).
FP): Store SIMD&FP register (register offset).
FP): Store SIMD&FP register (unscaled offset).
FRECPE: Floating-point Reciprocal Estimate.
FRECPS: Floating-point Reciprocal Step.
FRECPX: Floating-point Reciprocal exponent (scalar).
FRINTA (scalar): Floating-point Round to Integral, to nearest with ties to Away (scalar).
FRINTA (vector): Floating-point Round to Integral, to nearest with ties to Away (vector).
FRINTI (scalar): Floating-point Round to Integral, using current rounding mode (scalar).
FRINTI (vector): Floating-point Round to Integral, using current rounding mode (vector).
FRINTM (scalar): Floating-point Round to Integral, toward Minus infinity (scalar).
FRINTM (vector): Floating-point Round to Integral, toward Minus infinity (vector).
FRINTN (scalar): Floating-point Round to Integral, to nearest with ties to even (scalar).
FRINTN (vector): Floating-point Round to Integral, to nearest with ties to even (vector).
FRINTP (scalar): Floating-point Round to Integral, toward Plus infinity (scalar).
FRINTP (vector): Floating-point Round to Integral, toward Plus infinity (vector).
FRINTX (scalar): Floating-point Round to Integral exact, using current rounding mode (scalar).
FRINTX (vector): Floating-point Round to Integral exact, using current rounding mode (vector).
FRINTZ (scalar): Floating-point Round to Integral, toward Zero (scalar).
FRINTZ (vector): Floating-point Round to Integral, toward Zero (vector).
FRSQRTE: Floating-point Reciprocal Square Root Estimate.
FRSQRTS: Floating-point Reciprocal Square Root Step.
FSQRT (scalar): Floating-point Square Root (scalar).
FSQRT (vector): Floating-point Square Root (vector).
FSUB (scalar): Floating-point Subtract (scalar).
FSUB (vector): Floating-point Subtract (vector).
FMADD: Floating-point
fused Multiply-Add (scalar).
FNMADD: Floating-point Negated
fused Multiply-Add (scalar).
FMLAL, FMLAL2 (by element): Floating-point
fused Multiply-Add Long to accumulator (by element).
FMLAL, FMLAL2 (vector): Floating-point
fused Multiply-Add Long to accumulator (vector).
FMLA (by element): Floating-point
fused Multiply-Add to accumulator (by element).
FMLA (vector): Floating-point
fused Multiply-Add to accumulator (vector).
FMSUB: Floating-point
Fused Multiply-Subtract (scalar).
FNMSUB: Floating-point Negated
fused Multiply-Subtract (scalar).
FMLS (by element): Floating-point
fused Multiply-Subtract from accumulator (by element).
FMLS (vector): Floating-point
fused Multiply-Subtract from accumulator (vector).
FMLSL, FMLSL2 (by element): Floating-point
fused Multiply-Subtract Long from accumulator (by element).
FMLSL, FMLSL2 (vector): Floating-point
fused Multiply-Subtract Long from accumulator (vector).
MOV (from general): Move general-purpose register to a vector element: an alias of INS (
MOV (from general): Move
general-purpose register to a vector element: an alias of INS (general).
MSR (register): Move
general-purpose register to System Register.
DUP (general): Duplicate
general-purpose register to vector.
FMOV (general): Floating-point Move to or from
general-purpose register without conversion.
INS (general): Insert vector element from
general-purpose register.
SMOV: Signed Move vector element to
general-purpose register.
UMOV: Unsigned Move vector element to
general-purpose register.
MOV (to general): Move vector element to
general-purpose register: an alias of UMOV.
PACGA: Pointer Authentication Code, using
Generic key.
CMGT (register): Compare signed
Greater than (vector).
FACGT: Floating-point Absolute Compare
Greater than (vector).
FCMGT (register): Floating-point Compare
Greater than (vector).
CMGE (register): Compare signed
Greater than or Equal (vector).
FACGE: Floating-point Absolute Compare
Greater than or Equal (vector).
FCMGE (register): Floating-point Compare
Greater than or Equal (vector).
CMGE (zero): Compare signed
Greater than or Equal to zero (vector).
FCMGE (zero): Floating-point Compare
Greater than or Equal to zero (vector).
CMGT (zero): Compare signed
Greater than zero (vector).
FCMGT (zero): Floating-point Compare
Greater than zero (vector).
SQDMULH (by element): Signed saturating Doubling Multiply returning High
SQRDMLAH (by element): Signed Saturating Rounding Doubling Multiply Accumulate returning High
Half (by element).
SQRDMLSH (by element): Signed Saturating Rounding Doubling Multiply Subtract returning High
Half (by element).
SQRDMULH (by element): Signed saturating Rounding Doubling Multiply returning High
half (by element).
SQRDMLAH (vector): Signed Saturating Rounding Doubling Multiply Accumulate returning High
Half (vector).
SQRDMLSH (vector): Signed Saturating Rounding Doubling Multiply Subtract returning High
Half (vector).
SQDMULH (vector): Signed saturating Doubling Multiply returning High
half.
SQRDMULH (vector): Signed saturating Rounding Doubling Multiply returning High
half.
LDRH (immediate): Load Register
Halfword (immediate).
LDRSH (immediate): Load Register Signed
Halfword (immediate).
STRH (immediate): Store Register
Halfword (immediate).
LDRH (register): Load Register
Halfword (register).
LDRSH (register): Load Register Signed
Halfword (register).
STRH (register): Store Register
Halfword (register).
LDTRH: Load Register
Halfword (unprivileged).
LDTRSH: Load Register Signed
Halfword (unprivileged).
STTRH: Store Register
Halfword (unprivileged).
LDURH: Load Register
Halfword (unscaled).
LDURSH: Load Register Signed
Halfword (unscaled).
STURH: Store Register
Halfword (unscaled).
STADDH, STADDLH: Atomic add on
halfword in memory, without return: an alias of LDADDH, LDADDAH, LDADDALH, LDADDLH.
STCLRH, STCLRLH: Atomic bit clear on
halfword in memory, without return: an alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
STEORH, STEORLH: Atomic exclusive OR on
halfword in memory, without return: an alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
STSETH, STSETLH: Atomic bit set on
halfword in memory, without return: an alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
STSMAXH, STSMAXLH: Atomic signed maximum on
halfword in memory, without return: an alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
STSMINH, STSMINLH: Atomic signed minimum on
halfword in memory, without return: an alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
STUMAXH, STUMAXLH: Atomic unsigned maximum on
halfword in memory, without return: an alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
STUMINH, STUMINLH: Atomic unsigned minimum on
halfword in memory, without return: an alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
CASH, CASAH, CASALH, CASLH: Compare and Swap
halfword in memory.
LDADDH, LDADDAH, LDADDALH, LDADDLH: Atomic add on
halfword in memory.
LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH: Atomic bit clear on
halfword in memory.
LDEORH, LDEORAH, LDEORALH, LDEORLH: Atomic exclusive OR on
halfword in memory.
LDSETH, LDSETAH, LDSETALH, LDSETLH: Atomic bit set on
halfword in memory.
LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH: Atomic signed maximum on
halfword in memory.
LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH: Atomic signed minimum on
halfword in memory.
LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH: Atomic unsigned maximum on
halfword in memory.
LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH: Atomic unsigned minimum on
halfword in memory.
halfword in memory.
LDAPRH: Load-Acquire RCpc Register
Halfword.
LDARH: Load-Acquire Register
Halfword.
LDAXRH: Load-Acquire Exclusive Register
Halfword.
LDLARH: Load LOAcquire Register
Halfword.
LDXRH: Load Exclusive Register
Halfword.
STLLRH: Store LORelease Register
Halfword.
STLRH: Store-Release Register
Halfword.
STLXRH: Store-Release Exclusive Register
Halfword.
STXRH: Store Exclusive Register
Halfword.
SXTH: Sign Extend
Halfword: an alias of SBFM.
UXTH: Unsigned Extend
Halfword: an alias of UBFM.
REV16 (vector): Reverse elements in 16-bit
halfwords (vector).
REV16: Reverse bytes in 16-bit
halfwords.
HLT:
Halt instruction.
SHADD: Signed
Halving Add.
SRHADD: Signed Rounding
Halving Add.
UHADD: Unsigned
Halving Add.
URHADD: Unsigned Rounding
Halving Add.
SHSUB: Signed
Halving Subtract.
UHSUB: Unsigned
Halving Subtract.
SHA1C: SHA1
hash update (choose).
SHA1M: SHA1
hash update (majority).
SHA1P: SHA1
hash update (parity).
SHA256H: SHA256
hash update (part 1).
SHA256H2: SHA256
hash update (part 2).
SHA512H: SHA512
Hash update part 1.
SHA512H2: SHA512
Hash update part 2.
SQDMULH (by element): Signed saturating Doubling Multiply returning
High half (by element).
SQRDMLAH (by element): Signed Saturating Rounding Doubling Multiply Accumulate returning
High Half (by element).
SQRDMLSH (by element): Signed Saturating Rounding Doubling Multiply Subtract returning
High Half (by element).
SQRDMULH (by element): Signed saturating Rounding Doubling Multiply returning
High half (by element).
SQRDMLAH (vector): Signed Saturating Rounding Doubling Multiply Accumulate returning
High Half (vector).
SQRDMLSH (vector): Signed Saturating Rounding Doubling Multiply Subtract returning
High Half (vector).
SQDMULH (vector): Signed saturating Doubling Multiply returning
High half.
SQRDMULH (vector): Signed saturating Rounding Doubling Multiply returning
High half.
ADDHN, ADDHN2: Add returning
High Narrow.
RADDHN, RADDHN2: Rounding Add returning
High Narrow.
RSUBHN, RSUBHN2: Rounding Subtract returning
High Narrow.
SUBHN, SUBHN2: Subtract returning
High Narrow.
SMULH: Signed Multiply
High.
UMULH: Unsigned Multiply
High.
CMHI (register): Compare unsigned
Higher (vector).
CMHS (register): Compare unsigned
Higher or Same (vector).
FCVTL, FCVTL2: Floating-point Convert to
higher precision Long (vector).
HINT:
Hint instruction.
LDNP (SIMD&FP): Load Pair of SIMD&FP registers, with Non-temporal
hint.
LDNP: Load Pair of Registers, with non-temporal
hint.
STNP (SIMD&FP): Store Pair of SIMD&FP registers, with Non-temporal
hint.
STNP: Store Pair of Registers, with non-temporal
hint.
HINT: Hint instruction.
HLT: Halt instruction.
HVC: Hypervisor Call.
HVC:
Hypervisor Call.
FMOV (scalar, immediate): Floating-point move
immediate (scalar).
FMOV (vector, immediate): Floating-point move
immediate (vector).
MOVI: Move
Immediate (vector).
MVNI: Move inverted
Immediate (vector).
LDR (immediate, SIMD&FP): Load SIMD&FP Register (
immediate offset).
STR (immediate, SIMD&FP): Store SIMD&FP register (
immediate offset).
MSR (immediate): Move
immediate value to Special Register.
ADDS (immediate): Add (
immediate), setting flags.
ANDS (immediate): Bitwise AND (
immediate), setting flags.
SUBS (immediate): Subtract (
immediate), setting flags.
ADD (immediate): Add (
immediate).
AND (immediate): Bitwise AND (
immediate).
BIC (vector, immediate): Bitwise bit Clear (vector,
immediate).
CCMN (immediate): Conditional Compare Negative (
immediate).
CCMP (immediate): Conditional Compare (
immediate).
CMN (immediate): Compare Negative (immediate): an alias of ADDS (
immediate).
CMP (immediate): Compare (immediate): an alias of SUBS (
immediate).
EOR (immediate): Bitwise Exclusive OR (
immediate).
LDR (immediate): Load Register (
immediate).
LDRB (immediate): Load Register Byte (
immediate).
LDRH (immediate): Load Register Halfword (
immediate).
LDRSB (immediate): Load Register Signed Byte (
immediate).
LDRSH (immediate): Load Register Signed Halfword (
immediate).
LDRSW (immediate): Load Register Signed Word (
immediate).
MOV (bitmask immediate): Move (bitmask immediate): an alias of ORR (
immediate).
MOV (to/from SP): Move between register and stack pointer: an alias of ADD (
immediate).
ORR (immediate): Bitwise OR (
immediate).
ORR (vector, immediate): Bitwise inclusive OR (vector,
immediate).
PRFM (immediate): Prefetch Memory (
immediate).
RSHRN, RSHRN2: Rounding Shift Right Narrow (
immediate).
SHL: Shift Left (
immediate).
SHRN, SHRN2: Shift Right Narrow (
immediate).
SLI: Shift Left and Insert (
immediate).
SQRSHRN, SQRSHRN2: Signed saturating Rounded Shift Right Narrow (
immediate).
SQRSHRUN, SQRSHRUN2: Signed saturating Rounded Shift Right Unsigned Narrow (
immediate).
SQSHL (immediate): Signed saturating Shift Left (
immediate).
SQSHLU: Signed saturating Shift Left Unsigned (
immediate).
SQSHRN, SQSHRN2: Signed saturating Shift Right Narrow (
immediate).
SQSHRUN, SQSHRUN2: Signed saturating Shift Right Unsigned Narrow (
immediate).
SRI: Shift Right and Insert (
immediate).
SRSHR: Signed Rounding Shift Right (
immediate).
SRSRA: Signed Rounding Shift Right and Accumulate (
immediate).
SSHLL, SSHLL2: Signed Shift Left Long (
immediate).
SSHR: Signed Shift Right (
immediate).
SSRA: Signed Shift Right and Accumulate (
immediate).
STR (immediate): Store Register (
immediate).
STRB (immediate): Store Register Byte (
immediate).
STRH (immediate): Store Register Halfword (
immediate).
SUB (immediate): Subtract (
immediate).
TST (immediate): Test bits (immediate): an alias of ANDS (
immediate).
UQRSHRN, UQRSHRN2: Unsigned saturating Rounded Shift Right Narrow (
immediate).
UQSHL (immediate): Unsigned saturating Shift Left (
immediate).
UQSHRN, UQSHRN2: Unsigned saturating Shift Right Narrow (
immediate).
URSHR: Unsigned Rounding Shift Right (
immediate).
URSRA: Unsigned Rounding Shift Right and Accumulate (
immediate).
USHLL, USHLL2: Unsigned Shift Left Long (
immediate).
USHR: Unsigned Shift Right (
immediate).
USRA: Unsigned Shift Right and Accumulate (
immediate).
immediate): Add (immediate), setting flags.
immediate): Add (immediate).
CMN (immediate): Compare Negative (
immediate): an alias of ADDS (immediate).
TST (immediate): Test bits (
immediate): an alias of ANDS (immediate).
ROR (immediate): Rotate right (
immediate): an alias of EXTR.
MOV (inverted wide immediate): Move (inverted wide
immediate): an alias of MOVN.
MOV (wide immediate): Move (wide
immediate): an alias of MOVZ.
MOV (bitmask immediate): Move (bitmask
immediate): an alias of ORR (immediate).
ASR (immediate): Arithmetic Shift Right (
immediate): an alias of SBFM.
CMP (immediate): Compare (
immediate): an alias of SUBS (immediate).
LSL (immediate): Logical Shift Left (
immediate): an alias of UBFM.
LSR (immediate): Logical Shift Right (
immediate): an alias of UBFM.
immediate): Arithmetic Shift Right (immediate): an alias of SBFM.
immediate): Bitwise AND (immediate), setting flags.
immediate): Bitwise AND (immediate).
immediate): Bitwise bit Clear (vector, immediate).
immediate): Bitwise Exclusive OR (immediate).
immediate): Bitwise inclusive OR (vector, immediate).
immediate): Bitwise OR (immediate).
immediate): Compare (immediate): an alias of SUBS (immediate).
immediate): Compare Negative (immediate): an alias of ADDS (immediate).
immediate): Conditional Compare (immediate).
immediate): Conditional Compare Negative (immediate).
immediate): Floating-point move immediate (scalar).
immediate): Floating-point move immediate (vector).
immediate): Load Register (immediate).
immediate): Load Register Byte (immediate).
immediate): Load Register Halfword (immediate).
immediate): Load Register Signed Byte (immediate).
immediate): Load Register Signed Halfword (immediate).
immediate): Load Register Signed Word (immediate).
immediate): Logical Shift Left (immediate): an alias of UBFM.
immediate): Logical Shift Right (immediate): an alias of UBFM.
immediate): Move (bitmask immediate): an alias of ORR (immediate).
immediate): Move (inverted wide immediate): an alias of MOVN.
immediate): Move (wide immediate): an alias of MOVZ.
immediate): Move immediate value to Special Register.
immediate): Prefetch Memory (immediate).
immediate): Rotate right (immediate): an alias of EXTR.
immediate): Signed saturating Shift Left (immediate).
immediate): Store Register (immediate).
immediate): Store Register Byte (immediate).
immediate): Store Register Halfword (immediate).
immediate): Subtract (immediate), setting flags.
immediate): Subtract (immediate).
immediate): Test bits (immediate): an alias of ANDS (immediate).
immediate): Unsigned saturating Shift Left (immediate).
immediate, SIMD&FP): Load SIMD&FP Register (immediate offset).
immediate, SIMD&FP): Store SIMD&FP register (immediate offset).
ORR (vector, immediate): Bitwise
inclusive OR (vector, immediate).
ORR (vector, register): Bitwise
inclusive OR (vector, register).
ORN (vector): Bitwise
inclusive OR NOT (vector).
CSINC: Conditional Select
Increment.
CINC: Conditional
Increment: an alias of CSINC.
FCVTMS (scalar): Floating-point Convert to Signed integer, rounding toward Minus
infinity (scalar).
FCVTMU (scalar): Floating-point Convert to Unsigned integer, rounding toward Minus
infinity (scalar).
FCVTPS (scalar): Floating-point Convert to Signed integer, rounding toward Plus
infinity (scalar).
FCVTPU (scalar): Floating-point Convert to Unsigned integer, rounding toward Plus
infinity (scalar).
FRINTM (scalar): Floating-point Round to Integral, toward Minus
infinity (scalar).
FRINTP (scalar): Floating-point Round to Integral, toward Plus
infinity (scalar).
FCVTMS (vector): Floating-point Convert to Signed integer, rounding toward Minus
infinity (vector).
FCVTMU (vector): Floating-point Convert to Unsigned integer, rounding toward Minus
infinity (vector).
FCVTPS (vector): Floating-point Convert to Signed integer, rounding toward Plus
infinity (vector).
FCVTPU (vector): Floating-point Convert to Unsigned integer, rounding toward Plus
infinity (vector).
FRINTM (vector): Floating-point Round to Integral, toward Minus
infinity (vector).
FRINTP (vector): Floating-point Round to Integral, toward Plus
infinity (vector).
MOV (element): Move vector element to another vector element: an alias of
INS (element).
INS (element): Insert vector element from another vector element.
MOV (from general): Move general-purpose register to a vector element: an alias of
INS (general).
INS (general): Insert vector element from general-purpose register.
SLI: Shift Left and
Insert (immediate).
SRI: Shift Right and
Insert (immediate).
BFXIL: Bitfield extract and
insert at low end: an alias of BFM.
BIF: Bitwise
Insert if False.
BIT: Bitwise
Insert if True.
SBFIZ: Signed Bitfield
Insert in Zero: an alias of SBFM.
UBFIZ: Unsigned Bitfield
Insert in Zero: an alias of UBFM.
Insert vector element from another vector element.
Insert vector element from general-purpose register.
BFI: Bitfield
Insert: an alias of BFM.
AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA: Authenticate
Instruction address, using key A.
PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA: Pointer Authentication Code for
Instruction address, using key A.
AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB: Authenticate
Instruction address, using key B.
PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB: Pointer Authentication Code for
Instruction address, using key B.
IC:
Instruction Cache operation: an alias of SYS.
ISB:
Instruction Synchronization Barrier.
SYSL: System
instruction with result.
BRK: Breakpoint
instruction.
HINT: Hint
instruction.
HLT: Halt
instruction.
SYS: System
instruction.
SCVTF (scalar, integer): Signed
integer Convert to Floating-point (scalar).
UCVTF (scalar, integer): Unsigned
integer Convert to Floating-point (scalar).
SCVTF (vector, integer): Signed
integer Convert to Floating-point (vector).
UCVTF (vector, integer): Unsigned
integer Convert to Floating-point (vector).
integer): Floating-point Convert to Signed integer, rounding toward Zero (scalar).
integer): Floating-point Convert to Signed integer, rounding toward Zero (vector).
integer): Floating-point Convert to Unsigned integer, rounding toward Zero (scalar).
integer): Floating-point Convert to Unsigned integer, rounding toward Zero (vector).
integer): Signed integer Convert to Floating-point (scalar).
integer): Signed integer Convert to Floating-point (vector).
integer): Unsigned integer Convert to Floating-point (scalar).
integer): Unsigned integer Convert to Floating-point (vector).
FCVTAS (scalar): Floating-point Convert to Signed
integer, rounding to nearest with ties to Away (scalar).
FCVTAU (scalar): Floating-point Convert to Unsigned
integer, rounding to nearest with ties to Away (scalar).
FCVTAS (vector): Floating-point Convert to Signed
integer, rounding to nearest with ties to Away (vector).
FCVTAU (vector): Floating-point Convert to Unsigned
integer, rounding to nearest with ties to Away (vector).
FCVTNS (scalar): Floating-point Convert to Signed
integer, rounding to nearest with ties to even (scalar).
FCVTNU (scalar): Floating-point Convert to Unsigned
integer, rounding to nearest with ties to even (scalar).
FCVTNS (vector): Floating-point Convert to Signed
integer, rounding to nearest with ties to even (vector).
FCVTNU (vector): Floating-point Convert to Unsigned
integer, rounding to nearest with ties to even (vector).
FCVTMS (scalar): Floating-point Convert to Signed
integer, rounding toward Minus infinity (scalar).
FCVTMU (scalar): Floating-point Convert to Unsigned
integer, rounding toward Minus infinity (scalar).
FCVTMS (vector): Floating-point Convert to Signed
integer, rounding toward Minus infinity (vector).
FCVTMU (vector): Floating-point Convert to Unsigned
integer, rounding toward Minus infinity (vector).
FCVTPS (scalar): Floating-point Convert to Signed
integer, rounding toward Plus infinity (scalar).
FCVTPU (scalar): Floating-point Convert to Unsigned
integer, rounding toward Plus infinity (scalar).
FCVTPS (vector): Floating-point Convert to Signed
integer, rounding toward Plus infinity (vector).
FCVTPU (vector): Floating-point Convert to Unsigned
integer, rounding toward Plus infinity (vector).
FCVTZS (scalar, integer): Floating-point Convert to Signed
integer, rounding toward Zero (scalar).
FCVTZU (scalar, integer): Floating-point Convert to Unsigned
integer, rounding toward Zero (scalar).
FCVTZS (vector, integer): Floating-point Convert to Signed
integer, rounding toward Zero (vector).
FCVTZU (vector, integer): Floating-point Convert to Unsigned
integer, rounding toward Zero (vector).
FRINTX (scalar): Floating-point Round to
Integral exact, using current rounding mode (scalar).
FRINTX (vector): Floating-point Round to
Integral exact, using current rounding mode (vector).
FRINTA (scalar): Floating-point Round to
Integral, to nearest with ties to Away (scalar).
FRINTA (vector): Floating-point Round to
Integral, to nearest with ties to Away (vector).
FRINTN (scalar): Floating-point Round to
Integral, to nearest with ties to even (scalar).
FRINTN (vector): Floating-point Round to
Integral, to nearest with ties to even (vector).
FRINTM (scalar): Floating-point Round to
Integral, toward Minus infinity (scalar).
FRINTM (vector): Floating-point Round to
Integral, toward Minus infinity (vector).
FRINTP (scalar): Floating-point Round to
Integral, toward Plus infinity (scalar).
FRINTP (vector): Floating-point Round to
Integral, toward Plus infinity (vector).
FRINTZ (scalar): Floating-point Round to
Integral, toward Zero (scalar).
FRINTZ (vector): Floating-point Round to
Integral, toward Zero (vector).
FRINTI (scalar): Floating-point Round to
Integral, using current rounding mode (scalar).
FRINTI (vector): Floating-point Round to
Integral, using current rounding mode (vector).
WFI: Wait For
Interrupt.
TLBI: TLB
Invalidate operation: an alias of SYS.
AESIMC: AES
inverse mix columns.
CSINV: Conditional Select
Invert.
CINV: Conditional
Invert: an alias of CSINV.
MVNI: Move
inverted Immediate (vector).
MOV (inverted wide immediate): Move (
inverted wide immediate): an alias of MOVN.
inverted wide immediate): Move (inverted wide immediate): an alias of MOVN.
ISB: Instruction Synchronization Barrier.
MOVK: Move wide with
keep.
AUTDA, AUTDZA: Authenticate Data address, using
key A.
AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA: Authenticate Instruction address, using
key A.
PACDA, PACDZA: Pointer Authentication Code for Data address, using
key A.
PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA: Pointer Authentication Code for Instruction address, using
key A.
AUTDB, AUTDZB: Authenticate Data address, using
key B.
AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB: Authenticate Instruction address, using
key B.
PACDB, PACDZB: Pointer Authentication Code for Data address, using
key B.
PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB: Pointer Authentication Code for Instruction address, using
key B.
PACGA: Pointer Authentication Code, using Generic
key.
SM4EKEY: SM4
Key.
LD4 (single structure): Load single 4-element structure to one
ST4 (single structure): Store single 4-element structure from one
lane of four registers.
LD1 (single structure): Load one single-element structure to one
lane of one register.
ST1 (single structure): Store a single-element structure from one
lane of one register.
LD3 (single structure): Load single 3-element structure to one
lane of three registers).
ST3 (single structure): Store single 3-element structure from one
lane of three registers.
LD2 (single structure): Load single 2-element structure to one
lane of two registers.
ST2 (single structure): Store single 2-element structure from one
lane of two registers.
LD1R: Load one single-element structure and Replicate to all
lanes (of one register).
LD4R: Load single 4-element structure and Replicate to all
lanes of four registers.
LD3R: Load single 3-element structure and Replicate to all
lanes of three registers.
LD2R: Load single 2-element structure and Replicate to all
lanes of two registers.
LD1 (multiple structures): Load multiple single-element structures to one, two, three, or four registers.
LD1 (single structure): Load one single-element structure to one lane of one register.
LD1R: Load one single-element structure and Replicate to all lanes (of one register).
LD2 (multiple structures): Load multiple 2-element structures to two registers.
LD2 (single structure): Load single 2-element structure to one lane of two registers.
LD2R: Load single 2-element structure and Replicate to all lanes of two registers.
LD3 (multiple structures): Load multiple 3-element structures to three registers.
LD3 (single structure): Load single 3-element structure to one lane of three registers).
LD3R: Load single 3-element structure and Replicate to all lanes of three registers.
LD4 (multiple structures): Load multiple 4-element structures to four registers.
LD4 (single structure): Load single 4-element structure to one lane of four registers.
LD4R: Load single 4-element structure and Replicate to all lanes of four registers.
STADD, STADDL: Atomic add on word or doubleword in memory, without return: an alias of
LDADD, LDADDA, LDADDAL, LDADDL.
LDADD, LDADDA, LDADDAL, LDADDL: Atomic add on word or doubleword in memory.
STADD, STADDL: Atomic add on word or doubleword in memory, without return: an alias of LDADD,
LDADDA, LDADDAL, LDADDL.
LDADDA, LDADDAL, LDADDL: Atomic add on word or doubleword in memory.
STADDB, STADDLB: Atomic add on byte in memory, without return: an alias of LDADDB,
LDADDAB, LDADDALB, LDADDLB.
LDADDAB, LDADDALB, LDADDLB: Atomic add on byte in memory.
STADDH, STADDLH: Atomic add on halfword in memory, without return: an alias of LDADDH,
LDADDAH, LDADDALH, LDADDLH.
LDADDAH, LDADDALH, LDADDLH: Atomic add on halfword in memory.
STADD, STADDL: Atomic add on word or doubleword in memory, without return: an alias of LDADD, LDADDA,
LDADDAL, LDADDL.
LDADDAL, LDADDL: Atomic add on word or doubleword in memory.
STADDB, STADDLB: Atomic add on byte in memory, without return: an alias of LDADDB, LDADDAB,
LDADDALB, LDADDLB.
LDADDALB, LDADDLB: Atomic add on byte in memory.
STADDH, STADDLH: Atomic add on halfword in memory, without return: an alias of LDADDH, LDADDAH,
LDADDALH, LDADDLH.
LDADDALH, LDADDLH: Atomic add on halfword in memory.
STADDB, STADDLB: Atomic add on byte in memory, without return: an alias of
LDADDB, LDADDAB, LDADDALB, LDADDLB.
LDADDB, LDADDAB, LDADDALB, LDADDLB: Atomic add on byte in memory.
STADDH, STADDLH: Atomic add on halfword in memory, without return: an alias of
LDADDH, LDADDAH, LDADDALH, LDADDLH.
LDADDH, LDADDAH, LDADDALH, LDADDLH: Atomic add on halfword in memory.
STADD, STADDL: Atomic add on word or doubleword in memory, without return: an alias of LDADD, LDADDA, LDADDAL,
LDADDL.
LDADDL: Atomic add on word or doubleword in memory.
STADDB, STADDLB: Atomic add on byte in memory, without return: an alias of LDADDB, LDADDAB, LDADDALB,
LDADDLB.
LDADDLB: Atomic add on byte in memory.
STADDH, STADDLH: Atomic add on halfword in memory, without return: an alias of LDADDH, LDADDAH, LDADDALH,
LDADDLH.
LDADDLH: Atomic add on halfword in memory.
LDAPR: Load-Acquire RCpc Register.
LDAPRB: Load-Acquire RCpc Register Byte.
LDAPRH: Load-Acquire RCpc Register Halfword.
LDAR: Load-Acquire Register.
LDARB: Load-Acquire Register Byte.
LDARH: Load-Acquire Register Halfword.
LDAXP: Load-Acquire Exclusive Pair of Registers.
LDAXR: Load-Acquire Exclusive Register.
LDAXRB: Load-Acquire Exclusive Register Byte.
LDAXRH: Load-Acquire Exclusive Register Halfword.
STCLR, STCLRL: Atomic bit clear on word or doubleword in memory, without return: an alias of
LDCLR, LDCLRA, LDCLRAL, LDCLRL.
LDCLR, LDCLRA, LDCLRAL, LDCLRL: Atomic bit clear on word or doubleword in memory.
STCLR, STCLRL: Atomic bit clear on word or doubleword in memory, without return: an alias of LDCLR,
LDCLRA, LDCLRAL, LDCLRL.
LDCLRA, LDCLRAL, LDCLRL: Atomic bit clear on word or doubleword in memory.
STCLRB, STCLRLB: Atomic bit clear on byte in memory, without return: an alias of LDCLRB,
LDCLRAB, LDCLRALB, LDCLRLB.
LDCLRAB, LDCLRALB, LDCLRLB: Atomic bit clear on byte in memory.
STCLRH, STCLRLH: Atomic bit clear on halfword in memory, without return: an alias of LDCLRH,
LDCLRAH, LDCLRALH, LDCLRLH.
LDCLRAH, LDCLRALH, LDCLRLH: Atomic bit clear on halfword in memory.
STCLR, STCLRL: Atomic bit clear on word or doubleword in memory, without return: an alias of LDCLR, LDCLRA,
LDCLRAL, LDCLRL.
LDCLRAL, LDCLRL: Atomic bit clear on word or doubleword in memory.
STCLRB, STCLRLB: Atomic bit clear on byte in memory, without return: an alias of LDCLRB, LDCLRAB,
LDCLRALB, LDCLRLB.
LDCLRALB, LDCLRLB: Atomic bit clear on byte in memory.
STCLRH, STCLRLH: Atomic bit clear on halfword in memory, without return: an alias of LDCLRH, LDCLRAH,
LDCLRALH, LDCLRLH.
LDCLRALH, LDCLRLH: Atomic bit clear on halfword in memory.
STCLRB, STCLRLB: Atomic bit clear on byte in memory, without return: an alias of
LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB: Atomic bit clear on byte in memory.
STCLRH, STCLRLH: Atomic bit clear on halfword in memory, without return: an alias of
LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH: Atomic bit clear on halfword in memory.
STCLR, STCLRL: Atomic bit clear on word or doubleword in memory, without return: an alias of LDCLR, LDCLRA, LDCLRAL,
LDCLRL.
LDCLRL: Atomic bit clear on word or doubleword in memory.
STCLRB, STCLRLB: Atomic bit clear on byte in memory, without return: an alias of LDCLRB, LDCLRAB, LDCLRALB,
LDCLRLB.
LDCLRLB: Atomic bit clear on byte in memory.
STCLRH, STCLRLH: Atomic bit clear on halfword in memory, without return: an alias of LDCLRH, LDCLRAH, LDCLRALH,
LDCLRLH.
LDCLRLH: Atomic bit clear on halfword in memory.
STEOR, STEORL: Atomic exclusive OR on word or doubleword in memory, without return: an alias of
LDEOR, LDEORA, LDEORAL, LDEORL.
LDEOR, LDEORA, LDEORAL, LDEORL: Atomic exclusive OR on word or doubleword in memory.
STEOR, STEORL: Atomic exclusive OR on word or doubleword in memory, without return: an alias of LDEOR,
LDEORA, LDEORAL, LDEORL.
LDEORA, LDEORAL, LDEORL: Atomic exclusive OR on word or doubleword in memory.
STEORB, STEORLB: Atomic exclusive OR on byte in memory, without return: an alias of LDEORB,
LDEORAB, LDEORALB, LDEORLB.
LDEORAB, LDEORALB, LDEORLB: Atomic exclusive OR on byte in memory.
STEORH, STEORLH: Atomic exclusive OR on halfword in memory, without return: an alias of LDEORH,
LDEORAH, LDEORALH, LDEORLH.
LDEORAH, LDEORALH, LDEORLH: Atomic exclusive OR on halfword in memory.
STEOR, STEORL: Atomic exclusive OR on word or doubleword in memory, without return: an alias of LDEOR, LDEORA,
LDEORAL, LDEORL.
LDEORAL, LDEORL: Atomic exclusive OR on word or doubleword in memory.
STEORB, STEORLB: Atomic exclusive OR on byte in memory, without return: an alias of LDEORB, LDEORAB,
LDEORALB, LDEORLB.
LDEORALB, LDEORLB: Atomic exclusive OR on byte in memory.
STEORH, STEORLH: Atomic exclusive OR on halfword in memory, without return: an alias of LDEORH, LDEORAH,
LDEORALH, LDEORLH.
LDEORALH, LDEORLH: Atomic exclusive OR on halfword in memory.
STEORB, STEORLB: Atomic exclusive OR on byte in memory, without return: an alias of
LDEORB, LDEORAB, LDEORALB, LDEORLB.
LDEORB, LDEORAB, LDEORALB, LDEORLB: Atomic exclusive OR on byte in memory.
STEORH, STEORLH: Atomic exclusive OR on halfword in memory, without return: an alias of
LDEORH, LDEORAH, LDEORALH, LDEORLH.
LDEORH, LDEORAH, LDEORALH, LDEORLH: Atomic exclusive OR on halfword in memory.
STEOR, STEORL: Atomic exclusive OR on word or doubleword in memory, without return: an alias of LDEOR, LDEORA, LDEORAL,
LDEORL.
LDEORL: Atomic exclusive OR on word or doubleword in memory.
STEORB, STEORLB: Atomic exclusive OR on byte in memory, without return: an alias of LDEORB, LDEORAB, LDEORALB,
LDEORLB.
LDEORLB: Atomic exclusive OR on byte in memory.
STEORH, STEORLH: Atomic exclusive OR on halfword in memory, without return: an alias of LDEORH, LDEORAH, LDEORALH,
LDEORLH.
LDEORLH: Atomic exclusive OR on halfword in memory.
LDLAR: Load LOAcquire Register.
LDLARB: Load LOAcquire Register Byte.
LDLARH: Load LOAcquire Register Halfword.
LDNP (SIMD&FP): Load Pair of SIMD&FP registers, with Non-temporal hint.
LDNP: Load Pair of Registers, with non-temporal hint.
LDP (SIMD&FP): Load Pair of SIMD&FP registers.
LDP: Load Pair of Registers.
LDPSW: Load Pair of Registers Signed Word.
LDR (immediate): Load Register (immediate).
LDR (immediate, SIMD&FP): Load SIMD&FP Register (immediate offset).
LDR (literal): Load Register (literal).
LDR (literal, SIMD&FP): Load SIMD&FP Register (PC-relative literal).
LDR (register): Load Register (register).
LDR (register, SIMD&FP): Load SIMD&FP Register (register offset).
LDRAA, LDRAB: Load Register, with pointer authentication.
LDRB (immediate): Load Register Byte (immediate).
LDRB (register): Load Register Byte (register).
LDRH (immediate): Load Register Halfword (immediate).
LDRH (register): Load Register Halfword (register).
LDRSB (immediate): Load Register Signed Byte (immediate).
LDRSB (register): Load Register Signed Byte (register).
LDRSH (immediate): Load Register Signed Halfword (immediate).
LDRSH (register): Load Register Signed Halfword (register).
LDRSW (immediate): Load Register Signed Word (immediate).
LDRSW (literal): Load Register Signed Word (literal).
LDRSW (register): Load Register Signed Word (register).
STSET, STSETL: Atomic bit set on word or doubleword in memory, without return: an alias of
LDSET, LDSETA, LDSETAL, LDSETL.
LDSET, LDSETA, LDSETAL, LDSETL: Atomic bit set on word or doubleword in memory.
STSET, STSETL: Atomic bit set on word or doubleword in memory, without return: an alias of LDSET,
LDSETA, LDSETAL, LDSETL.
LDSETA, LDSETAL, LDSETL: Atomic bit set on word or doubleword in memory.
STSETB, STSETLB: Atomic bit set on byte in memory, without return: an alias of LDSETB,
LDSETAB, LDSETALB, LDSETLB.
LDSETAB, LDSETALB, LDSETLB: Atomic bit set on byte in memory.
STSETH, STSETLH: Atomic bit set on halfword in memory, without return: an alias of LDSETH,
LDSETAH, LDSETALH, LDSETLH.
LDSETAH, LDSETALH, LDSETLH: Atomic bit set on halfword in memory.
STSET, STSETL: Atomic bit set on word or doubleword in memory, without return: an alias of LDSET, LDSETA,
LDSETAL, LDSETL.
LDSETAL, LDSETL: Atomic bit set on word or doubleword in memory.
STSETB, STSETLB: Atomic bit set on byte in memory, without return: an alias of LDSETB, LDSETAB,
LDSETALB, LDSETLB.
LDSETALB, LDSETLB: Atomic bit set on byte in memory.
STSETH, STSETLH: Atomic bit set on halfword in memory, without return: an alias of LDSETH, LDSETAH,
LDSETALH, LDSETLH.
LDSETALH, LDSETLH: Atomic bit set on halfword in memory.
STSETB, STSETLB: Atomic bit set on byte in memory, without return: an alias of
LDSETB, LDSETAB, LDSETALB, LDSETLB.
LDSETB, LDSETAB, LDSETALB, LDSETLB: Atomic bit set on byte in memory.
STSETH, STSETLH: Atomic bit set on halfword in memory, without return: an alias of
LDSETH, LDSETAH, LDSETALH, LDSETLH.
LDSETH, LDSETAH, LDSETALH, LDSETLH: Atomic bit set on halfword in memory.
STSET, STSETL: Atomic bit set on word or doubleword in memory, without return: an alias of LDSET, LDSETA, LDSETAL,
LDSETL.
LDSETL: Atomic bit set on word or doubleword in memory.
STSETB, STSETLB: Atomic bit set on byte in memory, without return: an alias of LDSETB, LDSETAB, LDSETALB,
LDSETLB.
LDSETLB: Atomic bit set on byte in memory.
STSETH, STSETLH: Atomic bit set on halfword in memory, without return: an alias of LDSETH, LDSETAH, LDSETALH,
LDSETLH.
LDSETLH: Atomic bit set on halfword in memory.
STSMAX, STSMAXL: Atomic signed maximum on word or doubleword in memory, without return: an alias of
LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL: Atomic signed maximum on word or doubleword in memory.
STSMAX, STSMAXL: Atomic signed maximum on word or doubleword in memory, without return: an alias of LDSMAX,
LDSMAXA, LDSMAXAL, LDSMAXL.
LDSMAXA, LDSMAXAL, LDSMAXL: Atomic signed maximum on word or doubleword in memory.
STSMAXB, STSMAXLB: Atomic signed maximum on byte in memory, without return: an alias of LDSMAXB,
LDSMAXAB, LDSMAXALB, LDSMAXLB.
LDSMAXAB, LDSMAXALB, LDSMAXLB: Atomic signed maximum on byte in memory.
STSMAXH, STSMAXLH: Atomic signed maximum on halfword in memory, without return: an alias of LDSMAXH,
LDSMAXAH, LDSMAXALH, LDSMAXLH.
LDSMAXAH, LDSMAXALH, LDSMAXLH: Atomic signed maximum on halfword in memory.
STSMAX, STSMAXL: Atomic signed maximum on word or doubleword in memory, without return: an alias of LDSMAX, LDSMAXA,
LDSMAXAL, LDSMAXL.
LDSMAXAL, LDSMAXL: Atomic signed maximum on word or doubleword in memory.
STSMAXB, STSMAXLB: Atomic signed maximum on byte in memory, without return: an alias of LDSMAXB, LDSMAXAB,
LDSMAXALB, LDSMAXLB.
LDSMAXALB, LDSMAXLB: Atomic signed maximum on byte in memory.
STSMAXH, STSMAXLH: Atomic signed maximum on halfword in memory, without return: an alias of LDSMAXH, LDSMAXAH,
LDSMAXALH, LDSMAXLH.
LDSMAXALH, LDSMAXLH: Atomic signed maximum on halfword in memory.
STSMAXB, STSMAXLB: Atomic signed maximum on byte in memory, without return: an alias of
LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB: Atomic signed maximum on byte in memory.
STSMAXH, STSMAXLH: Atomic signed maximum on halfword in memory, without return: an alias of
LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH: Atomic signed maximum on halfword in memory.
STSMAX, STSMAXL: Atomic signed maximum on word or doubleword in memory, without return: an alias of LDSMAX, LDSMAXA, LDSMAXAL,
LDSMAXL.
LDSMAXL: Atomic signed maximum on word or doubleword in memory.
STSMAXB, STSMAXLB: Atomic signed maximum on byte in memory, without return: an alias of LDSMAXB, LDSMAXAB, LDSMAXALB,
LDSMAXLB.
LDSMAXLB: Atomic signed maximum on byte in memory.
STSMAXH, STSMAXLH: Atomic signed maximum on halfword in memory, without return: an alias of LDSMAXH, LDSMAXAH, LDSMAXALH,
LDSMAXLH.
LDSMAXLH: Atomic signed maximum on halfword in memory.
STSMIN, STSMINL: Atomic signed minimum on word or doubleword in memory, without return: an alias of
LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
LDSMIN, LDSMINA, LDSMINAL, LDSMINL: Atomic signed minimum on word or doubleword in memory.
STSMIN, STSMINL: Atomic signed minimum on word or doubleword in memory, without return: an alias of LDSMIN,
LDSMINA, LDSMINAL, LDSMINL.
LDSMINA, LDSMINAL, LDSMINL: Atomic signed minimum on word or doubleword in memory.
STSMINB, STSMINLB: Atomic signed minimum on byte in memory, without return: an alias of LDSMINB,
LDSMINAB, LDSMINALB, LDSMINLB.
LDSMINAB, LDSMINALB, LDSMINLB: Atomic signed minimum on byte in memory.
STSMINH, STSMINLH: Atomic signed minimum on halfword in memory, without return: an alias of LDSMINH,
LDSMINAH, LDSMINALH, LDSMINLH.
LDSMINAH, LDSMINALH, LDSMINLH: Atomic signed minimum on halfword in memory.
STSMIN, STSMINL: Atomic signed minimum on word or doubleword in memory, without return: an alias of LDSMIN, LDSMINA,
LDSMINAL, LDSMINL.
LDSMINAL, LDSMINL: Atomic signed minimum on word or doubleword in memory.
STSMINB, STSMINLB: Atomic signed minimum on byte in memory, without return: an alias of LDSMINB, LDSMINAB,
LDSMINALB, LDSMINLB.
LDSMINALB, LDSMINLB: Atomic signed minimum on byte in memory.
STSMINH, STSMINLH: Atomic signed minimum on halfword in memory, without return: an alias of LDSMINH, LDSMINAH,
LDSMINALH, LDSMINLH.
LDSMINALH, LDSMINLH: Atomic signed minimum on halfword in memory.
STSMINB, STSMINLB: Atomic signed minimum on byte in memory, without return: an alias of
LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB: Atomic signed minimum on byte in memory.
STSMINH, STSMINLH: Atomic signed minimum on halfword in memory, without return: an alias of
LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH: Atomic signed minimum on halfword in memory.
STSMIN, STSMINL: Atomic signed minimum on word or doubleword in memory, without return: an alias of LDSMIN, LDSMINA, LDSMINAL,
LDSMINL.
LDSMINL: Atomic signed minimum on word or doubleword in memory.
STSMINB, STSMINLB: Atomic signed minimum on byte in memory, without return: an alias of LDSMINB, LDSMINAB, LDSMINALB,
LDSMINLB.
LDSMINLB: Atomic signed minimum on byte in memory.
STSMINH, STSMINLH: Atomic signed minimum on halfword in memory, without return: an alias of LDSMINH, LDSMINAH, LDSMINALH,
LDSMINLH.
LDSMINLH: Atomic signed minimum on halfword in memory.
LDTR: Load Register (unprivileged).
LDTRB: Load Register Byte (unprivileged).
LDTRH: Load Register Halfword (unprivileged).
LDTRSB: Load Register Signed Byte (unprivileged).
LDTRSH: Load Register Signed Halfword (unprivileged).
LDTRSW: Load Register Signed Word (unprivileged).
STUMAX, STUMAXL: Atomic unsigned maximum on word or doubleword in memory, without return: an alias of
LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL: Atomic unsigned maximum on word or doubleword in memory.
STUMAX, STUMAXL: Atomic unsigned maximum on word or doubleword in memory, without return: an alias of LDUMAX,
LDUMAXA, LDUMAXAL, LDUMAXL.
LDUMAXA, LDUMAXAL, LDUMAXL: Atomic unsigned maximum on word or doubleword in memory.
STUMAXB, STUMAXLB: Atomic unsigned maximum on byte in memory, without return: an alias of LDUMAXB,
LDUMAXAB, LDUMAXALB, LDUMAXLB.
LDUMAXAB, LDUMAXALB, LDUMAXLB: Atomic unsigned maximum on byte in memory.
STUMAXH, STUMAXLH: Atomic unsigned maximum on halfword in memory, without return: an alias of LDUMAXH,
LDUMAXAH, LDUMAXALH, LDUMAXLH.
LDUMAXAH, LDUMAXALH, LDUMAXLH: Atomic unsigned maximum on halfword in memory.
STUMAX, STUMAXL: Atomic unsigned maximum on word or doubleword in memory, without return: an alias of LDUMAX, LDUMAXA,
LDUMAXAL, LDUMAXL.
LDUMAXAL, LDUMAXL: Atomic unsigned maximum on word or doubleword in memory.
STUMAXB, STUMAXLB: Atomic unsigned maximum on byte in memory, without return: an alias of LDUMAXB, LDUMAXAB,
LDUMAXALB, LDUMAXLB.
LDUMAXALB, LDUMAXLB: Atomic unsigned maximum on byte in memory.
STUMAXH, STUMAXLH: Atomic unsigned maximum on halfword in memory, without return: an alias of LDUMAXH, LDUMAXAH,
LDUMAXALH, LDUMAXLH.
LDUMAXALH, LDUMAXLH: Atomic unsigned maximum on halfword in memory.
STUMAXB, STUMAXLB: Atomic unsigned maximum on byte in memory, without return: an alias of
LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB: Atomic unsigned maximum on byte in memory.
STUMAXH, STUMAXLH: Atomic unsigned maximum on halfword in memory, without return: an alias of
LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH: Atomic unsigned maximum on halfword in memory.
STUMAX, STUMAXL: Atomic unsigned maximum on word or doubleword in memory, without return: an alias of LDUMAX, LDUMAXA, LDUMAXAL,
LDUMAXL.
LDUMAXL: Atomic unsigned maximum on word or doubleword in memory.
STUMAXB, STUMAXLB: Atomic unsigned maximum on byte in memory, without return: an alias of LDUMAXB, LDUMAXAB, LDUMAXALB,
LDUMAXLB.
LDUMAXLB: Atomic unsigned maximum on byte in memory.
STUMAXH, STUMAXLH: Atomic unsigned maximum on halfword in memory, without return: an alias of LDUMAXH, LDUMAXAH, LDUMAXALH,
LDUMAXLH.
LDUMAXLH: Atomic unsigned maximum on halfword in memory.
STUMIN, STUMINL: Atomic unsigned minimum on word or doubleword in memory, without return: an alias of
LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
LDUMIN, LDUMINA, LDUMINAL, LDUMINL: Atomic unsigned minimum on word or doubleword in memory.
STUMIN, STUMINL: Atomic unsigned minimum on word or doubleword in memory, without return: an alias of LDUMIN,
LDUMINA, LDUMINAL, LDUMINL.
LDUMINA, LDUMINAL, LDUMINL: Atomic unsigned minimum on word or doubleword in memory.
STUMINB, STUMINLB: Atomic unsigned minimum on byte in memory, without return: an alias of LDUMINB,
LDUMINAB, LDUMINALB, LDUMINLB.
LDUMINAB, LDUMINALB, LDUMINLB: Atomic unsigned minimum on byte in memory.
STUMINH, STUMINLH: Atomic unsigned minimum on halfword in memory, without return: an alias of LDUMINH,
LDUMINAH, LDUMINALH, LDUMINLH.
LDUMINAH, LDUMINALH, LDUMINLH: Atomic unsigned minimum on halfword in memory.
STUMIN, STUMINL: Atomic unsigned minimum on word or doubleword in memory, without return: an alias of LDUMIN, LDUMINA,
LDUMINAL, LDUMINL.
LDUMINAL, LDUMINL: Atomic unsigned minimum on word or doubleword in memory.
STUMINB, STUMINLB: Atomic unsigned minimum on byte in memory, without return: an alias of LDUMINB, LDUMINAB,
LDUMINALB, LDUMINLB.
LDUMINALB, LDUMINLB: Atomic unsigned minimum on byte in memory.
STUMINH, STUMINLH: Atomic unsigned minimum on halfword in memory, without return: an alias of LDUMINH, LDUMINAH,
LDUMINALH, LDUMINLH.
LDUMINALH, LDUMINLH: Atomic unsigned minimum on halfword in memory.
STUMINB, STUMINLB: Atomic unsigned minimum on byte in memory, without return: an alias of
LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB: Atomic unsigned minimum on byte in memory.
STUMINH, STUMINLH: Atomic unsigned minimum on halfword in memory, without return: an alias of
LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH: Atomic unsigned minimum on halfword in memory.
STUMIN, STUMINL: Atomic unsigned minimum on word or doubleword in memory, without return: an alias of LDUMIN, LDUMINA, LDUMINAL,
LDUMINL.
LDUMINL: Atomic unsigned minimum on word or doubleword in memory.
STUMINB, STUMINLB: Atomic unsigned minimum on byte in memory, without return: an alias of LDUMINB, LDUMINAB, LDUMINALB,
LDUMINLB.
LDUMINLB: Atomic unsigned minimum on byte in memory.
STUMINH, STUMINLH: Atomic unsigned minimum on halfword in memory, without return: an alias of LDUMINH, LDUMINAH, LDUMINALH,
LDUMINLH.
LDUMINLH: Atomic unsigned minimum on halfword in memory.
LDUR (SIMD&FP): Load SIMD&FP Register (unscaled offset).
LDUR: Load Register (unscaled).
LDURB: Load Register Byte (unscaled).
LDURH: Load Register Halfword (unscaled).
LDURSB: Load Register Signed Byte (unscaled).
LDURSH: Load Register Signed Halfword (unscaled).
LDURSW: Load Register Signed Word (unscaled).
LDXP: Load Exclusive Pair of Registers.
LDXR: Load Exclusive Register.
LDXRB: Load Exclusive Register Byte.
LDXRH: Load Exclusive Register Halfword.
CLS (vector): Count
Leading Sign bits (vector).
CLS: Count
leading sign bits.
CLZ (vector): Count
Leading Zero bits (vector).
CLZ: Count
leading zero bits.
BFC: Bitfield Clear,
leaving other bits unchanged: an alias of BFM.
SHL: Shift
Left (immediate).
SQSHL (immediate): Signed saturating Shift
Left (immediate).
UQSHL (immediate): Unsigned saturating Shift
Left (immediate).
LSL (immediate): Logical Shift
Left (immediate): an alias of UBFM.
SQRSHL: Signed saturating Rounding Shift
Left (register).
SQSHL (register): Signed saturating Shift
Left (register).
SRSHL: Signed Rounding Shift
Left (register).
SSHL: Signed Shift
Left (register).
UQRSHL: Unsigned saturating Rounding Shift
Left (register).
UQSHL (register): Unsigned saturating Shift
Left (register).
URSHL: Unsigned Rounding Shift
Left (register).
USHL: Unsigned Shift
Left (register).
LSL (register): Logical Shift
Left (register): an alias of LSLV.
SLI: Shift
Left and Insert (immediate).
SHLL, SHLL2: Shift
Left Long (by element size).
SSHLL, SSHLL2: Signed Shift
Left Long (immediate).
USHLL, USHLL2: Unsigned Shift
Left Long (immediate).
SQSHLU: Signed saturating Shift
Left Unsigned (immediate).
LSLV: Logical Shift
Left Variable.
CMLE (zero): Compare signed
Less than or Equal to zero (vector).
FCMLE (zero): Floating-point Compare
Less than or Equal to zero (vector).
CMLT (zero): Compare signed
Less than zero (vector).
FCMLT (zero): Floating-point Compare
Less than zero (vector).
BLRAA, BLRAAZ, BLRAB, BLRABZ: Branch with
Link to Register, with pointer authentication.
BLR: Branch with
Link to Register.
BL: Branch with
Link.
LDR (literal): Load Register (
literal).
LDR (literal, SIMD&FP): Load SIMD&FP Register (PC-relative
literal).
LDRSW (literal): Load Register Signed Word (
literal).
PRFM (literal): Prefetch Memory (
literal).
literal, SIMD&FP): Load SIMD&FP Register (PC-relative literal).
LDXP:
Load Exclusive Pair of Registers.
Load Exclusive Register Byte.
Load Exclusive Register Halfword.
LDXR:
Load Exclusive Register.
Load LOAcquire Register Byte.
Load LOAcquire Register Halfword.
Load LOAcquire Register.
Load multiple 2-element structures to two registers.
Load multiple 3-element structures to three registers.
Load multiple 4-element structures to four registers.
Load multiple single-element structures to one, two, three, or four registers.
LD1R:
Load one single-element structure and Replicate to all lanes (of one register).
Load one single-element structure to one lane of one register.
Load Pair of Registers Signed Word.
LDNP:
Load Pair of Registers, with non-temporal hint.
LDP:
Load Pair of Registers.
Load Pair of SIMD&FP registers, with Non-temporal hint.
Load Pair of SIMD&FP registers.
Load Register (immediate).
Load Register (literal).
Load Register (register).
LDTR:
Load Register (unprivileged).
LDUR:
Load Register (unscaled).
Load Register Byte (immediate).
Load Register Byte (register).
Load Register Byte (unprivileged).
Load Register Byte (unscaled).
Load Register Halfword (immediate).
Load Register Halfword (register).
Load Register Halfword (unprivileged).
Load Register Halfword (unscaled).
Load Register Signed Byte (immediate).
Load Register Signed Byte (register).
Load Register Signed Byte (unprivileged).
Load Register Signed Byte (unscaled).
Load Register Signed Halfword (immediate).
Load Register Signed Halfword (register).
Load Register Signed Halfword (unprivileged).
Load Register Signed Halfword (unscaled).
Load Register Signed Word (immediate).
Load Register Signed Word (literal).
Load Register Signed Word (register).
Load Register Signed Word (unprivileged).
Load Register Signed Word (unscaled).
Load Register, with pointer authentication.
Load SIMD&FP Register (immediate offset).
Load SIMD&FP Register (PC-relative literal).
Load SIMD&FP Register (register offset).
Load SIMD&FP Register (unscaled offset).
LD2R:
Load single 2-element structure and Replicate to all lanes of two registers.
Load single 2-element structure to one lane of two registers.
LD3R:
Load single 3-element structure and Replicate to all lanes of three registers.
Load single 3-element structure to one lane of three registers).
LD4R:
Load single 4-element structure and Replicate to all lanes of four registers.
Load single 4-element structure to one lane of four registers.
Load-Acquire Exclusive Pair of Registers.
Load-Acquire Exclusive Register Byte.
Load-Acquire Exclusive Register Halfword.
Load-Acquire Exclusive Register.
Load-Acquire RCpc Register Byte.
Load-Acquire RCpc Register Halfword.
Load-Acquire RCpc Register.
Load-Acquire Register Byte.
Load-Acquire Register Halfword.
LDAR:
Load-Acquire Register.
SEVL: Send Event
Local.
Logical Shift Left (immediate): an alias of UBFM.
Logical Shift Left (register): an alias of LSLV.
LSLV:
Logical Shift Left Variable.
Logical Shift Right (immediate): an alias of UBFM.
Logical Shift Right (register): an alias of LSRV.
LSRV:
Logical Shift Right Variable.
SHLL, SHLL2: Shift Left
Long (by element size).
SQDMLAL, SQDMLAL2 (by element): Signed saturating Doubling Multiply-Add
Long (by element).
SQDMLSL, SQDMLSL2 (by element): Signed saturating Doubling Multiply-Subtract
Long (by element).
SQDMULL, SQDMULL2 (by element): Signed saturating Doubling Multiply
Long (by element).
SSHLL, SSHLL2: Signed Shift Left
Long (immediate).
USHLL, USHLL2: Unsigned Shift Left
Long (immediate).
FCVTL, FCVTL2: Floating-point Convert to higher precision
Long (vector).
SADDL, SADDL2: Signed Add
Long (vector).
SMLAL, SMLAL2 (vector): Signed Multiply-Add
Long (vector).
SMLSL, SMLSL2 (vector): Signed Multiply-Subtract
Long (vector).
SMULL, SMULL2 (vector): Signed Multiply
Long (vector).
UADDL, UADDL2: Unsigned Add
Long (vector).
UMLAL, UMLAL2 (vector): Unsigned Multiply-Add
Long (vector).
UMLSL, UMLSL2 (vector): Unsigned Multiply-Subtract
Long (vector).
UMULL, UMULL2 (vector): Unsigned Multiply
long (vector).
SMLAL, SMLAL2 (by element): Signed Multiply-Add
Long (vector, by element).
SMLSL, SMLSL2 (by element): Signed Multiply-Subtract
Long (vector, by element).
SMULL, SMULL2 (by element): Signed Multiply
Long (vector, by element).
UMLAL, UMLAL2 (by element): Unsigned Multiply-Add
Long (vector, by element).
UMLSL, UMLSL2 (by element): Unsigned Multiply-Subtract
Long (vector, by element).
UMULL, UMULL2 (by element): Unsigned Multiply
Long (vector, by element).
SADDLV: Signed Add
Long across Vector.
UADDLV: Unsigned sum
Long across Vector.
FMLSL, FMLSL2 (by element): Floating-point fused Multiply-Subtract
Long from accumulator (by element).
FMLSL, FMLSL2 (vector): Floating-point fused Multiply-Subtract
Long from accumulator (vector).
SADALP: Signed Add and Accumulate
Long Pairwise.
SADDLP: Signed Add
Long Pairwise.
UADALP: Unsigned Add and Accumulate
Long Pairwise.
UADDLP: Unsigned Add
Long Pairwise.
FMLAL, FMLAL2 (by element): Floating-point fused Multiply-Add
Long to accumulator (by element).
FMLAL, FMLAL2 (vector): Floating-point fused Multiply-Add
Long to accumulator (vector).
PMULL, PMULL2: Polynomial Multiply
Long.
SABAL, SABAL2: Signed Absolute difference and Accumulate
Long.
SABDL, SABDL2: Signed Absolute Difference
Long.
SMADDL: Signed Multiply-Add
Long.
SMSUBL: Signed Multiply-Subtract
Long.
SQDMLAL, SQDMLAL2 (vector): Signed saturating Doubling Multiply-Add
Long.
SQDMLSL, SQDMLSL2 (vector): Signed saturating Doubling Multiply-Subtract
Long.
SQDMULL, SQDMULL2 (vector): Signed saturating Doubling Multiply
Long.
SSUBL, SSUBL2: Signed Subtract
Long.
UABAL, UABAL2: Unsigned Absolute difference and Accumulate
Long.
UABDL, UABDL2: Unsigned Absolute Difference
Long.
UMADDL: Unsigned Multiply-Add
Long.
UMSUBL: Unsigned Multiply-Subtract
Long.
USUBL, USUBL2: Unsigned Subtract
Long.
SMULL: Signed Multiply
Long: an alias of SMADDL.
SMNEGL: Signed Multiply-Negate
Long: an alias of SMSUBL.
SXTL, SXTL2: Signed extend
Long: an alias of SSHLL, SSHLL2.
UMULL: Unsigned Multiply
Long: an alias of UMADDL.
UMNEGL: Unsigned Multiply-Negate
Long: an alias of UMSUBL.
UXTL, UXTL2: Unsigned extend
Long: an alias of USHLL, USHLL2.
TBX: Table vector
lookup extension.
TBL: Table vector
Lookup.
BFXIL: Bitfield extract and insert at
low end: an alias of BFM.
FCVTN, FCVTN2: Floating-point Convert to
lower precision Narrow (vector).
FCVTXN, FCVTXN2: Floating-point Convert to
lower precision Narrow, rounding to odd (vector).
LSL (immediate): Logical Shift Left (immediate): an alias of UBFM.
LSL (register): Logical Shift Left (register): an alias of LSLV.
LSL (register): Logical Shift Left (register): an alias of
LSLV.
LSLV: Logical Shift Left Variable.
LSR (immediate): Logical Shift Right (immediate): an alias of UBFM.
LSR (register): Logical Shift Right (register): an alias of LSRV.
LSR (register): Logical Shift Right (register): an alias of
LSRV.
LSRV: Logical Shift Right Variable.
MADD: Multiply-Add.
SHA1M: SHA1 hash update (
majority).
CSETM: Conditional Set
Mask: an alias of CSINV.
FMAX (scalar): Floating-point
Maximum (scalar).
FMAX (vector): Floating-point
Maximum (vector).
SMAX: Signed
Maximum (vector).
UMAX: Unsigned
Maximum (vector).
FMAXV: Floating-point
Maximum across Vector.
SMAXV: Signed
Maximum across Vector.
UMAXV: Unsigned
Maximum across Vector.
FMAXNM (scalar): Floating-point
Maximum Number (scalar).
FMAXNM (vector): Floating-point
Maximum Number (vector).
FMAXNMV: Floating-point
Maximum Number across Vector.
FMAXNMP (scalar): Floating-point
Maximum Number of Pair of elements (scalar).
FMAXNMP (vector): Floating-point
Maximum Number Pairwise (vector).
FMAXP (scalar): Floating-point
Maximum of Pair of elements (scalar).
STSMAXB, STSMAXLB: Atomic signed
maximum on byte in memory, without return: an alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
STUMAXB, STUMAXLB: Atomic unsigned
maximum on byte in memory, without return: an alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB: Atomic signed
maximum on byte in memory.
LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB: Atomic unsigned
maximum on byte in memory.
STSMAXH, STSMAXLH: Atomic signed
maximum on halfword in memory, without return: an alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
STUMAXH, STUMAXLH: Atomic unsigned
maximum on halfword in memory, without return: an alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH: Atomic signed
maximum on halfword in memory.
LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH: Atomic unsigned
maximum on halfword in memory.
STSMAX, STSMAXL: Atomic signed
maximum on word or doubleword in memory, without return: an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
STUMAX, STUMAXL: Atomic unsigned
maximum on word or doubleword in memory, without return: an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL: Atomic signed
maximum on word or doubleword in memory.
LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL: Atomic unsigned
maximum on word or doubleword in memory.
FMAXP (vector): Floating-point
Maximum Pairwise (vector).
SMAXP: Signed
Maximum Pairwise.
UMAXP: Unsigned
Maximum Pairwise.
PRFM (immediate): Prefetch
Memory (immediate).
PRFM (literal): Prefetch
Memory (literal).
PRFM (register): Prefetch
Memory (register).
PRFM (unscaled offset): Prefetch
Memory (unscaled offset).
DMB: Data
Memory Barrier.
STADD, STADDL: Atomic add on word or doubleword in
memory, without return: an alias of LDADD, LDADDA, LDADDAL, LDADDL.
STADDB, STADDLB: Atomic add on byte in
memory, without return: an alias of LDADDB, LDADDAB, LDADDALB, LDADDLB.
STADDH, STADDLH: Atomic add on halfword in
memory, without return: an alias of LDADDH, LDADDAH, LDADDALH, LDADDLH.
STCLR, STCLRL: Atomic bit clear on word or doubleword in
memory, without return: an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
STCLRB, STCLRLB: Atomic bit clear on byte in
memory, without return: an alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
STCLRH, STCLRLH: Atomic bit clear on halfword in
memory, without return: an alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
STEOR, STEORL: Atomic exclusive OR on word or doubleword in
memory, without return: an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
STEORB, STEORLB: Atomic exclusive OR on byte in
memory, without return: an alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
STEORH, STEORLH: Atomic exclusive OR on halfword in
memory, without return: an alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
STSET, STSETL: Atomic bit set on word or doubleword in
memory, without return: an alias of LDSET, LDSETA, LDSETAL, LDSETL.
STSETB, STSETLB: Atomic bit set on byte in
memory, without return: an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
STSETH, STSETLH: Atomic bit set on halfword in
memory, without return: an alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
STSMAX, STSMAXL: Atomic signed maximum on word or doubleword in
memory, without return: an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
STSMAXB, STSMAXLB: Atomic signed maximum on byte in
memory, without return: an alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
STSMAXH, STSMAXLH: Atomic signed maximum on halfword in
memory, without return: an alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
STSMIN, STSMINL: Atomic signed minimum on word or doubleword in
memory, without return: an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
STSMINB, STSMINLB: Atomic signed minimum on byte in
memory, without return: an alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
STSMINH, STSMINLH: Atomic signed minimum on halfword in
memory, without return: an alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
STUMAX, STUMAXL: Atomic unsigned maximum on word or doubleword in
memory, without return: an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
STUMAXB, STUMAXLB: Atomic unsigned maximum on byte in
memory, without return: an alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
STUMAXH, STUMAXLH: Atomic unsigned maximum on halfword in
memory, without return: an alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
STUMIN, STUMINL: Atomic unsigned minimum on word or doubleword in
memory, without return: an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
STUMINB, STUMINLB: Atomic unsigned minimum on byte in
memory, without return: an alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
STUMINH, STUMINLH: Atomic unsigned minimum on halfword in
memory, without return: an alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
CAS, CASA, CASAL, CASL: Compare and Swap word or doubleword in
memory.
CASB, CASAB, CASALB, CASLB: Compare and Swap byte in
memory.
CASH, CASAH, CASALH, CASLH: Compare and Swap halfword in
memory.
CASP, CASPA, CASPAL, CASPL: Compare and Swap Pair of words or doublewords in
memory.
LDADD, LDADDA, LDADDAL, LDADDL: Atomic add on word or doubleword in
memory.
LDADDB, LDADDAB, LDADDALB, LDADDLB: Atomic add on byte in
memory.
LDADDH, LDADDAH, LDADDALH, LDADDLH: Atomic add on halfword in
memory.
LDCLR, LDCLRA, LDCLRAL, LDCLRL: Atomic bit clear on word or doubleword in
memory.
LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB: Atomic bit clear on byte in
memory.
LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH: Atomic bit clear on halfword in
memory.
LDEOR, LDEORA, LDEORAL, LDEORL: Atomic exclusive OR on word or doubleword in
memory.
LDEORB, LDEORAB, LDEORALB, LDEORLB: Atomic exclusive OR on byte in
memory.
LDEORH, LDEORAH, LDEORALH, LDEORLH: Atomic exclusive OR on halfword in
memory.
LDSET, LDSETA, LDSETAL, LDSETL: Atomic bit set on word or doubleword in
memory.
LDSETB, LDSETAB, LDSETALB, LDSETLB: Atomic bit set on byte in
memory.
LDSETH, LDSETAH, LDSETALH, LDSETLH: Atomic bit set on halfword in
memory.
LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL: Atomic signed maximum on word or doubleword in
memory.
LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB: Atomic signed maximum on byte in
memory.
LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH: Atomic signed maximum on halfword in
memory.
LDSMIN, LDSMINA, LDSMINAL, LDSMINL: Atomic signed minimum on word or doubleword in
memory.
LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB: Atomic signed minimum on byte in
memory.
LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH: Atomic signed minimum on halfword in
memory.
LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL: Atomic unsigned maximum on word or doubleword in
memory.
LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB: Atomic unsigned maximum on byte in
memory.
LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH: Atomic unsigned maximum on halfword in
memory.
LDUMIN, LDUMINA, LDUMINAL, LDUMINL: Atomic unsigned minimum on word or doubleword in
memory.
LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB: Atomic unsigned minimum on byte in
memory.
LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH: Atomic unsigned minimum on halfword in
memory.
SWP, SWPA, SWPAL, SWPL: Swap word or doubleword in
memory.
SWPB, SWPAB, SWPALB, SWPLB: Swap byte in
memory.
SWPH, SWPAH, SWPALH, SWPLH: Swap halfword in
memory.
FMIN (scalar): Floating-point
Minimum (scalar).
FMIN (vector): Floating-point
minimum (vector).
SMIN: Signed
Minimum (vector).
UMIN: Unsigned
Minimum (vector).
FMINV: Floating-point
Minimum across Vector.
SMINV: Signed
Minimum across Vector.
UMINV: Unsigned
Minimum across Vector.
FMINNM (scalar): Floating-point
Minimum Number (scalar).
FMINNM (vector): Floating-point
Minimum Number (vector).
FMINNMV: Floating-point
Minimum Number across Vector.
FMINNMP (scalar): Floating-point
Minimum Number of Pair of elements (scalar).
FMINNMP (vector): Floating-point
Minimum Number Pairwise (vector).
FMINP (scalar): Floating-point
Minimum of Pair of elements (scalar).
STSMINB, STSMINLB: Atomic signed
minimum on byte in memory, without return: an alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
STUMINB, STUMINLB: Atomic unsigned
minimum on byte in memory, without return: an alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB: Atomic signed
minimum on byte in memory.
LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB: Atomic unsigned
minimum on byte in memory.
STSMINH, STSMINLH: Atomic signed
minimum on halfword in memory, without return: an alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
STUMINH, STUMINLH: Atomic unsigned
minimum on halfword in memory, without return: an alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH: Atomic signed
minimum on halfword in memory.
LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH: Atomic unsigned
minimum on halfword in memory.
STSMIN, STSMINL: Atomic signed
minimum on word or doubleword in memory, without return: an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
STUMIN, STUMINL: Atomic unsigned
minimum on word or doubleword in memory, without return: an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
LDSMIN, LDSMINA, LDSMINAL, LDSMINL: Atomic signed
minimum on word or doubleword in memory.
LDUMIN, LDUMINA, LDUMINAL, LDUMINL: Atomic unsigned
minimum on word or doubleword in memory.
FMINP (vector): Floating-point
Minimum Pairwise (vector).
SMINP: Signed
Minimum Pairwise.
UMINP: Unsigned
Minimum Pairwise.
FCVTMS (scalar): Floating-point Convert to Signed integer, rounding toward
Minus infinity (scalar).
FCVTMU (scalar): Floating-point Convert to Unsigned integer, rounding toward
Minus infinity (scalar).
FRINTM (scalar): Floating-point Round to Integral, toward
Minus infinity (scalar).
FCVTMS (vector): Floating-point Convert to Signed integer, rounding toward
Minus infinity (vector).
FCVTMU (vector): Floating-point Convert to Unsigned integer, rounding toward
Minus infinity (vector).
FRINTM (vector): Floating-point Round to Integral, toward
Minus infinity (vector).
AESIMC: AES inverse
mix columns.
AESMC: AES
mix columns.
MLA (by element): Multiply-Add to accumulator (vector, by element).
MLA (vector): Multiply-Add to accumulator (vector).
MLS (by element): Multiply-Subtract from accumulator (vector, by element).
MLS (vector): Multiply-Subtract from accumulator (vector).
MNEG: Multiply-Negate: an alias of MSUB.
FRINTI (scalar): Floating-point Round to Integral, using current rounding
mode (scalar).
FRINTX (scalar): Floating-point Round to Integral exact, using current rounding
mode (scalar).
FRINTI (vector): Floating-point Round to Integral, using current rounding
mode (vector).
FRINTX (vector): Floating-point Round to Integral exact, using current rounding
mode (vector).
SMC: Secure
Monitor Call.
MOV (bitmask immediate): Move (bitmask immediate): an alias of ORR (immediate).
MOV (element): Move vector element to another vector element: an alias of INS (element).
MOV (from general): Move general-purpose register to a vector element: an alias of INS (general).
MOV (inverted wide immediate): Move (inverted wide immediate): an alias of MOVN.
MOV (register): Move (register): an alias of ORR (shifted register).
MOV (scalar): Move vector element to scalar: an alias of DUP (element).
MOV (to general): Move vector element to general-purpose register: an alias of UMOV.
MOV (to/from SP): Move between register and stack pointer: an alias of ADD (immediate).
MOV (vector): Move vector: an alias of ORR (vector, register).
MOV (wide immediate): Move (wide immediate): an alias of MOVZ.
Move (bitmask immediate): an alias of ORR (immediate).
Move (inverted wide immediate): an alias of MOVN.
Move (register): an alias of ORR (shifted register).
Move (wide immediate): an alias of MOVZ.
Move between register and stack pointer: an alias of ADD (immediate).
Move general-purpose register to a vector element: an alias of INS (general).
Move general-purpose register to System Register.
FMOV (scalar, immediate): Floating-point
move immediate (scalar).
FMOV (vector, immediate): Floating-point
move immediate (vector).
MOVI:
Move Immediate (vector).
Move immediate value to Special Register.
MVNI:
Move inverted Immediate (vector).
FMOV (register): Floating-point
Move register without conversion.
MRS:
Move System Register.
FMOV (general): Floating-point
Move to or from general-purpose register without conversion.
Move vector element to another vector element: an alias of INS (element).
SMOV: Signed
Move vector element to general-purpose register.
UMOV: Unsigned
Move vector element to general-purpose register.
Move vector element to general-purpose register: an alias of UMOV.
Move vector element to scalar: an alias of DUP (element).
Move vector: an alias of ORR (vector, register).
MOVK:
Move wide with keep.
MOVN:
Move wide with NOT.
MOVZ:
Move wide with zero.
BFM: Bitfield
Move.
SBFM: Signed Bitfield
Move.
UBFM: Unsigned Bitfield
Move.
MOVI: Move Immediate (vector).
MOVK: Move wide with keep.
MOV (inverted wide immediate): Move (inverted wide immediate): an alias of
MOVN.
MOVN: Move wide with NOT.
MOV (wide immediate): Move (wide immediate): an alias of
MOVZ.
MOVZ: Move wide with zero.
MRS: Move System Register.
MSR (immediate): Move immediate value to Special Register.
MSR (register): Move general-purpose register to System Register.
MNEG: Multiply-Negate: an alias of
MSUB.
MSUB: Multiply-Subtract.
MUL (by element): Multiply (vector, by element).
MUL (vector): Multiply (vector).
MUL: Multiply: an alias of MADD.
ST2 (multiple structures): Store
multiple 2-element structures from two registers.
multiple 2-element structures to two registers.
ST3 (multiple structures): Store
multiple 3-element structures from three registers.
multiple 3-element structures to three registers.
ST4 (multiple structures): Store
multiple 4-element structures from four registers.
multiple 4-element structures to four registers.
ST1 (multiple structures): Store
multiple single-element structures from one, two, three, or four registers.
multiple single-element structures to one, two, three, or four registers.
multiple structures): Load multiple 2-element structures to two registers.
multiple structures): Load multiple 3-element structures to three registers.
multiple structures): Load multiple 4-element structures to four registers.
multiple structures): Load multiple single-element structures to one, two, three, or four registers.
multiple structures): Store multiple 2-element structures from two registers.
multiple structures): Store multiple 3-element structures from three registers.
multiple structures): Store multiple 4-element structures from four registers.
multiple structures): Store multiple single-element structures from one, two, three, or four registers.
FMUL (by element): Floating-point
Multiply (by element).
FMUL (scalar): Floating-point
Multiply (scalar).
FMUL (vector): Floating-point
Multiply (vector).
Multiply (vector).
Multiply (vector, by element).
FCMLA (by element): Floating-point Complex
Multiply Accumulate (by element).
SQRDMLAH (by element): Signed Saturating Rounding Doubling
Multiply Accumulate returning High Half (by element).
SQRDMLAH (vector): Signed Saturating Rounding Doubling
Multiply Accumulate returning High Half (vector).
FCMLA: Floating-point Complex
Multiply Accumulate.
FMULX (by element): Floating-point
Multiply extended (by element).
FMULX: Floating-point
Multiply extended.
SMULH: Signed
Multiply High.
UMULH: Unsigned
Multiply High.
SQDMULL, SQDMULL2 (by element): Signed saturating Doubling
Multiply Long (by element).
SMULL, SMULL2 (vector): Signed
Multiply Long (vector).
UMULL, UMULL2 (vector): Unsigned
Multiply long (vector).
SMULL, SMULL2 (by element): Signed
Multiply Long (vector, by element).
UMULL, UMULL2 (by element): Unsigned
Multiply Long (vector, by element).
PMULL, PMULL2: Polynomial
Multiply Long.
SQDMULL, SQDMULL2 (vector): Signed saturating Doubling
Multiply Long.
SMULL: Signed
Multiply Long: an alias of SMADDL.
UMULL: Unsigned
Multiply Long: an alias of UMADDL.
SQDMULH (by element): Signed saturating Doubling
Multiply returning High half (by element).
SQRDMULH (by element): Signed saturating Rounding Doubling
Multiply returning High half (by element).
SQDMULH (vector): Signed saturating Doubling
Multiply returning High half.
SQRDMULH (vector): Signed saturating Rounding Doubling
Multiply returning High half.
SQRDMLSH (by element): Signed Saturating Rounding Doubling
Multiply Subtract returning High Half (by element).
SQRDMLSH (vector): Signed Saturating Rounding Doubling
Multiply Subtract returning High Half (vector).
FMADD: Floating-point fused
Multiply-Add (scalar).
FNMADD: Floating-point Negated fused
Multiply-Add (scalar).
SQDMLAL, SQDMLAL2 (by element): Signed saturating Doubling
Multiply-Add Long (by element).
SMLAL, SMLAL2 (vector): Signed
Multiply-Add Long (vector).
UMLAL, UMLAL2 (vector): Unsigned
Multiply-Add Long (vector).
SMLAL, SMLAL2 (by element): Signed
Multiply-Add Long (vector, by element).
UMLAL, UMLAL2 (by element): Unsigned
Multiply-Add Long (vector, by element).
FMLAL, FMLAL2 (by element): Floating-point fused
Multiply-Add Long to accumulator (by element).
FMLAL, FMLAL2 (vector): Floating-point fused
Multiply-Add Long to accumulator (vector).
SMADDL: Signed
Multiply-Add Long.
SQDMLAL, SQDMLAL2 (vector): Signed saturating Doubling
Multiply-Add Long.
UMADDL: Unsigned
Multiply-Add Long.
FMLA (by element): Floating-point fused
Multiply-Add to accumulator (by element).
FMLA (vector): Floating-point fused
Multiply-Add to accumulator (vector).
Multiply-Add to accumulator (vector).
Multiply-Add to accumulator (vector, by element).
MADD:
Multiply-Add.
FNMUL (scalar): Floating-point
Multiply-Negate (scalar).
SMNEGL: Signed
Multiply-Negate Long: an alias of SMSUBL.
UMNEGL: Unsigned
Multiply-Negate Long: an alias of UMSUBL.
MNEG:
Multiply-Negate: an alias of MSUB.
FMSUB: Floating-point Fused
Multiply-Subtract (scalar).
FNMSUB: Floating-point Negated fused
Multiply-Subtract (scalar).
FMLS (by element): Floating-point fused
Multiply-Subtract from accumulator (by element).
FMLS (vector): Floating-point fused
Multiply-Subtract from accumulator (vector).
Multiply-Subtract from accumulator (vector).
Multiply-Subtract from accumulator (vector, by element).
SQDMLSL, SQDMLSL2 (by element): Signed saturating Doubling
Multiply-Subtract Long (by element).
SMLSL, SMLSL2 (vector): Signed
Multiply-Subtract Long (vector).
UMLSL, UMLSL2 (vector): Unsigned
Multiply-Subtract Long (vector).
SMLSL, SMLSL2 (by element): Signed
Multiply-Subtract Long (vector, by element).
UMLSL, UMLSL2 (by element): Unsigned
Multiply-Subtract Long (vector, by element).
FMLSL, FMLSL2 (by element): Floating-point fused
Multiply-Subtract Long from accumulator (by element).
FMLSL, FMLSL2 (vector): Floating-point fused
Multiply-Subtract Long from accumulator (vector).
SMSUBL: Signed
Multiply-Subtract Long.
SQDMLSL, SQDMLSL2 (vector): Signed saturating Doubling
Multiply-Subtract Long.
UMSUBL: Unsigned
Multiply-Subtract Long.
MSUB:
Multiply-Subtract.
PMUL: Polynomial
Multiply.
MUL:
Multiply: an alias of MADD.
MVN: Bitwise NOT (vector): an alias of NOT.
MVN: Bitwise NOT: an alias of ORN (shifted register).
MVNI: Move inverted Immediate (vector).
RSHRN, RSHRN2: Rounding Shift Right
SHRN, SHRN2: Shift Right
Narrow (immediate).
SQRSHRN, SQRSHRN2: Signed saturating Rounded Shift Right
Narrow (immediate).
SQRSHRUN, SQRSHRUN2: Signed saturating Rounded Shift Right Unsigned
Narrow (immediate).
SQSHRN, SQSHRN2: Signed saturating Shift Right
Narrow (immediate).
SQSHRUN, SQSHRUN2: Signed saturating Shift Right Unsigned
Narrow (immediate).
UQRSHRN, UQRSHRN2: Unsigned saturating Rounded Shift Right
Narrow (immediate).
UQSHRN, UQSHRN2: Unsigned saturating Shift Right
Narrow (immediate).
FCVTN, FCVTN2: Floating-point Convert to lower precision
Narrow (vector).
FCVTXN, FCVTXN2: Floating-point Convert to lower precision
Narrow, rounding to odd (vector).
ADDHN, ADDHN2: Add returning High
Narrow.
RADDHN, RADDHN2: Rounding Add returning High
Narrow.
RSUBHN, RSUBHN2: Rounding Subtract returning High
Narrow.
SQXTN, SQXTN2: Signed saturating extract
Narrow.
SQXTUN, SQXTUN2: Signed saturating extract Unsigned
Narrow.
SUBHN, SUBHN2: Subtract returning High
Narrow.
UQXTN, UQXTN2: Unsigned saturating extract
Narrow.
XTN, XTN2: Extract
Narrow.
FCVTAS (scalar): Floating-point Convert to Signed integer, rounding to
nearest with ties to Away (scalar).
FCVTAU (scalar): Floating-point Convert to Unsigned integer, rounding to
nearest with ties to Away (scalar).
FRINTA (scalar): Floating-point Round to Integral, to
nearest with ties to Away (scalar).
FCVTAS (vector): Floating-point Convert to Signed integer, rounding to
nearest with ties to Away (vector).
FCVTAU (vector): Floating-point Convert to Unsigned integer, rounding to
nearest with ties to Away (vector).
FRINTA (vector): Floating-point Round to Integral, to
nearest with ties to Away (vector).
FCVTNS (scalar): Floating-point Convert to Signed integer, rounding to
nearest with ties to even (scalar).
FCVTNU (scalar): Floating-point Convert to Unsigned integer, rounding to
nearest with ties to even (scalar).
FRINTN (scalar): Floating-point Round to Integral, to
nearest with ties to even (scalar).
FCVTNS (vector): Floating-point Convert to Signed integer, rounding to
nearest with ties to even (vector).
FCVTNU (vector): Floating-point Convert to Unsigned integer, rounding to
nearest with ties to even (vector).
FRINTN (vector): Floating-point Round to Integral, to
nearest with ties to even (vector).
NEG (shifted register): Negate (shifted register): an alias of SUB (shifted register).
NEG (vector): Negate (vector).
FNEG (scalar): Floating-point
Negate (scalar).
FNMUL (scalar): Floating-point Multiply-
Negate (scalar).
Negate (shifted register): an alias of SUB (shifted register).
FNEG (vector): Floating-point
Negate (vector).
Negate (vector).
SMNEGL: Signed Multiply-
Negate Long: an alias of SMSUBL.
UMNEGL: Unsigned Multiply-
Negate Long: an alias of UMSUBL.
NGCS:
Negate with Carry, setting flags: an alias of SBCS.
NGC:
Negate with Carry: an alias of SBC.
NEGS:
Negate, setting flags: an alias of SUBS (shifted register).
SQNEG: Signed saturating
Negate.
CNEG: Conditional
Negate: an alias of CSNEG.
MNEG: Multiply-
Negate: an alias of MSUB.
FNMADD: Floating-point
Negated fused Multiply-Add (scalar).
FNMSUB: Floating-point
Negated fused Multiply-Subtract (scalar).
CSNEG: Conditional Select
Negation.
CMN (extended register): Compare
Negative (extended register): an alias of ADDS (extended register).
CCMN (immediate): Conditional Compare
Negative (immediate).
CMN (immediate): Compare
Negative (immediate): an alias of ADDS (immediate).
CCMN (register): Conditional Compare
Negative (register).
CMN (shifted register): Compare
Negative (shifted register): an alias of ADDS (shifted register).
NEGS: Negate, setting flags: an alias of SUBS (shifted register).
NGC: Negate with Carry: an alias of SBC.
NGCS: Negate with Carry, setting flags: an alias of SBCS.
NOP:
No Operation.
LDNP (SIMD&FP): Load Pair of SIMD&FP registers, with
Non-temporal hint.
LDNP: Load Pair of Registers, with
non-temporal hint.
STNP (SIMD&FP): Store Pair of SIMD&FP registers, with
Non-temporal hint.
STNP: Store Pair of Registers, with
non-temporal hint.
CMTST: Compare bitwise Test bits
nonzero (vector).
CBNZ: Compare and Branch on
Nonzero.
TBNZ: Test bit and Branch if
Nonzero.
NOP: No Operation.
EON (shifted register): Bitwise Exclusive OR
NOT (shifted register).
ORN (shifted register): Bitwise OR
NOT (shifted register).
NOT: Bitwise
NOT (vector).
ORN (vector): Bitwise inclusive OR
NOT (vector).
MVN: Bitwise
NOT (vector): an alias of NOT.
MOVN: Move wide with
NOT.
MVN: Bitwise NOT (vector): an alias of
NOT.
MVN: Bitwise
NOT: an alias of ORN (shifted register).
NOT: Bitwise NOT (vector).
FMAXNM (scalar): Floating-point Maximum
Number (scalar).
FMINNM (scalar): Floating-point Minimum
Number (scalar).
FMAXNM (vector): Floating-point Maximum
Number (vector).
FMINNM (vector): Floating-point Minimum
Number (vector).
FMAXNMV: Floating-point Maximum
Number across Vector.
FMINNMV: Floating-point Minimum
Number across Vector.
FMAXNMP (scalar): Floating-point Maximum
Number of Pair of elements (scalar).
FMINNMP (scalar): Floating-point Minimum
Number of Pair of elements (scalar).
FMAXNMP (vector): Floating-point Maximum
Number Pairwise (vector).
FMINNMP (vector): Floating-point Minimum
Number Pairwise (vector).
FCVTXN, FCVTXN2: Floating-point Convert to lower precision Narrow, rounding to
LDR (immediate, SIMD&FP): Load SIMD&FP Register (immediate
offset).
LDR (register, SIMD&FP): Load SIMD&FP Register (register
offset).
LDUR (SIMD&FP): Load SIMD&FP Register (unscaled
offset).
PRFM (unscaled offset): Prefetch Memory (unscaled
offset).
STR (immediate, SIMD&FP): Store SIMD&FP register (immediate
offset).
STR (register, SIMD&FP): Store SIMD&FP register (register
offset).
STUR (SIMD&FP): Store SIMD&FP register (unscaled
offset).
offset): Prefetch Memory (unscaled offset).
STADDB, STADDLB: Atomic add
on byte in memory, without return: an alias of LDADDB, LDADDAB, LDADDALB, LDADDLB.
STCLRB, STCLRLB: Atomic bit clear
on byte in memory, without return: an alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
STEORB, STEORLB: Atomic exclusive OR
on byte in memory, without return: an alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
STSETB, STSETLB: Atomic bit set
on byte in memory, without return: an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
STSMAXB, STSMAXLB: Atomic signed maximum
on byte in memory, without return: an alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
STSMINB, STSMINLB: Atomic signed minimum
on byte in memory, without return: an alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
STUMAXB, STUMAXLB: Atomic unsigned maximum
on byte in memory, without return: an alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
STUMINB, STUMINLB: Atomic unsigned minimum
on byte in memory, without return: an alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
LDADDB, LDADDAB, LDADDALB, LDADDLB: Atomic add
on byte in memory.
LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB: Atomic bit clear
on byte in memory.
LDEORB, LDEORAB, LDEORALB, LDEORLB: Atomic exclusive OR
on byte in memory.
LDSETB, LDSETAB, LDSETALB, LDSETLB: Atomic bit set
on byte in memory.
LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB: Atomic signed maximum
on byte in memory.
LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB: Atomic signed minimum
on byte in memory.
LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB: Atomic unsigned maximum
on byte in memory.
LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB: Atomic unsigned minimum
on byte in memory.
STADDH, STADDLH: Atomic add
on halfword in memory, without return: an alias of LDADDH, LDADDAH, LDADDALH, LDADDLH.
STCLRH, STCLRLH: Atomic bit clear
on halfword in memory, without return: an alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
STEORH, STEORLH: Atomic exclusive OR
on halfword in memory, without return: an alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
STSETH, STSETLH: Atomic bit set
on halfword in memory, without return: an alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
STSMAXH, STSMAXLH: Atomic signed maximum
on halfword in memory, without return: an alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
STSMINH, STSMINLH: Atomic signed minimum
on halfword in memory, without return: an alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
STUMAXH, STUMAXLH: Atomic unsigned maximum
on halfword in memory, without return: an alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
STUMINH, STUMINLH: Atomic unsigned minimum
on halfword in memory, without return: an alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
LDADDH, LDADDAH, LDADDALH, LDADDLH: Atomic add
on halfword in memory.
LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH: Atomic bit clear
on halfword in memory.
LDEORH, LDEORAH, LDEORALH, LDEORLH: Atomic exclusive OR
on halfword in memory.
LDSETH, LDSETAH, LDSETALH, LDSETLH: Atomic bit set
on halfword in memory.
LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH: Atomic signed maximum
on halfword in memory.
LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH: Atomic signed minimum
on halfword in memory.
LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH: Atomic unsigned maximum
on halfword in memory.
LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH: Atomic unsigned minimum
on halfword in memory.
CBNZ: Compare and Branch
on Nonzero.
STADD, STADDL: Atomic add
on word or doubleword in memory, without return: an alias of LDADD, LDADDA, LDADDAL, LDADDL.
STCLR, STCLRL: Atomic bit clear
on word or doubleword in memory, without return: an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
STEOR, STEORL: Atomic exclusive OR
on word or doubleword in memory, without return: an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
STSET, STSETL: Atomic bit set
on word or doubleword in memory, without return: an alias of LDSET, LDSETA, LDSETAL, LDSETL.
STSMAX, STSMAXL: Atomic signed maximum
on word or doubleword in memory, without return: an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
STSMIN, STSMINL: Atomic signed minimum
on word or doubleword in memory, without return: an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
STUMAX, STUMAXL: Atomic unsigned maximum
on word or doubleword in memory, without return: an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
STUMIN, STUMINL: Atomic unsigned minimum
on word or doubleword in memory, without return: an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
LDADD, LDADDA, LDADDAL, LDADDL: Atomic add
on word or doubleword in memory.
LDCLR, LDCLRA, LDCLRAL, LDCLRL: Atomic bit clear
on word or doubleword in memory.
LDEOR, LDEORA, LDEORAL, LDEORL: Atomic exclusive OR
on word or doubleword in memory.
LDSET, LDSETA, LDSETAL, LDSETL: Atomic bit set
on word or doubleword in memory.
LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL: Atomic signed maximum
on word or doubleword in memory.
LDSMIN, LDSMINA, LDSMINAL, LDSMINL: Atomic signed minimum
on word or doubleword in memory.
LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL: Atomic unsigned maximum
on word or doubleword in memory.
LDUMIN, LDUMINA, LDUMINAL, LDUMINL: Atomic unsigned minimum
on word or doubleword in memory.
CBZ: Compare and Branch
on Zero.
LD4 (single structure): Load single 4-element structure to
one lane of four registers.
ST4 (single structure): Store single 4-element structure from
one lane of four registers.
LD1 (single structure): Load one single-element structure to
one lane of one register.
ST1 (single structure): Store a single-element structure from
one lane of one register.
LD3 (single structure): Load single 3-element structure to
one lane of three registers).
ST3 (single structure): Store single 3-element structure from
one lane of three registers.
LD2 (single structure): Load single 2-element structure to
one lane of two registers.
ST2 (single structure): Store single 2-element structure from
one lane of two registers.
LD1R: Load one single-element structure and Replicate to all lanes (of
one register).
LD1 (single structure): Load one single-element structure to one lane of
one register.
ST1 (single structure): Store a single-element structure from one lane of
one register.
LD1R: Load
one single-element structure and Replicate to all lanes (of one register).
LD1 (single structure): Load
one single-element structure to one lane of one register.
LD1 (multiple structures): Load multiple single-element structures to
one, two, three, or four registers.
ST1 (multiple structures): Store multiple single-element structures from
one, two, three, or four registers.
NOP: No
Operation.
DC: Data Cache
operation: an alias of SYS.
IC: Instruction Cache
operation: an alias of SYS.
TLBI: TLB Invalidate
operation: an alias of SYS.
EOR (immediate): Bitwise Exclusive
OR (immediate).
ORR (immediate): Bitwise
OR (immediate).
EOR (shifted register): Bitwise Exclusive
OR (shifted register).
ORR (shifted register): Bitwise
OR (shifted register).
EOR (vector): Bitwise Exclusive
OR (vector).
ORR (vector, immediate): Bitwise inclusive
OR (vector, immediate).
ORR (vector, register): Bitwise inclusive
OR (vector, register).
XAR: Exclusive
OR and Rotate.
EON (shifted register): Bitwise Exclusive
OR NOT (shifted register).
ORN (shifted register): Bitwise
OR NOT (shifted register).
ORN (vector): Bitwise inclusive
OR NOT (vector).
STEORB, STEORLB: Atomic exclusive
OR on byte in memory, without return: an alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
LDEORB, LDEORAB, LDEORALB, LDEORLB: Atomic exclusive
OR on byte in memory.
STEORH, STEORLH: Atomic exclusive
OR on halfword in memory, without return: an alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
LDEORH, LDEORAH, LDEORALH, LDEORLH: Atomic exclusive
OR on halfword in memory.
STEOR, STEORL: Atomic exclusive
OR on word or doubleword in memory, without return: an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
LDEOR, LDEORA, LDEORAL, LDEORL: Atomic exclusive
OR on word or doubleword in memory.
EOR3: Three-way Exclusive
OR.
RAX1: Rotate and Exclusive
OR.
RBIT (vector): Reverse Bit
order (vector).
MVN: Bitwise NOT: an alias of
ORN (shifted register).
ORN (shifted register): Bitwise OR NOT (shifted register).
ORN (vector): Bitwise inclusive OR NOT (vector).
MOV (bitmask immediate): Move (bitmask immediate): an alias of
ORR (immediate).
ORR (immediate): Bitwise OR (immediate).
MOV (register): Move (register): an alias of
ORR (shifted register).
ORR (shifted register): Bitwise OR (shifted register).
ORR (vector, immediate): Bitwise inclusive OR (vector, immediate).
MOV (vector): Move vector: an alias of
ORR (vector, register).
ORR (vector, register): Bitwise inclusive OR (vector, register).
BFC: Bitfield Clear, leaving
other bits unchanged: an alias of BFM.
PACDB, PACDZB: Pointer Authentication Code for Data address, using key B.
PACGA: Pointer Authentication Code, using Generic key.
PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA: Pointer Authentication Code for Instruction address, using key A.
PACIA1716, PACIASP, PACIAZ, PACIZA: Pointer Authentication Code for Instruction address, using key A.
PACIASP, PACIAZ, PACIZA: Pointer Authentication Code for Instruction address, using key A.
PACIAZ, PACIZA: Pointer Authentication Code for Instruction address, using key A.
PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB: Pointer Authentication Code for Instruction address, using key B.
PACIB1716, PACIBSP, PACIBZ, PACIZB: Pointer Authentication Code for Instruction address, using key B.
PACIBSP, PACIBZ, PACIZB: Pointer Authentication Code for Instruction address, using key B.
PACIBZ, PACIZB: Pointer Authentication Code for Instruction address, using key B.
PACIZA: Pointer Authentication Code for Instruction address, using key A.
PACIZB: Pointer Authentication Code for Instruction address, using key B.
ADRP: Form PC-relative address to 4KB
page.
ADDP (scalar): Add
Pair of elements (scalar).
FADDP (scalar): Floating-point Add
Pair of elements (scalar).
FMAXNMP (scalar): Floating-point Maximum Number of
Pair of elements (scalar).
FMAXP (scalar): Floating-point Maximum of
Pair of elements (scalar).
FMINNMP (scalar): Floating-point Minimum Number of
Pair of elements (scalar).
FMINP (scalar): Floating-point Minimum of
Pair of elements (scalar).
LDPSW: Load
Pair of Registers Signed Word.
LDNP: Load
Pair of Registers, with non-temporal hint.
STNP: Store
Pair of Registers, with non-temporal hint.
LDAXP: Load-Acquire Exclusive
Pair of Registers.
LDP: Load
Pair of Registers.
LDXP: Load Exclusive
Pair of Registers.
STLXP: Store-Release Exclusive
Pair of registers.
STP: Store
Pair of Registers.
STXP: Store Exclusive
Pair of registers.
LDNP (SIMD&FP): Load
Pair of SIMD&FP registers, with Non-temporal hint.
STNP (SIMD&FP): Store
Pair of SIMD&FP registers, with Non-temporal hint.
LDP (SIMD&FP): Load
Pair of SIMD&FP registers.
STP (SIMD&FP): Store
Pair of SIMD&FP registers.
EXT: Extract vector from
pair of vectors.
CASP, CASPA, CASPAL, CASPL: Compare and Swap
Pair of words or doublewords in memory.
ADDP (vector): Add
Pairwise (vector).
FADDP (vector): Floating-point Add
Pairwise (vector).
FMAXNMP (vector): Floating-point Maximum Number
Pairwise (vector).
FMAXP (vector): Floating-point Maximum
Pairwise (vector).
FMINNMP (vector): Floating-point Minimum Number
Pairwise (vector).
FMINP (vector): Floating-point Minimum
Pairwise (vector).
SADALP: Signed Add and Accumulate Long
Pairwise.
SADDLP: Signed Add Long
Pairwise.
SMAXP: Signed Maximum
Pairwise.
SMINP: Signed Minimum
Pairwise.
UADALP: Unsigned Add and Accumulate Long
Pairwise.
UADDLP: Unsigned Add Long
Pairwise.
UMAXP: Unsigned Maximum
Pairwise.
UMINP: Unsigned Minimum
Pairwise.
SHA1P: SHA1 hash update (
parity).
SHA256H: SHA256 hash update (
part 1).
SHA512H: SHA512 Hash update
part 1.
SHA256H2: SHA256 hash update (
part 2).
SHA512H2: SHA512 Hash update
part 2.
ADRP: Form
PC-relative address to 4KB page.
ADR: Form
PC-relative address.
LDR (literal, SIMD&FP): Load SIMD&FP Register (
PC-relative literal).
DCPS1: Debug Change
PE State to EL1..
DCPS2: Debug Change
PE State to EL2..
DCPS3: Debug Change
PE State to EL3.
CNT: Population Count
per byte.
FCVTPS (scalar): Floating-point Convert to Signed integer, rounding toward
Plus infinity (scalar).
FCVTPU (scalar): Floating-point Convert to Unsigned integer, rounding toward
Plus infinity (scalar).
FRINTP (scalar): Floating-point Round to Integral, toward
Plus infinity (scalar).
FCVTPS (vector): Floating-point Convert to Signed integer, rounding toward
Plus infinity (vector).
FCVTPU (vector): Floating-point Convert to Unsigned integer, rounding toward
Plus infinity (vector).
FRINTP (vector): Floating-point Round to Integral, toward
Plus infinity (vector).
PMUL: Polynomial Multiply.
PMULL, PMULL2: Polynomial Multiply Long.
SCVTF (scalar, fixed-point): Signed fixed-point Convert to Floating-
point (scalar).
SCVTF (scalar, integer): Signed integer Convert to Floating-
point (scalar).
UCVTF (scalar, fixed-point): Unsigned fixed-point Convert to Floating-
point (scalar).
UCVTF (scalar, integer): Unsigned integer Convert to Floating-
point (scalar).
SCVTF (vector, fixed-point): Signed fixed-point Convert to Floating-
point (vector).
SCVTF (vector, integer): Signed integer Convert to Floating-
point (vector).
UCVTF (vector, fixed-point): Unsigned fixed-point Convert to Floating-
point (vector).
UCVTF (vector, integer): Unsigned integer Convert to Floating-
point (vector).
FACGT: Floating-
point Absolute Compare Greater than (vector).
FACGE: Floating-
point Absolute Compare Greater than or Equal (vector).
FABD: Floating-
point Absolute Difference (vector).
FABS (scalar): Floating-
point Absolute value (scalar).
FABS (vector): Floating-
point Absolute value (vector).
FADD (scalar): Floating-
point Add (scalar).
FADD (vector): Floating-
point Add (vector).
FADDP (scalar): Floating-
point Add Pair of elements (scalar).
FADDP (vector): Floating-
point Add Pairwise (vector).
FCMEQ (register): Floating-
point Compare Equal (vector).
FCMEQ (zero): Floating-
point Compare Equal to zero (vector).
FCMGT (register): Floating-
point Compare Greater than (vector).
FCMGE (register): Floating-
point Compare Greater than or Equal (vector).
FCMGE (zero): Floating-
point Compare Greater than or Equal to zero (vector).
FCMGT (zero): Floating-
point Compare Greater than zero (vector).
FCMLE (zero): Floating-
point Compare Less than or Equal to zero (vector).
FCMLT (zero): Floating-
point Compare Less than zero (vector).
FCADD: Floating-
point Complex Add.
FCMLA (by element): Floating-
point Complex Multiply Accumulate (by element).
FCMLA: Floating-
point Complex Multiply Accumulate.
FCCMP: Floating-
point Conditional quiet Compare (scalar).
FCSEL: Floating-
point Conditional Select (scalar).
FCCMPE: Floating-
point Conditional signaling Compare (scalar).
FCVT: Floating-
point Convert precision (scalar).
SCVTF (scalar, fixed-point): Signed fixed-
point Convert to Floating-point (scalar).
UCVTF (scalar, fixed-point): Unsigned fixed-
point Convert to Floating-point (scalar).
SCVTF (vector, fixed-point): Signed fixed-
point Convert to Floating-point (vector).
UCVTF (vector, fixed-point): Unsigned fixed-
point Convert to Floating-point (vector).
FCVTL, FCVTL2: Floating-
point Convert to higher precision Long (vector).
FCVTN, FCVTN2: Floating-
point Convert to lower precision Narrow (vector).
FCVTXN, FCVTXN2: Floating-
point Convert to lower precision Narrow, rounding to odd (vector).
FCVTZS (scalar, fixed-point): Floating-
point Convert to Signed fixed-point, rounding toward Zero (scalar).
FCVTZS (vector, fixed-point): Floating-
point Convert to Signed fixed-point, rounding toward Zero (vector).
FCVTAS (scalar): Floating-
point Convert to Signed integer, rounding to nearest with ties to Away (scalar).
FCVTAS (vector): Floating-
point Convert to Signed integer, rounding to nearest with ties to Away (vector).
FCVTNS (scalar): Floating-
point Convert to Signed integer, rounding to nearest with ties to even (scalar).
FCVTNS (vector): Floating-
point Convert to Signed integer, rounding to nearest with ties to even (vector).
FCVTMS (scalar): Floating-
point Convert to Signed integer, rounding toward Minus infinity (scalar).
FCVTMS (vector): Floating-
point Convert to Signed integer, rounding toward Minus infinity (vector).
FCVTPS (scalar): Floating-
point Convert to Signed integer, rounding toward Plus infinity (scalar).
FCVTPS (vector): Floating-
point Convert to Signed integer, rounding toward Plus infinity (vector).
FCVTZS (scalar, integer): Floating-
point Convert to Signed integer, rounding toward Zero (scalar).
FCVTZS (vector, integer): Floating-
point Convert to Signed integer, rounding toward Zero (vector).
FCVTZU (scalar, fixed-point): Floating-
point Convert to Unsigned fixed-point, rounding toward Zero (scalar).
FCVTZU (vector, fixed-point): Floating-
point Convert to Unsigned fixed-point, rounding toward Zero (vector).
FCVTAU (scalar): Floating-
point Convert to Unsigned integer, rounding to nearest with ties to Away (scalar).
FCVTAU (vector): Floating-
point Convert to Unsigned integer, rounding to nearest with ties to Away (vector).
FCVTNU (scalar): Floating-
point Convert to Unsigned integer, rounding to nearest with ties to even (scalar).
FCVTNU (vector): Floating-
point Convert to Unsigned integer, rounding to nearest with ties to even (vector).
FCVTMU (scalar): Floating-
point Convert to Unsigned integer, rounding toward Minus infinity (scalar).
FCVTMU (vector): Floating-
point Convert to Unsigned integer, rounding toward Minus infinity (vector).
FCVTPU (scalar): Floating-
point Convert to Unsigned integer, rounding toward Plus infinity (scalar).
FCVTPU (vector): Floating-
point Convert to Unsigned integer, rounding toward Plus infinity (vector).
FCVTZU (scalar, integer): Floating-
point Convert to Unsigned integer, rounding toward Zero (scalar).
FCVTZU (vector, integer): Floating-
point Convert to Unsigned integer, rounding toward Zero (vector).
FDIV (scalar): Floating-
point Divide (scalar).
FDIV (vector): Floating-
point Divide (vector).
FMADD: Floating-
point fused Multiply-Add (scalar).
FMLAL, FMLAL2 (by element): Floating-
point fused Multiply-Add Long to accumulator (by element).
FMLAL, FMLAL2 (vector): Floating-
point fused Multiply-Add Long to accumulator (vector).
FMLA (by element): Floating-
point fused Multiply-Add to accumulator (by element).
FMLA (vector): Floating-
point fused Multiply-Add to accumulator (vector).
FMSUB: Floating-
point Fused Multiply-Subtract (scalar).
FMLS (by element): Floating-
point fused Multiply-Subtract from accumulator (by element).
FMLS (vector): Floating-
point fused Multiply-Subtract from accumulator (vector).
FMLSL, FMLSL2 (by element): Floating-
point fused Multiply-Subtract Long from accumulator (by element).
FMLSL, FMLSL2 (vector): Floating-
point fused Multiply-Subtract Long from accumulator (vector).
FJCVTZS: Floating-
point Javascript Convert to Signed fixed-point, rounding toward Zero.
FMAX (scalar): Floating-
point Maximum (scalar).
FMAX (vector): Floating-
point Maximum (vector).
FMAXV: Floating-
point Maximum across Vector.
FMAXNM (scalar): Floating-
point Maximum Number (scalar).
FMAXNM (vector): Floating-
point Maximum Number (vector).
FMAXNMV: Floating-
point Maximum Number across Vector.
FMAXNMP (scalar): Floating-
point Maximum Number of Pair of elements (scalar).
FMAXNMP (vector): Floating-
point Maximum Number Pairwise (vector).
FMAXP (scalar): Floating-
point Maximum of Pair of elements (scalar).
FMAXP (vector): Floating-
point Maximum Pairwise (vector).
FMIN (scalar): Floating-
point Minimum (scalar).
FMIN (vector): Floating-
point minimum (vector).
FMINV: Floating-
point Minimum across Vector.
FMINNM (scalar): Floating-
point Minimum Number (scalar).
FMINNM (vector): Floating-
point Minimum Number (vector).
FMINNMV: Floating-
point Minimum Number across Vector.
FMINNMP (scalar): Floating-
point Minimum Number of Pair of elements (scalar).
FMINNMP (vector): Floating-
point Minimum Number Pairwise (vector).
FMINP (scalar): Floating-
point Minimum of Pair of elements (scalar).
FMINP (vector): Floating-
point Minimum Pairwise (vector).
FMOV (scalar, immediate): Floating-
point move immediate (scalar).
FMOV (vector, immediate): Floating-
point move immediate (vector).
FMOV (register): Floating-
point Move register without conversion.
FMOV (general): Floating-
point Move to or from general-purpose register without conversion.
FMUL (by element): Floating-
point Multiply (by element).
FMUL (scalar): Floating-
point Multiply (scalar).
FMUL (vector): Floating-
point Multiply (vector).
FMULX (by element): Floating-
point Multiply extended (by element).
FMULX: Floating-
point Multiply extended.
FNMUL (scalar): Floating-
point Multiply-Negate (scalar).
FNEG (scalar): Floating-
point Negate (scalar).
FNEG (vector): Floating-
point Negate (vector).
FNMADD: Floating-
point Negated fused Multiply-Add (scalar).
FNMSUB: Floating-
point Negated fused Multiply-Subtract (scalar).
FCMP: Floating-
point quiet Compare (scalar).
FRECPE: Floating-
point Reciprocal Estimate.
FRECPX: Floating-
point Reciprocal exponent (scalar).
FRSQRTE: Floating-
point Reciprocal Square Root Estimate.
FRSQRTS: Floating-
point Reciprocal Square Root Step.
FRECPS: Floating-
point Reciprocal Step.
FRINTX (scalar): Floating-
point Round to Integral exact, using current rounding mode (scalar).
FRINTX (vector): Floating-
point Round to Integral exact, using current rounding mode (vector).
FRINTA (scalar): Floating-
point Round to Integral, to nearest with ties to Away (scalar).
FRINTA (vector): Floating-
point Round to Integral, to nearest with ties to Away (vector).
FRINTN (scalar): Floating-
point Round to Integral, to nearest with ties to even (scalar).
FRINTN (vector): Floating-
point Round to Integral, to nearest with ties to even (vector).
FRINTM (scalar): Floating-
point Round to Integral, toward Minus infinity (scalar).
FRINTM (vector): Floating-
point Round to Integral, toward Minus infinity (vector).
FRINTP (scalar): Floating-
point Round to Integral, toward Plus infinity (scalar).
FRINTP (vector): Floating-
point Round to Integral, toward Plus infinity (vector).
FRINTZ (scalar): Floating-
point Round to Integral, toward Zero (scalar).
FRINTZ (vector): Floating-
point Round to Integral, toward Zero (vector).
FRINTI (scalar): Floating-
point Round to Integral, using current rounding mode (scalar).
FRINTI (vector): Floating-
point Round to Integral, using current rounding mode (vector).
FCMPE: Floating-
point signaling Compare (scalar).
FSQRT (scalar): Floating-
point Square Root (scalar).
FSQRT (vector): Floating-
point Square Root (vector).
FSUB (scalar): Floating-
point Subtract (scalar).
FSUB (vector): Floating-
point Subtract (vector).
point): Floating-point Convert to Signed fixed-point, rounding toward Zero (scalar).
point): Floating-point Convert to Signed fixed-point, rounding toward Zero (vector).
point): Floating-point Convert to Unsigned fixed-point, rounding toward Zero (scalar).
point): Floating-point Convert to Unsigned fixed-point, rounding toward Zero (vector).
point): Signed fixed-point Convert to Floating-point (scalar).
point): Signed fixed-point Convert to Floating-point (vector).
point): Unsigned fixed-point Convert to Floating-point (scalar).
point): Unsigned fixed-point Convert to Floating-point (vector).
FCVTZS (scalar, fixed-point): Floating-point Convert to Signed fixed-
point, rounding toward Zero (scalar).
FCVTZU (scalar, fixed-point): Floating-point Convert to Unsigned fixed-
point, rounding toward Zero (scalar).
FCVTZS (vector, fixed-point): Floating-point Convert to Signed fixed-
point, rounding toward Zero (vector).
FCVTZU (vector, fixed-point): Floating-point Convert to Unsigned fixed-
point, rounding toward Zero (vector).
FJCVTZS: Floating-point Javascript Convert to Signed fixed-
point, rounding toward Zero.
Pointer Authentication Code for Data address, using key A.
Pointer Authentication Code for Data address, using key B.
Pointer Authentication Code for Instruction address, using key A.
Pointer Authentication Code for Instruction address, using key B.
Pointer Authentication Code, using Generic key.
XPACD, XPACI, XPACLRI: Strip
Pointer Authentication Code.
BLRAA, BLRAAZ, BLRAB, BLRABZ: Branch with Link to Register, with
pointer authentication.
BRAA, BRAAZ, BRAB, BRABZ: Branch to Register, with
pointer authentication.
ERETAA, ERETAB: Exception Return, with
pointer authentication.
LDRAA, LDRAB: Load Register, with
pointer authentication.
RETAA, RETAB: Return from subroutine, with
pointer authentication.
MOV (to/from SP): Move between register and stack
pointer: an alias of ADD (immediate).
Polynomial Multiply Long.
PMUL:
Polynomial Multiply.
CNT:
Population Count per byte.
FCVT: Floating-point Convert
precision (scalar).
FCVTL, FCVTL2: Floating-point Convert to higher
precision Long (vector).
FCVTN, FCVTN2: Floating-point Convert to lower
precision Narrow (vector).
FCVTXN, FCVTXN2: Floating-point Convert to lower
precision Narrow, rounding to odd (vector).
Prefetch Memory (immediate).
Prefetch Memory (literal).
Prefetch Memory (register).
Prefetch Memory (unscaled offset).
PRFM (immediate): Prefetch Memory (immediate).
PRFM (literal): Prefetch Memory (literal).
PRFM (register): Prefetch Memory (register).
PRFM (unscaled offset): Prefetch Memory (unscaled offset).
TRN1: Transpose vectors (
primary).
UZP1: Unzip vectors (
primary).
ZIP1: Zip vectors (
primary).
DRPS: Debug restore
process state.
SDOT (vector): Dot
Product signed arithmetic (vector).
SDOT (by element): Dot
Product signed arithmetic (vector, by element).
UDOT (vector): Dot
Product unsigned arithmetic (vector).
UDOT (by element): Dot
Product unsigned arithmetic (vector, by element).
Profiling Synchronization Barrier.
PSB CSYNC: Profiling Synchronization Barrier.
MOV (from general): Move general-
purpose register to a vector element: an alias of INS (general).
MSR (register): Move general-
purpose register to System Register.
DUP (general): Duplicate general-
purpose register to vector.
FMOV (general): Floating-point Move to or from general-
purpose register without conversion.
INS (general): Insert vector element from general-
purpose register.
SMOV: Signed Move vector element to general-
purpose register.
UMOV: Unsigned Move vector element to general-
purpose register.
MOV (to general): Move vector element to general-
purpose register: an alias of UMOV.
FCCMP: Floating-point Conditional
FCMP: Floating-point
quiet Compare (scalar).
RAX1: Rotate and Exclusive OR.
RBIT (vector): Reverse Bit order (vector).
RBIT: Reverse Bits.
FRECPE: Floating-point
Reciprocal Estimate.
URECPE: Unsigned
Reciprocal Estimate.
FRECPX: Floating-point
Reciprocal exponent (scalar).
FRSQRTE: Floating-point
Reciprocal Square Root Estimate.
URSQRTE: Unsigned
Reciprocal Square Root Estimate.
FRSQRTS: Floating-point
Reciprocal Square Root Step.
FRECPS: Floating-point
Reciprocal Step.
LDR (immediate, SIMD&FP): Load SIMD&FP
Register (immediate offset).
LDR (immediate): Load
Register (immediate).
STR (immediate): Store
Register (immediate).
LDR (literal): Load
Register (literal).
LDR (literal, SIMD&FP): Load SIMD&FP
Register (PC-relative literal).
LDR (register, SIMD&FP): Load SIMD&FP
Register (register offset).
LDR (register): Load
Register (register).
STR (register): Store
Register (register).
LDTR: Load
Register (unprivileged).
STTR: Store
Register (unprivileged).
LDUR (SIMD&FP): Load SIMD&FP
Register (unscaled offset).
LDUR: Load
Register (unscaled).
STUR: Store
Register (unscaled).
LDRB (immediate): Load
Register Byte (immediate).
STRB (immediate): Store
Register Byte (immediate).
LDRB (register): Load
Register Byte (register).
STRB (register): Store
Register Byte (register).
LDTRB: Load
Register Byte (unprivileged).
STTRB: Store
Register Byte (unprivileged).
LDURB: Load
Register Byte (unscaled).
STURB: Store
Register Byte (unscaled).
LDAPRB: Load-Acquire RCpc
Register Byte.
LDARB: Load-Acquire
Register Byte.
LDAXRB: Load-Acquire Exclusive
Register Byte.
LDLARB: Load LOAcquire
Register Byte.
LDXRB: Load Exclusive
Register Byte.
STLLRB: Store LORelease
Register Byte.
STLRB: Store-Release
Register Byte.
STLXRB: Store-Release Exclusive
Register Byte.
STXRB: Store Exclusive
Register Byte.
LDRH (immediate): Load
Register Halfword (immediate).
STRH (immediate): Store
Register Halfword (immediate).
LDRH (register): Load
Register Halfword (register).
STRH (register): Store
Register Halfword (register).
LDTRH: Load
Register Halfword (unprivileged).
STTRH: Store
Register Halfword (unprivileged).
LDURH: Load
Register Halfword (unscaled).
STURH: Store
Register Halfword (unscaled).
LDAPRH: Load-Acquire RCpc
Register Halfword.
LDARH: Load-Acquire
Register Halfword.
LDAXRH: Load-Acquire Exclusive
Register Halfword.
LDLARH: Load LOAcquire
Register Halfword.
LDXRH: Load Exclusive
Register Halfword.
STLLRH: Store LORelease
Register Halfword.
STLRH: Store-Release
Register Halfword.
STLXRH: Store-Release Exclusive
Register Halfword.
STXRH: Store Exclusive
Register Halfword.
LDRSB (immediate): Load
Register Signed Byte (immediate).
LDRSB (register): Load
Register Signed Byte (register).
LDTRSB: Load
Register Signed Byte (unprivileged).
LDURSB: Load
Register Signed Byte (unscaled).
LDRSH (immediate): Load
Register Signed Halfword (immediate).
LDRSH (register): Load
Register Signed Halfword (register).
LDTRSH: Load
Register Signed Halfword (unprivileged).
LDURSH: Load
Register Signed Halfword (unscaled).
LDRSW (immediate): Load
Register Signed Word (immediate).
LDRSW (literal): Load
Register Signed Word (literal).
LDRSW (register): Load
Register Signed Word (register).
LDTRSW: Load
Register Signed Word (unprivileged).
LDURSW: Load
Register Signed Word (unscaled).
BLRAA, BLRAAZ, BLRAB, BLRABZ: Branch with Link to
Register, with pointer authentication.
BRAA, BRAAZ, BRAB, BRABZ: Branch to
Register, with pointer authentication.
LDRAA, LDRAB: Load
Register, with pointer authentication.
BLR: Branch with Link to
Register.
BR: Branch to
Register.
LDAPR: Load-Acquire RCpc
Register.
LDAR: Load-Acquire
Register.
LDAXR: Load-Acquire Exclusive
Register.
LDLAR: Load LOAcquire
Register.
LDXR: Load Exclusive
Register.
MRS: Move System
Register.
MSR (immediate): Move immediate value to Special
Register.
MSR (register): Move general-purpose register to System
Register.
STLLR: Store LORelease
Register.
STLR: Store-Release
Register.
STLXR: Store-Release Exclusive
Register.
STXR: Store Exclusive
Register.
LDPSW: Load Pair of
Registers Signed Word.
LDNP: Load Pair of
Registers, with non-temporal hint.
STNP: Store Pair of
Registers, with non-temporal hint.
LDAXP: Load-Acquire Exclusive Pair of
Registers.
LDP: Load Pair of
Registers.
LDXP: Load Exclusive Pair of
Registers.
STP: Store Pair of
Registers.
STLXP: Store-
Release Exclusive Pair of registers.
STLXRB: Store-
Release Exclusive Register Byte.
STLXRH: Store-
Release Exclusive Register Halfword.
STLXR: Store-
Release Exclusive Register.
STLLRB: Store LO
Release Register Byte.
STLRB: Store-
Release Register Byte.
STLLRH: Store LO
Release Register Halfword.
STLRH: Store-
Release Register Halfword.
STLLR: Store LO
Release Register.
STLR: Store-
Release Register.
LD1R: Load one single-element structure and
Replicate to all lanes (of one register).
LD4R: Load single 4-element structure and
Replicate to all lanes of four registers.
LD3R: Load single 3-element structure and
Replicate to all lanes of three registers.
LD2R: Load single 2-element structure and
Replicate to all lanes of two registers.
DRPS: Debug
restore process state.
SYSL: System instruction with
result.
RET: Return from subroutine.
RETAA, RETAB: Return from subroutine, with pointer authentication.
Return from subroutine, with pointer authentication.
RET:
Return from subroutine.
ERETAA, ERETAB: Exception
Return, with pointer authentication.
ERET: Exception
Return.
STADD, STADDL: Atomic add on word or doubleword in memory, without
return: an alias of LDADD, LDADDA, LDADDAL, LDADDL.
STADDB, STADDLB: Atomic add on byte in memory, without
return: an alias of LDADDB, LDADDAB, LDADDALB, LDADDLB.
STADDH, STADDLH: Atomic add on halfword in memory, without
return: an alias of LDADDH, LDADDAH, LDADDALH, LDADDLH.
STCLR, STCLRL: Atomic bit clear on word or doubleword in memory, without
return: an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
STCLRB, STCLRLB: Atomic bit clear on byte in memory, without
return: an alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
STCLRH, STCLRLH: Atomic bit clear on halfword in memory, without
return: an alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
STEOR, STEORL: Atomic exclusive OR on word or doubleword in memory, without
return: an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
STEORB, STEORLB: Atomic exclusive OR on byte in memory, without
return: an alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
STEORH, STEORLH: Atomic exclusive OR on halfword in memory, without
return: an alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
STSET, STSETL: Atomic bit set on word or doubleword in memory, without
return: an alias of LDSET, LDSETA, LDSETAL, LDSETL.
STSETB, STSETLB: Atomic bit set on byte in memory, without
return: an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
STSETH, STSETLH: Atomic bit set on halfword in memory, without
return: an alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
STSMAX, STSMAXL: Atomic signed maximum on word or doubleword in memory, without
return: an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
STSMAXB, STSMAXLB: Atomic signed maximum on byte in memory, without
return: an alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
STSMAXH, STSMAXLH: Atomic signed maximum on halfword in memory, without
return: an alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
STSMIN, STSMINL: Atomic signed minimum on word or doubleword in memory, without
return: an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
STSMINB, STSMINLB: Atomic signed minimum on byte in memory, without
return: an alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
STSMINH, STSMINLH: Atomic signed minimum on halfword in memory, without
return: an alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
STUMAX, STUMAXL: Atomic unsigned maximum on word or doubleword in memory, without
return: an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
STUMAXB, STUMAXLB: Atomic unsigned maximum on byte in memory, without
return: an alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
STUMAXH, STUMAXLH: Atomic unsigned maximum on halfword in memory, without
return: an alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
STUMIN, STUMINL: Atomic unsigned minimum on word or doubleword in memory, without
return: an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
STUMINB, STUMINLB: Atomic unsigned minimum on byte in memory, without
return: an alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
STUMINH, STUMINLH: Atomic unsigned minimum on halfword in memory, without
return: an alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
SQDMULH (by element): Signed saturating Doubling Multiply
returning High half (by element).
SQRDMLAH (by element): Signed Saturating Rounding Doubling Multiply Accumulate
returning High Half (by element).
SQRDMLSH (by element): Signed Saturating Rounding Doubling Multiply Subtract
returning High Half (by element).
SQRDMULH (by element): Signed saturating Rounding Doubling Multiply
returning High half (by element).
SQRDMLAH (vector): Signed Saturating Rounding Doubling Multiply Accumulate
returning High Half (vector).
SQRDMLSH (vector): Signed Saturating Rounding Doubling Multiply Subtract
returning High Half (vector).
SQDMULH (vector): Signed saturating Doubling Multiply
returning High half.
SQRDMULH (vector): Signed saturating Rounding Doubling Multiply
returning High half.
ADDHN, ADDHN2: Add
returning High Narrow.
RADDHN, RADDHN2: Rounding Add
returning High Narrow.
RSUBHN, RSUBHN2: Rounding Subtract
returning High Narrow.
SUBHN, SUBHN2: Subtract
returning High Narrow.
REV64: Reverse Bytes: an alias of
REV.
REV16 (vector): Reverse elements in 16-bit halfwords (vector).
REV16: Reverse bytes in 16-bit halfwords.
REV32 (vector): Reverse elements in 32-bit words (vector).
REV32: Reverse bytes in 32-bit words.
REV64: Reverse Bytes: an alias of REV.
REV64: Reverse elements in 64-bit doublewords (vector).
REV: Reverse Bytes.
Reverse Bit order (vector).
RBIT:
Reverse Bits.
Reverse bytes in 16-bit halfwords.
Reverse bytes in 32-bit words.
REV:
Reverse Bytes.
Reverse Bytes: an alias of REV.
Reverse elements in 16-bit halfwords (vector).
Reverse elements in 32-bit words (vector).
Reverse elements in 64-bit doublewords (vector).
SRSHR: Signed Rounding Shift
Right (immediate).
SSHR: Signed Shift
Right (immediate).
URSHR: Unsigned Rounding Shift
Right (immediate).
USHR: Unsigned Shift
Right (immediate).
ROR (immediate): Rotate
right (immediate): an alias of EXTR.
ASR (immediate): Arithmetic Shift
Right (immediate): an alias of SBFM.
LSR (immediate): Logical Shift
Right (immediate): an alias of UBFM.
ASR (register): Arithmetic Shift
Right (register): an alias of ASRV.
LSR (register): Logical Shift
Right (register): an alias of LSRV.
ROR (register): Rotate
Right (register): an alias of RORV.
SRSRA: Signed Rounding Shift
Right and Accumulate (immediate).
SSRA: Signed Shift
Right and Accumulate (immediate).
URSRA: Unsigned Rounding Shift
Right and Accumulate (immediate).
USRA: Unsigned Shift
Right and Accumulate (immediate).
SRI: Shift
Right and Insert (immediate).
RSHRN, RSHRN2: Rounding Shift
Right Narrow (immediate).
SHRN, SHRN2: Shift
Right Narrow (immediate).
SQRSHRN, SQRSHRN2: Signed saturating Rounded Shift
Right Narrow (immediate).
SQSHRN, SQSHRN2: Signed saturating Shift
Right Narrow (immediate).
UQRSHRN, UQRSHRN2: Unsigned saturating Rounded Shift
Right Narrow (immediate).
UQSHRN, UQSHRN2: Unsigned saturating Shift
Right Narrow (immediate).
SQRSHRUN, SQRSHRUN2: Signed saturating Rounded Shift
Right Unsigned Narrow (immediate).
SQSHRUN, SQSHRUN2: Signed saturating Shift
Right Unsigned Narrow (immediate).
ASRV: Arithmetic Shift
Right Variable.
LSRV: Logical Shift
Right Variable.
RORV: Rotate
Right Variable.
FSQRT (scalar): Floating-point Square
Root (scalar).
FSQRT (vector): Floating-point Square
Root (vector).
FRSQRTE: Floating-point Reciprocal Square
Root Estimate.
URSQRTE: Unsigned Reciprocal Square
Root Estimate.
FRSQRTS: Floating-point Reciprocal Square
Root Step.
ROR (immediate): Rotate right (immediate): an alias of EXTR.
ROR (register): Rotate Right (register): an alias of RORV.
ROR (register): Rotate Right (register): an alias of
RORV.
RORV: Rotate Right Variable.
RAX1:
Rotate and Exclusive OR.
Rotate right (immediate): an alias of EXTR.
Rotate Right (register): an alias of RORV.
RORV:
Rotate Right Variable.
SHA1H: SHA1 fixed
rotate.
XAR: Exclusive OR and
Rotate.
AESD: AES single
round decryption.
AESE: AES single
round encryption.
FRINTX (scalar): Floating-point
Round to Integral exact, using current rounding mode (scalar).
FRINTX (vector): Floating-point
Round to Integral exact, using current rounding mode (vector).
FRINTA (scalar): Floating-point
Round to Integral, to nearest with ties to Away (scalar).
FRINTA (vector): Floating-point
Round to Integral, to nearest with ties to Away (vector).
FRINTN (scalar): Floating-point
Round to Integral, to nearest with ties to even (scalar).
FRINTN (vector): Floating-point
Round to Integral, to nearest with ties to even (vector).
FRINTM (scalar): Floating-point
Round to Integral, toward Minus infinity (scalar).
FRINTM (vector): Floating-point
Round to Integral, toward Minus infinity (vector).
FRINTP (scalar): Floating-point
Round to Integral, toward Plus infinity (scalar).
FRINTP (vector): Floating-point
Round to Integral, toward Plus infinity (vector).
FRINTZ (scalar): Floating-point
Round to Integral, toward Zero (scalar).
FRINTZ (vector): Floating-point
Round to Integral, toward Zero (vector).
FRINTI (scalar): Floating-point
Round to Integral, using current rounding mode (scalar).
FRINTI (vector): Floating-point
Round to Integral, using current rounding mode (vector).
SQRSHRN, SQRSHRN2: Signed saturating
Rounded Shift Right Narrow (immediate).
UQRSHRN, UQRSHRN2: Unsigned saturating
Rounded Shift Right Narrow (immediate).
SQRSHRUN, SQRSHRUN2: Signed saturating
Rounded Shift Right Unsigned Narrow (immediate).
Rounding Add returning High Narrow.
SQRDMLAH (by element): Signed Saturating
Rounding Doubling Multiply Accumulate returning High Half (by element).
SQRDMLAH (vector): Signed Saturating
Rounding Doubling Multiply Accumulate returning High Half (vector).
SQRDMULH (by element): Signed saturating
Rounding Doubling Multiply returning High half (by element).
SQRDMULH (vector): Signed saturating
Rounding Doubling Multiply returning High half.
SQRDMLSH (by element): Signed Saturating
Rounding Doubling Multiply Subtract returning High Half (by element).
SQRDMLSH (vector): Signed Saturating
Rounding Doubling Multiply Subtract returning High Half (vector).
SRHADD: Signed
Rounding Halving Add.
URHADD: Unsigned
Rounding Halving Add.
FRINTI (scalar): Floating-point Round to Integral, using current
rounding mode (scalar).
FRINTX (scalar): Floating-point Round to Integral exact, using current
rounding mode (scalar).
FRINTI (vector): Floating-point Round to Integral, using current
rounding mode (vector).
FRINTX (vector): Floating-point Round to Integral exact, using current
rounding mode (vector).
SQRSHL: Signed saturating
Rounding Shift Left (register).
SRSHL: Signed
Rounding Shift Left (register).
UQRSHL: Unsigned saturating
Rounding Shift Left (register).
URSHL: Unsigned
Rounding Shift Left (register).
SRSHR: Signed
Rounding Shift Right (immediate).
URSHR: Unsigned
Rounding Shift Right (immediate).
SRSRA: Signed
Rounding Shift Right and Accumulate (immediate).
URSRA: Unsigned
Rounding Shift Right and Accumulate (immediate).
Rounding Shift Right Narrow (immediate).
Rounding Subtract returning High Narrow.
FCVTAS (scalar): Floating-point Convert to Signed integer,
rounding to nearest with ties to Away (scalar).
FCVTAU (scalar): Floating-point Convert to Unsigned integer,
rounding to nearest with ties to Away (scalar).
FCVTAS (vector): Floating-point Convert to Signed integer,
rounding to nearest with ties to Away (vector).
FCVTAU (vector): Floating-point Convert to Unsigned integer,
rounding to nearest with ties to Away (vector).
FCVTNS (scalar): Floating-point Convert to Signed integer,
rounding to nearest with ties to even (scalar).
FCVTNU (scalar): Floating-point Convert to Unsigned integer,
rounding to nearest with ties to even (scalar).
FCVTNS (vector): Floating-point Convert to Signed integer,
rounding to nearest with ties to even (vector).
FCVTNU (vector): Floating-point Convert to Unsigned integer,
rounding to nearest with ties to even (vector).
FCVTXN, FCVTXN2: Floating-point Convert to lower precision Narrow,
rounding to odd (vector).
FCVTMS (scalar): Floating-point Convert to Signed integer,
rounding toward Minus infinity (scalar).
FCVTMU (scalar): Floating-point Convert to Unsigned integer,
rounding toward Minus infinity (scalar).
FCVTMS (vector): Floating-point Convert to Signed integer,
rounding toward Minus infinity (vector).
FCVTMU (vector): Floating-point Convert to Unsigned integer,
rounding toward Minus infinity (vector).
FCVTPS (scalar): Floating-point Convert to Signed integer,
rounding toward Plus infinity (scalar).
FCVTPU (scalar): Floating-point Convert to Unsigned integer,
rounding toward Plus infinity (scalar).
FCVTPS (vector): Floating-point Convert to Signed integer,
rounding toward Plus infinity (vector).
FCVTPU (vector): Floating-point Convert to Unsigned integer,
rounding toward Plus infinity (vector).
FCVTZS (scalar, fixed-point): Floating-point Convert to Signed fixed-point,
rounding toward Zero (scalar).
FCVTZS (scalar, integer): Floating-point Convert to Signed integer,
rounding toward Zero (scalar).
FCVTZU (scalar, fixed-point): Floating-point Convert to Unsigned fixed-point,
rounding toward Zero (scalar).
FCVTZU (scalar, integer): Floating-point Convert to Unsigned integer,
rounding toward Zero (scalar).
FCVTZS (vector, fixed-point): Floating-point Convert to Signed fixed-point,
rounding toward Zero (vector).
FCVTZS (vector, integer): Floating-point Convert to Signed integer,
rounding toward Zero (vector).
FCVTZU (vector, fixed-point): Floating-point Convert to Unsigned fixed-point,
rounding toward Zero (vector).
FCVTZU (vector, integer): Floating-point Convert to Unsigned integer,
rounding toward Zero (vector).
FJCVTZS: Floating-point Javascript Convert to Signed fixed-point,
rounding toward Zero.
RSHRN, RSHRN2: Rounding Shift Right Narrow (immediate).
RSUBHN, RSUBHN2: Rounding Subtract returning High Narrow.
SABAL, SABAL2: Signed Absolute difference and Accumulate Long.
SABD: Signed Absolute Difference.
SABDL, SABDL2: Signed Absolute Difference Long.
SADALP: Signed Add and Accumulate Long Pairwise.
SADDL, SADDL2: Signed Add Long (vector).
SADDLP: Signed Add Long Pairwise.
SADDLV: Signed Add Long across Vector.
SADDW, SADDW2: Signed Add Wide.
CMHS (register): Compare unsigned Higher or
Same (vector).
SQABS: Signed
saturating Absolute value.
USQADD: Unsigned
saturating Accumulate of Signed value.
SUQADD: Signed
saturating Accumulate of Unsigned value.
SQADD: Signed
saturating Add.
UQADD: Unsigned
saturating Add.
SQDMULL, SQDMULL2 (by element): Signed
saturating Doubling Multiply Long (by element).
SQDMULL, SQDMULL2 (vector): Signed
saturating Doubling Multiply Long.
SQDMULH (by element): Signed
saturating Doubling Multiply returning High half (by element).
SQDMULH (vector): Signed
saturating Doubling Multiply returning High half.
SQDMLAL, SQDMLAL2 (by element): Signed
saturating Doubling Multiply-Add Long (by element).
SQDMLAL, SQDMLAL2 (vector): Signed
saturating Doubling Multiply-Add Long.
SQDMLSL, SQDMLSL2 (by element): Signed
saturating Doubling Multiply-Subtract Long (by element).
SQDMLSL, SQDMLSL2 (vector): Signed
saturating Doubling Multiply-Subtract Long.
SQXTN, SQXTN2: Signed
saturating extract Narrow.
UQXTN, UQXTN2: Unsigned
saturating extract Narrow.
SQXTUN, SQXTUN2: Signed
saturating extract Unsigned Narrow.
SQNEG: Signed
saturating Negate.
SQRSHRN, SQRSHRN2: Signed
saturating Rounded Shift Right Narrow (immediate).
UQRSHRN, UQRSHRN2: Unsigned
saturating Rounded Shift Right Narrow (immediate).
SQRSHRUN, SQRSHRUN2: Signed
saturating Rounded Shift Right Unsigned Narrow (immediate).
SQRDMLAH (by element): Signed
Saturating Rounding Doubling Multiply Accumulate returning High Half (by element).
SQRDMLAH (vector): Signed
Saturating Rounding Doubling Multiply Accumulate returning High Half (vector).
SQRDMULH (by element): Signed
saturating Rounding Doubling Multiply returning High half (by element).
SQRDMULH (vector): Signed
saturating Rounding Doubling Multiply returning High half.
SQRDMLSH (by element): Signed
Saturating Rounding Doubling Multiply Subtract returning High Half (by element).
SQRDMLSH (vector): Signed
Saturating Rounding Doubling Multiply Subtract returning High Half (vector).
SQRSHL: Signed
saturating Rounding Shift Left (register).
UQRSHL: Unsigned
saturating Rounding Shift Left (register).
SQSHL (immediate): Signed
saturating Shift Left (immediate).
UQSHL (immediate): Unsigned
saturating Shift Left (immediate).
SQSHL (register): Signed
saturating Shift Left (register).
UQSHL (register): Unsigned
saturating Shift Left (register).
SQSHLU: Signed
saturating Shift Left Unsigned (immediate).
SQSHRN, SQSHRN2: Signed
saturating Shift Right Narrow (immediate).
UQSHRN, UQSHRN2: Unsigned
saturating Shift Right Narrow (immediate).
SQSHRUN, SQSHRUN2: Signed
saturating Shift Right Unsigned Narrow (immediate).
SQSUB: Signed
saturating Subtract.
UQSUB: Unsigned
saturating Subtract.
NGC: Negate with Carry: an alias of
SBC.
SBC: Subtract with Carry.
NGCS: Negate with Carry, setting flags: an alias of
SBCS.
SBCS: Subtract with Carry, setting flags.
SBFIZ: Signed Bitfield Insert in Zero: an alias of SBFM.
ASR (immediate): Arithmetic Shift Right (immediate): an alias of
SBFM.
SBFIZ: Signed Bitfield Insert in Zero: an alias of
SBFM.
SBFX: Signed Bitfield Extract: an alias of
SBFM.
SXTB: Signed Extend Byte: an alias of
SBFM.
SXTH: Sign Extend Halfword: an alias of
SBFM.
SXTW: Sign Extend Word: an alias of
SBFM.
SBFM: Signed Bitfield Move.
SBFX: Signed Bitfield Extract: an alias of SBFM.
ADDP (scalar): Add Pair of elements (
scalar).
FABS (scalar): Floating-point Absolute value (
scalar).
FADD (scalar): Floating-point Add (
scalar).
FADDP (scalar): Floating-point Add Pair of elements (
scalar).
FCCMP: Floating-point Conditional quiet Compare (
scalar).
FCCMPE: Floating-point Conditional signaling Compare (
scalar).
FCMP: Floating-point quiet Compare (
scalar).
FCMPE: Floating-point signaling Compare (
scalar).
FCSEL: Floating-point Conditional Select (
scalar).
FCVT: Floating-point Convert precision (
scalar).
FCVTAS (scalar): Floating-point Convert to Signed integer, rounding to nearest with ties to Away (
scalar).
FCVTAU (scalar): Floating-point Convert to Unsigned integer, rounding to nearest with ties to Away (
scalar).
FCVTMS (scalar): Floating-point Convert to Signed integer, rounding toward Minus infinity (
scalar).
FCVTMU (scalar): Floating-point Convert to Unsigned integer, rounding toward Minus infinity (
scalar).
FCVTNS (scalar): Floating-point Convert to Signed integer, rounding to nearest with ties to even (
scalar).
FCVTNU (scalar): Floating-point Convert to Unsigned integer, rounding to nearest with ties to even (
scalar).
FCVTPS (scalar): Floating-point Convert to Signed integer, rounding toward Plus infinity (
scalar).
FCVTPU (scalar): Floating-point Convert to Unsigned integer, rounding toward Plus infinity (
scalar).
FCVTZS (scalar, fixed-point): Floating-point Convert to Signed fixed-point, rounding toward Zero (
scalar).
FCVTZS (scalar, integer): Floating-point Convert to Signed integer, rounding toward Zero (
scalar).
FCVTZU (scalar, fixed-point): Floating-point Convert to Unsigned fixed-point, rounding toward Zero (
scalar).
FCVTZU (scalar, integer): Floating-point Convert to Unsigned integer, rounding toward Zero (
scalar).
FDIV (scalar): Floating-point Divide (
scalar).
FMADD: Floating-point fused Multiply-Add (
scalar).
FMAX (scalar): Floating-point Maximum (
scalar).
FMAXNM (scalar): Floating-point Maximum Number (
scalar).
FMAXNMP (scalar): Floating-point Maximum Number of Pair of elements (
scalar).
FMAXP (scalar): Floating-point Maximum of Pair of elements (
scalar).
FMIN (scalar): Floating-point Minimum (
scalar).
FMINNM (scalar): Floating-point Minimum Number (
scalar).
FMINNMP (scalar): Floating-point Minimum Number of Pair of elements (
scalar).
FMINP (scalar): Floating-point Minimum of Pair of elements (
scalar).
FMOV (scalar, immediate): Floating-point move immediate (
scalar).
FMSUB: Floating-point Fused Multiply-Subtract (
scalar).
FMUL (scalar): Floating-point Multiply (
scalar).
FNEG (scalar): Floating-point Negate (
scalar).
FNMADD: Floating-point Negated fused Multiply-Add (
scalar).
FNMSUB: Floating-point Negated fused Multiply-Subtract (
scalar).
FNMUL (scalar): Floating-point Multiply-Negate (
scalar).
FRECPX: Floating-point Reciprocal exponent (
scalar).
FRINTA (scalar): Floating-point Round to Integral, to nearest with ties to Away (
scalar).
FRINTI (scalar): Floating-point Round to Integral, using current rounding mode (
scalar).
FRINTM (scalar): Floating-point Round to Integral, toward Minus infinity (
scalar).
FRINTN (scalar): Floating-point Round to Integral, to nearest with ties to even (
scalar).
FRINTP (scalar): Floating-point Round to Integral, toward Plus infinity (
scalar).
FRINTX (scalar): Floating-point Round to Integral exact, using current rounding mode (
scalar).
FRINTZ (scalar): Floating-point Round to Integral, toward Zero (
scalar).
FSQRT (scalar): Floating-point Square Root (
scalar).
FSUB (scalar): Floating-point Subtract (
scalar).
SCVTF (scalar, fixed-point): Signed fixed-point Convert to Floating-point (
scalar).
SCVTF (scalar, integer): Signed integer Convert to Floating-point (
scalar).
UCVTF (scalar, fixed-point): Unsigned fixed-point Convert to Floating-point (
scalar).
UCVTF (scalar, integer): Unsigned integer Convert to Floating-point (
scalar).
scalar): Floating-point Convert to Signed integer, rounding to nearest with ties to Away (scalar).
scalar): Floating-point Convert to Signed integer, rounding to nearest with ties to even (scalar).
scalar): Floating-point Convert to Unsigned integer, rounding to nearest with ties to Away (scalar).
scalar): Floating-point Convert to Unsigned integer, rounding to nearest with ties to even (scalar).
scalar): Floating-point Convert to Unsigned integer, rounding toward Minus infinity (scalar).
scalar): Floating-point Convert to Unsigned integer, rounding toward Plus infinity (scalar).
scalar, fixed-point): Floating-point Convert to Signed fixed-point, rounding toward Zero (scalar).
scalar, fixed-point): Floating-point Convert to Unsigned fixed-point, rounding toward Zero (scalar).
scalar, fixed-point): Signed fixed-point Convert to Floating-point (scalar).
scalar, fixed-point): Unsigned fixed-point Convert to Floating-point (scalar).
scalar, immediate): Floating-point move immediate (scalar).
scalar, integer): Floating-point Convert to Signed integer, rounding toward Zero (scalar).
scalar, integer): Floating-point Convert to Unsigned integer, rounding toward Zero (scalar).
scalar, integer): Signed integer Convert to Floating-point (scalar).
scalar, integer): Unsigned integer Convert to Floating-point (scalar).
DUP (element): Duplicate vector element to vector or
scalar.
MOV (scalar): Move vector element to
scalar: an alias of DUP (element).
SHA1SU0: SHA1
schedule update 0.
SHA256SU0: SHA256
schedule update 0.
SHA512SU0: SHA512
Schedule Update 0.
SHA1SU1: SHA1
schedule update 1.
SHA256SU1: SHA256
schedule update 1.
SHA512SU1: SHA512
Schedule Update 1.
SCVTF (scalar, fixed-point): Signed fixed-point Convert to Floating-point (scalar).
SCVTF (scalar, integer): Signed integer Convert to Floating-point (scalar).
SCVTF (vector, fixed-point): Signed fixed-point Convert to Floating-point (vector).
SCVTF (vector, integer): Signed integer Convert to Floating-point (vector).
SDIV: Signed Divide.
SDOT (by element): Dot Product signed arithmetic (vector, by element).
SDOT (vector): Dot Product signed arithmetic (vector).
TRN2: Transpose vectors (
secondary).
UZP2: Unzip vectors (
secondary).
ZIP2: Zip vectors (
secondary).
SMC:
Secure Monitor Call.
FCSEL: Floating-point Conditional
Select (scalar).
CSINC: Conditional
Select Increment.
CSINV: Conditional
Select Invert.
CSNEG: Conditional
Select Negation.
BSL: Bitwise
Select.
CSEL: Conditional
Select.
SEVL:
Send Event Local.
SEV:
Send Event.
CSETM: Conditional
Set Mask: an alias of CSINV.
STSETB, STSETLB: Atomic bit
set on byte in memory, without return: an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
LDSETB, LDSETAB, LDSETALB, LDSETLB: Atomic bit
set on byte in memory.
STSETH, STSETLH: Atomic bit
set on halfword in memory, without return: an alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
LDSETH, LDSETAH, LDSETALH, LDSETLH: Atomic bit
set on halfword in memory.
STSET, STSETL: Atomic bit
set on word or doubleword in memory, without return: an alias of LDSET, LDSETA, LDSETAL, LDSETL.
LDSET, LDSETA, LDSETAL, LDSETL: Atomic bit
set on word or doubleword in memory.
CSET: Conditional
Set: an alias of CSINC.
SEV: Send Event.
SEVL: Send Event Local.
SHA1 fixed rotate.
SHA1 hash update (choose).
SHA1 hash update (majority).
SHA1 hash update (parity).
SHA1 schedule update 0.
SHA1 schedule update 1.
SHA1C: SHA1 hash update (choose).
SHA1H: SHA1 fixed rotate.
SHA1M: SHA1 hash update (majority).
SHA1P: SHA1 hash update (parity).
SHA1SU0: SHA1 schedule update 0.
SHA1SU1: SHA1 schedule update 1.
SHA256 hash update (part 1).
SHA256 hash update (part 2).
SHA256 schedule update 0.
SHA256 schedule update 1.
SHA256H2: SHA256 hash update (part 2).
SHA256H: SHA256 hash update (part 1).
SHA256SU0: SHA256 schedule update 0.
SHA256SU1: SHA256 schedule update 1.
SHA512 Hash update part 1.
SHA512 Hash update part 2.
SHA512 Schedule Update 0.
SHA512 Schedule Update 1.
SHA512H2: SHA512 Hash update part 2.
SHA512H: SHA512 Hash update part 1.
SHA512SU0: SHA512 Schedule Update 0.
SHA512SU1: SHA512 Schedule Update 1.
SHADD: Signed Halving Add.
SHL:
Shift Left (immediate).
SQSHL (immediate): Signed saturating
Shift Left (immediate).
UQSHL (immediate): Unsigned saturating
Shift Left (immediate).
LSL (immediate): Logical
Shift Left (immediate): an alias of UBFM.
SQRSHL: Signed saturating Rounding
Shift Left (register).
SQSHL (register): Signed saturating
Shift Left (register).
SRSHL: Signed Rounding
Shift Left (register).
SSHL: Signed
Shift Left (register).
UQRSHL: Unsigned saturating Rounding
Shift Left (register).
UQSHL (register): Unsigned saturating
Shift Left (register).
URSHL: Unsigned Rounding
Shift Left (register).
USHL: Unsigned
Shift Left (register).
LSL (register): Logical
Shift Left (register): an alias of LSLV.
SLI:
Shift Left and Insert (immediate).
Shift Left Long (by element size).
SSHLL, SSHLL2: Signed
Shift Left Long (immediate).
USHLL, USHLL2: Unsigned
Shift Left Long (immediate).
SQSHLU: Signed saturating
Shift Left Unsigned (immediate).
LSLV: Logical
Shift Left Variable.
SRSHR: Signed Rounding
Shift Right (immediate).
SSHR: Signed
Shift Right (immediate).
URSHR: Unsigned Rounding
Shift Right (immediate).
USHR: Unsigned
Shift Right (immediate).
ASR (immediate): Arithmetic
Shift Right (immediate): an alias of SBFM.
LSR (immediate): Logical
Shift Right (immediate): an alias of UBFM.
ASR (register): Arithmetic
Shift Right (register): an alias of ASRV.
LSR (register): Logical
Shift Right (register): an alias of LSRV.
SRSRA: Signed Rounding
Shift Right and Accumulate (immediate).
SSRA: Signed
Shift Right and Accumulate (immediate).
URSRA: Unsigned Rounding
Shift Right and Accumulate (immediate).
USRA: Unsigned
Shift Right and Accumulate (immediate).
SRI:
Shift Right and Insert (immediate).
RSHRN, RSHRN2: Rounding
Shift Right Narrow (immediate).
Shift Right Narrow (immediate).
SQRSHRN, SQRSHRN2: Signed saturating Rounded
Shift Right Narrow (immediate).
SQSHRN, SQSHRN2: Signed saturating
Shift Right Narrow (immediate).
UQRSHRN, UQRSHRN2: Unsigned saturating Rounded
Shift Right Narrow (immediate).
UQSHRN, UQSHRN2: Unsigned saturating
Shift Right Narrow (immediate).
SQRSHRUN, SQRSHRUN2: Signed saturating Rounded
Shift Right Unsigned Narrow (immediate).
SQSHRUN, SQSHRUN2: Signed saturating
Shift Right Unsigned Narrow (immediate).
ASRV: Arithmetic
Shift Right Variable.
LSRV: Logical
Shift Right Variable.
ADDS (shifted register): Add (
shifted register), setting flags.
ANDS (shifted register): Bitwise AND (
shifted register), setting flags.
BICS (shifted register): Bitwise Bit Clear (
shifted register), setting flags.
SUBS (shifted register): Subtract (
shifted register), setting flags.
ADD (shifted register): Add (
shifted register).
AND (shifted register): Bitwise AND (
shifted register).
BIC (shifted register): Bitwise Bit Clear (
shifted register).
CMN (shifted register): Compare Negative (shifted register): an alias of ADDS (
shifted register).
CMP (shifted register): Compare (shifted register): an alias of SUBS (
shifted register).
EON (shifted register): Bitwise Exclusive OR NOT (
shifted register).
EOR (shifted register): Bitwise Exclusive OR (
shifted register).
MOV (register): Move (register): an alias of ORR (
shifted register).
MVN: Bitwise NOT: an alias of ORN (
shifted register).
NEG (shifted register): Negate (shifted register): an alias of SUB (
shifted register).
NEGS: Negate, setting flags: an alias of SUBS (
shifted register).
ORN (shifted register): Bitwise OR NOT (
shifted register).
ORR (shifted register): Bitwise OR (
shifted register).
SUB (shifted register): Subtract (
shifted register).
TST (shifted register): Test (shifted register): an alias of ANDS (
shifted register).
shifted register): Add (shifted register), setting flags.
shifted register): Add (shifted register).
CMN (shifted register): Compare Negative (
shifted register): an alias of ADDS (shifted register).
TST (shifted register): Test (
shifted register): an alias of ANDS (shifted register).
NEG (shifted register): Negate (
shifted register): an alias of SUB (shifted register).
CMP (shifted register): Compare (
shifted register): an alias of SUBS (shifted register).
shifted register): Bitwise AND (shifted register), setting flags.
shifted register): Bitwise AND (shifted register).
shifted register): Bitwise Bit Clear (shifted register), setting flags.
shifted register): Bitwise Bit Clear (shifted register).
shifted register): Bitwise Exclusive OR (shifted register).
shifted register): Bitwise Exclusive OR NOT (shifted register).
shifted register): Bitwise OR (shifted register).
shifted register): Bitwise OR NOT (shifted register).
shifted register): Compare (shifted register): an alias of SUBS (shifted register).
shifted register): Compare Negative (shifted register): an alias of ADDS (shifted register).
shifted register): Negate (shifted register): an alias of SUB (shifted register).
shifted register): Subtract (shifted register), setting flags.
shifted register): Subtract (shifted register).
shifted register): Test (shifted register): an alias of ANDS (shifted register).
SHL: Shift Left (immediate).
SHLL, SHLL2: Shift Left Long (by element size).
SHRN, SHRN2: Shift Right Narrow (immediate).
SHSUB: Signed Halving Subtract.
CLS (vector): Count Leading
Sign bits (vector).
CLS: Count leading
sign bits.
SXTH:
Sign Extend Halfword: an alias of SBFM.
SXTW:
Sign Extend Word: an alias of SBFM.
FCCMPE: Floating-point Conditional
signaling Compare (scalar).
FCMPE: Floating-point
signaling Compare (scalar).
Signed Absolute difference and Accumulate Long.
SABA:
Signed Absolute difference and Accumulate.
Signed Absolute Difference Long.
SABD:
Signed Absolute Difference.
Signed Add and Accumulate Long Pairwise.
Signed Add Long (vector).
Signed Add Long across Vector.
Signed Add Long Pairwise.
Signed Add Wide.
SDOT (vector): Dot Product
signed arithmetic (vector).
SDOT (by element): Dot Product
signed arithmetic (vector, by element).
SBFX:
Signed Bitfield Extract: an alias of SBFM.
Signed Bitfield Insert in Zero: an alias of SBFM.
SBFM:
Signed Bitfield Move.
LDRSB (immediate): Load Register
Signed Byte (immediate).
LDRSB (register): Load Register
Signed Byte (register).
LDTRSB: Load Register
Signed Byte (unprivileged).
LDURSB: Load Register
Signed Byte (unscaled).
SDIV:
Signed Divide.
SXTB:
Signed Extend Byte: an alias of SBFM.
Signed extend Long: an alias of SSHLL, SSHLL2.
Signed fixed-point Convert to Floating-point (scalar).
Signed fixed-point Convert to Floating-point (vector).
FCVTZS (scalar, fixed-point): Floating-point Convert to
Signed fixed-point, rounding toward Zero (scalar).
FCVTZS (vector, fixed-point): Floating-point Convert to
Signed fixed-point, rounding toward Zero (vector).
FJCVTZS: Floating-point Javascript Convert to
Signed fixed-point, rounding toward Zero.
CMGT (register): Compare
signed Greater than (vector).
CMGE (register): Compare
signed Greater than or Equal (vector).
CMGE (zero): Compare
signed Greater than or Equal to zero (vector).
CMGT (zero): Compare
signed Greater than zero (vector).
LDRSH (immediate): Load Register
Signed Halfword (immediate).
LDRSH (register): Load Register
Signed Halfword (register).
LDTRSH: Load Register
Signed Halfword (unprivileged).
LDURSH: Load Register
Signed Halfword (unscaled).
Signed Halving Add.
Signed Halving Subtract.
Signed integer Convert to Floating-point (scalar).
Signed integer Convert to Floating-point (vector).
FCVTAS (scalar): Floating-point Convert to
Signed integer, rounding to nearest with ties to Away (scalar).
FCVTAS (vector): Floating-point Convert to
Signed integer, rounding to nearest with ties to Away (vector).
FCVTNS (scalar): Floating-point Convert to
Signed integer, rounding to nearest with ties to even (scalar).
FCVTNS (vector): Floating-point Convert to
Signed integer, rounding to nearest with ties to even (vector).
FCVTMS (scalar): Floating-point Convert to
Signed integer, rounding toward Minus infinity (scalar).
FCVTMS (vector): Floating-point Convert to
Signed integer, rounding toward Minus infinity (vector).
FCVTPS (scalar): Floating-point Convert to
Signed integer, rounding toward Plus infinity (scalar).
FCVTPS (vector): Floating-point Convert to
Signed integer, rounding toward Plus infinity (vector).
FCVTZS (scalar, integer): Floating-point Convert to
Signed integer, rounding toward Zero (scalar).
FCVTZS (vector, integer): Floating-point Convert to
Signed integer, rounding toward Zero (vector).
CMLE (zero): Compare
signed Less than or Equal to zero (vector).
CMLT (zero): Compare
signed Less than zero (vector).
SMAX:
Signed Maximum (vector).
Signed Maximum across Vector.
STSMAXB, STSMAXLB: Atomic
signed maximum on byte in memory, without return: an alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
signed maximum on byte in memory.
STSMAXH, STSMAXLH: Atomic
signed maximum on halfword in memory, without return: an alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
signed maximum on halfword in memory.
STSMAX, STSMAXL: Atomic
signed maximum on word or doubleword in memory, without return: an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
signed maximum on word or doubleword in memory.
Signed Maximum Pairwise.
SMIN:
Signed Minimum (vector).
Signed Minimum across Vector.
STSMINB, STSMINLB: Atomic
signed minimum on byte in memory, without return: an alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
signed minimum on byte in memory.
STSMINH, STSMINLH: Atomic
signed minimum on halfword in memory, without return: an alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
signed minimum on halfword in memory.
STSMIN, STSMINL: Atomic
signed minimum on word or doubleword in memory, without return: an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
signed minimum on word or doubleword in memory.
Signed Minimum Pairwise.
SMOV:
Signed Move vector element to general-purpose register.
Signed Multiply High.
Signed Multiply Long (vector).
Signed Multiply Long (vector, by element).
Signed Multiply Long: an alias of SMADDL.
Signed Multiply-Add Long (vector).
Signed Multiply-Add Long (vector, by element).
Signed Multiply-Add Long.
Signed Multiply-Negate Long: an alias of SMSUBL.
Signed Multiply-Subtract Long (vector).
Signed Multiply-Subtract Long (vector, by element).
Signed Multiply-Subtract Long.
Signed Rounding Halving Add.
Signed Rounding Shift Left (register).
Signed Rounding Shift Right (immediate).
Signed Rounding Shift Right and Accumulate (immediate).
Signed saturating Absolute value.
Signed saturating Accumulate of Unsigned value.
Signed saturating Add.
Signed saturating Doubling Multiply Long (by element).
Signed saturating Doubling Multiply Long.
Signed saturating Doubling Multiply returning High half (by element).
Signed saturating Doubling Multiply returning High half.
Signed saturating Doubling Multiply-Add Long (by element).
Signed saturating Doubling Multiply-Add Long.
Signed saturating Doubling Multiply-Subtract Long (by element).
Signed saturating Doubling Multiply-Subtract Long.
Signed saturating extract Narrow.
Signed saturating extract Unsigned Narrow.
Signed saturating Negate.
Signed saturating Rounded Shift Right Narrow (immediate).
Signed saturating Rounded Shift Right Unsigned Narrow (immediate).
Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (by element).
Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (vector).
Signed saturating Rounding Doubling Multiply returning High half (by element).
Signed saturating Rounding Doubling Multiply returning High half.
Signed Saturating Rounding Doubling Multiply Subtract returning High Half (by element).
Signed Saturating Rounding Doubling Multiply Subtract returning High Half (vector).
Signed saturating Rounding Shift Left (register).
Signed saturating Shift Left (immediate).
Signed saturating Shift Left (register).
Signed saturating Shift Left Unsigned (immediate).
Signed saturating Shift Right Narrow (immediate).
Signed saturating Shift Right Unsigned Narrow (immediate).
Signed saturating Subtract.
SSHL:
Signed Shift Left (register).
Signed Shift Left Long (immediate).
SSHR:
Signed Shift Right (immediate).
SSRA:
Signed Shift Right and Accumulate (immediate).
Signed Subtract Long.
Signed Subtract Wide.
USQADD: Unsigned saturating Accumulate of
Signed value.
LDRSW (immediate): Load Register
Signed Word (immediate).
LDRSW (literal): Load Register
Signed Word (literal).
LDRSW (register): Load Register
Signed Word (register).
LDTRSW: Load Register
Signed Word (unprivileged).
LDURSW: Load Register
Signed Word (unscaled).
LDPSW: Load Pair of Registers
Signed Word.
LDR (immediate, SIMD&FP): Load
SIMD&FP Register (immediate offset).
STR (immediate, SIMD&FP): Store
SIMD&FP register (immediate offset).
LDR (literal, SIMD&FP): Load
SIMD&FP Register (PC-relative literal).
LDR (register, SIMD&FP): Load
SIMD&FP Register (register offset).
STR (register, SIMD&FP): Store
SIMD&FP register (register offset).
LDUR (SIMD&FP): Load
SIMD&FP Register (unscaled offset).
STUR (SIMD&FP): Store
SIMD&FP register (unscaled offset).
LDNP (SIMD&FP): Load Pair of
SIMD&FP registers, with Non-temporal hint.
STNP (SIMD&FP): Store Pair of
SIMD&FP registers, with Non-temporal hint.
LDP (SIMD&FP): Load Pair of
SIMD&FP registers.
STP (SIMD&FP): Store Pair of
SIMD&FP registers.
SIMD&FP): Load SIMD&FP Register (immediate offset).
SIMD&FP): Load SIMD&FP Register (PC-relative literal).
SIMD&FP): Load SIMD&FP Register (register offset).
SIMD&FP): Store SIMD&FP register (immediate offset).
SIMD&FP): Store SIMD&FP register (register offset).
LD2R: Load
single 2-element structure and Replicate to all lanes of two registers.
ST2 (single structure): Store
single 2-element structure from one lane of two registers.
LD2 (single structure): Load
single 2-element structure to one lane of two registers.
LD3R: Load
single 3-element structure and Replicate to all lanes of three registers.
ST3 (single structure): Store
single 3-element structure from one lane of three registers.
LD3 (single structure): Load
single 3-element structure to one lane of three registers).
LD4R: Load
single 4-element structure and Replicate to all lanes of four registers.
ST4 (single structure): Store
single 4-element structure from one lane of four registers.
LD4 (single structure): Load
single 4-element structure to one lane of four registers.
AESD: AES
single round decryption.
AESE: AES
single round encryption.
single structure): Load one single-element structure to one lane of one register.
single structure): Load single 2-element structure to one lane of two registers.
single structure): Load single 3-element structure to one lane of three registers).
single structure): Load single 4-element structure to one lane of four registers.
single structure): Store a single-element structure from one lane of one register.
single structure): Store single 2-element structure from one lane of two registers.
single structure): Store single 3-element structure from one lane of three registers.
single structure): Store single 4-element structure from one lane of four registers.
LD1R: Load one
single-element structure and Replicate to all lanes (of one register).
ST1 (single structure): Store a
single-element structure from one lane of one register.
LD1 (single structure): Load one
single-element structure to one lane of one register.
ST1 (multiple structures): Store multiple
single-element structures from one, two, three, or four registers.
LD1 (multiple structures): Load multiple
single-element structures to one, two, three, or four registers.
SHLL, SHLL2: Shift Left Long (by element
size).
SLI: Shift Left and Insert (immediate).
SM3PARTW1.
SM3PARTW1: SM3PARTW1.
SM3PARTW2.
SM3PARTW2: SM3PARTW2.
SM3SS1.
SM3SS1: SM3SS1.
SM3TT1A.
SM3TT1A: SM3TT1A.
SM3TT1B.
SM3TT1B: SM3TT1B.
SM3TT2A.
SM3TT2A: SM3TT2A.
SM3TT2B.
SM3TT2B: SM3TT2B.
SM4E:
SM4 Encode.
SM4 Key.
SM4E: SM4 Encode.
SM4EKEY: SM4 Key.
SMULL: Signed Multiply Long: an alias of
SMADDL.
SMADDL: Signed Multiply-Add Long.
SMAX: Signed Maximum (vector).
SMAXP: Signed Maximum Pairwise.
SMAXV: Signed Maximum across Vector.
SMC: Secure Monitor Call.
SMIN: Signed Minimum (vector).
SMINP: Signed Minimum Pairwise.
SMINV: Signed Minimum across Vector.
SMLAL, SMLAL2 (by element): Signed Multiply-Add Long (vector, by element).
SMLAL, SMLAL2 (vector): Signed Multiply-Add Long (vector).
SMLAL2 (by element): Signed Multiply-Add Long (vector, by element).
SMLAL2 (vector): Signed Multiply-Add Long (vector).
SMLSL, SMLSL2 (by element): Signed Multiply-Subtract Long (vector, by element).
SMLSL, SMLSL2 (vector): Signed Multiply-Subtract Long (vector).
SMLSL2 (by element): Signed Multiply-Subtract Long (vector, by element).
SMLSL2 (vector): Signed Multiply-Subtract Long (vector).
SMNEGL: Signed Multiply-Negate Long: an alias of SMSUBL.
SMOV: Signed Move vector element to general-purpose register.
SMNEGL: Signed Multiply-Negate Long: an alias of
SMSUBL.
SMSUBL: Signed Multiply-Subtract Long.
SMULH: Signed Multiply High.
SMULL, SMULL2 (by element): Signed Multiply Long (vector, by element).
SMULL, SMULL2 (vector): Signed Multiply Long (vector).
SMULL2 (by element): Signed Multiply Long (vector, by element).
SMULL2 (vector): Signed Multiply Long (vector).
SMULL: Signed Multiply Long: an alias of SMADDL.
SP): Move between register and stack pointer: an alias of ADD (immediate).
MSR (immediate): Move immediate value to
Special Register.
CSDB: Consumption of
Speculative Data Barrier.
SQABS: Signed saturating Absolute value.
SQADD: Signed saturating Add.
SQDMLAL, SQDMLAL2 (by element): Signed saturating Doubling Multiply-Add Long (by element).
SQDMLAL, SQDMLAL2 (vector): Signed saturating Doubling Multiply-Add Long.
SQDMLAL2 (by element): Signed saturating Doubling Multiply-Add Long (by element).
SQDMLAL2 (vector): Signed saturating Doubling Multiply-Add Long.
SQDMLSL, SQDMLSL2 (by element): Signed saturating Doubling Multiply-Subtract Long (by element).
SQDMLSL, SQDMLSL2 (vector): Signed saturating Doubling Multiply-Subtract Long.
SQDMLSL2 (by element): Signed saturating Doubling Multiply-Subtract Long (by element).
SQDMLSL2 (vector): Signed saturating Doubling Multiply-Subtract Long.
SQDMULH (by element): Signed saturating Doubling Multiply returning High half (by element).
SQDMULH (vector): Signed saturating Doubling Multiply returning High half.
SQDMULL, SQDMULL2 (by element): Signed saturating Doubling Multiply Long (by element).
SQDMULL, SQDMULL2 (vector): Signed saturating Doubling Multiply Long.
SQDMULL2 (by element): Signed saturating Doubling Multiply Long (by element).
SQDMULL2 (vector): Signed saturating Doubling Multiply Long.
SQNEG: Signed saturating Negate.
SQRDMLAH (by element): Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (by element).
SQRDMLAH (vector): Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (vector).
SQRDMLSH (by element): Signed Saturating Rounding Doubling Multiply Subtract returning High Half (by element).
SQRDMLSH (vector): Signed Saturating Rounding Doubling Multiply Subtract returning High Half (vector).
SQRDMULH (by element): Signed saturating Rounding Doubling Multiply returning High half (by element).
SQRDMULH (vector): Signed saturating Rounding Doubling Multiply returning High half.
SQRSHL: Signed saturating Rounding Shift Left (register).
SQRSHRN, SQRSHRN2: Signed saturating Rounded Shift Right Narrow (immediate).
SQRSHRUN, SQRSHRUN2: Signed saturating Rounded Shift Right Unsigned Narrow (immediate).
SQSHL (immediate): Signed saturating Shift Left (immediate).
SQSHL (register): Signed saturating Shift Left (register).
SQSHLU: Signed saturating Shift Left Unsigned (immediate).
SQSHRN, SQSHRN2: Signed saturating Shift Right Narrow (immediate).
SQSHRUN, SQSHRUN2: Signed saturating Shift Right Unsigned Narrow (immediate).
SQSUB: Signed saturating Subtract.
FSQRT (scalar): Floating-point
Square Root (scalar).
FSQRT (vector): Floating-point
Square Root (vector).
FRSQRTE: Floating-point Reciprocal
Square Root Estimate.
URSQRTE: Unsigned Reciprocal
Square Root Estimate.
FRSQRTS: Floating-point Reciprocal
Square Root Step.
SQXTN, SQXTN2: Signed saturating extract Narrow.
SQXTUN, SQXTUN2: Signed saturating extract Unsigned Narrow.
SRHADD: Signed Rounding Halving Add.
SRI: Shift Right and Insert (immediate).
SRSHL: Signed Rounding Shift Left (register).
SRSHR: Signed Rounding Shift Right (immediate).
SRSRA: Signed Rounding Shift Right and Accumulate (immediate).
SSHL: Signed Shift Left (register).
SXTL, SXTL2: Signed extend Long: an alias of
SSHLL, SSHLL2.
SSHLL, SSHLL2: Signed Shift Left Long (immediate).
SXTL, SXTL2: Signed extend Long: an alias of SSHLL,
SSHLL2.
SSHR: Signed Shift Right (immediate).
SSRA: Signed Shift Right and Accumulate (immediate).
SSUBL, SSUBL2: Signed Subtract Long.
SSUBW, SSUBW2: Signed Subtract Wide.
ST1 (multiple structures): Store multiple single-element structures from one, two, three, or four registers.
ST1 (single structure): Store a single-element structure from one lane of one register.
ST2 (multiple structures): Store multiple 2-element structures from two registers.
ST2 (single structure): Store single 2-element structure from one lane of two registers.
ST3 (multiple structures): Store multiple 3-element structures from three registers.
ST3 (single structure): Store single 3-element structure from one lane of three registers.
ST4 (multiple structures): Store multiple 4-element structures from four registers.
ST4 (single structure): Store single 4-element structure from one lane of four registers.
MOV (to/from SP): Move between register and
stack pointer: an alias of ADD (immediate).
STADD, STADDL: Atomic add on word or doubleword in memory, without return: an alias of LDADD, LDADDA, LDADDAL, LDADDL.
STADDB, STADDLB: Atomic add on byte in memory, without return: an alias of LDADDB, LDADDAB, LDADDALB, LDADDLB.
STADDH, STADDLH: Atomic add on halfword in memory, without return: an alias of LDADDH, LDADDAH, LDADDALH, LDADDLH.
STADDL: Atomic add on word or doubleword in memory, without return: an alias of LDADD, LDADDA, LDADDAL, LDADDL.
STADDLB: Atomic add on byte in memory, without return: an alias of LDADDB, LDADDAB, LDADDALB, LDADDLB.
STADDLH: Atomic add on halfword in memory, without return: an alias of LDADDH, LDADDAH, LDADDALH, LDADDLH.
DCPS1: Debug Change PE
State to EL1..
DCPS2: Debug Change PE
State to EL2..
DCPS3: Debug Change PE
State to EL3.
DRPS: Debug restore process
state.
STCLR, STCLRL: Atomic bit clear on word or doubleword in memory, without return: an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
STCLRB, STCLRLB: Atomic bit clear on byte in memory, without return: an alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
STCLRH, STCLRLH: Atomic bit clear on halfword in memory, without return: an alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
STCLRL: Atomic bit clear on word or doubleword in memory, without return: an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
STCLRLB: Atomic bit clear on byte in memory, without return: an alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
STCLRLH: Atomic bit clear on halfword in memory, without return: an alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
STEOR, STEORL: Atomic exclusive OR on word or doubleword in memory, without return: an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
STEORB, STEORLB: Atomic exclusive OR on byte in memory, without return: an alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
STEORH, STEORLH: Atomic exclusive OR on halfword in memory, without return: an alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
STEORL: Atomic exclusive OR on word or doubleword in memory, without return: an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
STEORLB: Atomic exclusive OR on byte in memory, without return: an alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
STEORLH: Atomic exclusive OR on halfword in memory, without return: an alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
FRECPS: Floating-point Reciprocal
Step.
FRSQRTS: Floating-point Reciprocal Square Root
Step.
STLLR: Store LORelease Register.
STLLRB: Store LORelease Register Byte.
STLLRH: Store LORelease Register Halfword.
STLR: Store-Release Register.
STLRB: Store-Release Register Byte.
STLRH: Store-Release Register Halfword.
STLXP: Store-Release Exclusive Pair of registers.
STLXR: Store-Release Exclusive Register.
STLXRB: Store-Release Exclusive Register Byte.
STLXRH: Store-Release Exclusive Register Halfword.
STNP (SIMD&FP): Store Pair of SIMD&FP registers, with Non-temporal hint.
STNP: Store Pair of Registers, with non-temporal hint.
Store a single-element structure from one lane of one register.
STXP:
Store Exclusive Pair of registers.
Store Exclusive Register Byte.
Store Exclusive Register Halfword.
STXR:
Store Exclusive Register.
Store LORelease Register Byte.
Store LORelease Register Halfword.
Store LORelease Register.
Store multiple 2-element structures from two registers.
Store multiple 3-element structures from three registers.
Store multiple 4-element structures from four registers.
Store multiple single-element structures from one, two, three, or four registers.
STNP:
Store Pair of Registers, with non-temporal hint.
STP:
Store Pair of Registers.
Store Pair of SIMD&FP registers, with Non-temporal hint.
Store Pair of SIMD&FP registers.
Store Register (immediate).
Store Register (register).
STTR:
Store Register (unprivileged).
STUR:
Store Register (unscaled).
Store Register Byte (immediate).
Store Register Byte (register).
Store Register Byte (unprivileged).
Store Register Byte (unscaled).
Store Register Halfword (immediate).
Store Register Halfword (register).
Store Register Halfword (unprivileged).
Store Register Halfword (unscaled).
Store SIMD&FP register (immediate offset).
Store SIMD&FP register (register offset).
Store SIMD&FP register (unscaled offset).
Store single 2-element structure from one lane of two registers.
Store single 3-element structure from one lane of three registers.
Store single 4-element structure from one lane of four registers.
Store-Release Exclusive Pair of registers.
Store-Release Exclusive Register Byte.
Store-Release Exclusive Register Halfword.
Store-Release Exclusive Register.
Store-Release Register Byte.
Store-Release Register Halfword.
STLR:
Store-Release Register.
STP (SIMD&FP): Store Pair of SIMD&FP registers.
STP: Store Pair of Registers.
STR (immediate): Store Register (immediate).
STR (immediate, SIMD&FP): Store SIMD&FP register (immediate offset).
STR (register): Store Register (register).
STR (register, SIMD&FP): Store SIMD&FP register (register offset).
STRB (immediate): Store Register Byte (immediate).
STRB (register): Store Register Byte (register).
STRH (immediate): Store Register Halfword (immediate).
STRH (register): Store Register Halfword (register).
Strip Pointer Authentication Code.
LD1R: Load one single-element
structure and Replicate to all lanes (of one register).
LD4R: Load single 4-element
structure and Replicate to all lanes of four registers.
LD3R: Load single 3-element
structure and Replicate to all lanes of three registers.
LD2R: Load single 2-element
structure and Replicate to all lanes of two registers.
ST4 (single structure): Store single 4-element
structure from one lane of four registers.
ST1 (single structure): Store a single-element
structure from one lane of one register.
ST3 (single structure): Store single 3-element
structure from one lane of three registers.
ST2 (single structure): Store single 2-element
structure from one lane of two registers.
LD4 (single structure): Load single 4-element
structure to one lane of four registers.
LD1 (single structure): Load one single-element
structure to one lane of one register.
LD3 (single structure): Load single 3-element
structure to one lane of three registers).
LD2 (single structure): Load single 2-element
structure to one lane of two registers.
structure): Load one single-element structure to one lane of one register.
structure): Load single 2-element structure to one lane of two registers.
structure): Load single 3-element structure to one lane of three registers).
structure): Load single 4-element structure to one lane of four registers.
structure): Store a single-element structure from one lane of one register.
structure): Store single 2-element structure from one lane of two registers.
structure): Store single 3-element structure from one lane of three registers.
structure): Store single 4-element structure from one lane of four registers.
ST4 (multiple structures): Store multiple 4-element
structures from four registers.
ST1 (multiple structures): Store multiple single-element
structures from one, two, three, or four registers.
ST3 (multiple structures): Store multiple 3-element
structures from three registers.
ST2 (multiple structures): Store multiple 2-element
structures from two registers.
LD4 (multiple structures): Load multiple 4-element
structures to four registers.
LD1 (multiple structures): Load multiple single-element
structures to one, two, three, or four registers.
LD3 (multiple structures): Load multiple 3-element
structures to three registers.
LD2 (multiple structures): Load multiple 2-element
structures to two registers.
structures): Load multiple 2-element structures to two registers.
structures): Load multiple 3-element structures to three registers.
structures): Load multiple 4-element structures to four registers.
structures): Load multiple single-element structures to one, two, three, or four registers.
structures): Store multiple 2-element structures from two registers.
structures): Store multiple 3-element structures from three registers.
structures): Store multiple 4-element structures from four registers.
structures): Store multiple single-element structures from one, two, three, or four registers.
STSET, STSETL: Atomic bit set on word or doubleword in memory, without return: an alias of LDSET, LDSETA, LDSETAL, LDSETL.
STSETB, STSETLB: Atomic bit set on byte in memory, without return: an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
STSETH, STSETLH: Atomic bit set on halfword in memory, without return: an alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
STSETL: Atomic bit set on word or doubleword in memory, without return: an alias of LDSET, LDSETA, LDSETAL, LDSETL.
STSETLB: Atomic bit set on byte in memory, without return: an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
STSETLH: Atomic bit set on halfword in memory, without return: an alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
STSMAX, STSMAXL: Atomic signed maximum on word or doubleword in memory, without return: an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
STSMAXB, STSMAXLB: Atomic signed maximum on byte in memory, without return: an alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
STSMAXH, STSMAXLH: Atomic signed maximum on halfword in memory, without return: an alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
STSMAXL: Atomic signed maximum on word or doubleword in memory, without return: an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
STSMAXLB: Atomic signed maximum on byte in memory, without return: an alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
STSMAXLH: Atomic signed maximum on halfword in memory, without return: an alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
STSMIN, STSMINL: Atomic signed minimum on word or doubleword in memory, without return: an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
STSMINB, STSMINLB: Atomic signed minimum on byte in memory, without return: an alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
STSMINH, STSMINLH: Atomic signed minimum on halfword in memory, without return: an alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
STSMINL: Atomic signed minimum on word or doubleword in memory, without return: an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
STSMINLB: Atomic signed minimum on byte in memory, without return: an alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
STSMINLH: Atomic signed minimum on halfword in memory, without return: an alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
STTR: Store Register (unprivileged).
STTRB: Store Register Byte (unprivileged).
STTRH: Store Register Halfword (unprivileged).
STUMAX, STUMAXL: Atomic unsigned maximum on word or doubleword in memory, without return: an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
STUMAXB, STUMAXLB: Atomic unsigned maximum on byte in memory, without return: an alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
STUMAXH, STUMAXLH: Atomic unsigned maximum on halfword in memory, without return: an alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
STUMAXL: Atomic unsigned maximum on word or doubleword in memory, without return: an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
STUMAXLB: Atomic unsigned maximum on byte in memory, without return: an alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
STUMAXLH: Atomic unsigned maximum on halfword in memory, without return: an alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
STUMIN, STUMINL: Atomic unsigned minimum on word or doubleword in memory, without return: an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
STUMINB, STUMINLB: Atomic unsigned minimum on byte in memory, without return: an alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
STUMINH, STUMINLH: Atomic unsigned minimum on halfword in memory, without return: an alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
STUMINL: Atomic unsigned minimum on word or doubleword in memory, without return: an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
STUMINLB: Atomic unsigned minimum on byte in memory, without return: an alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
STUMINLH: Atomic unsigned minimum on halfword in memory, without return: an alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
STUR (SIMD&FP): Store SIMD&FP register (unscaled offset).
STUR: Store Register (unscaled).
STURB: Store Register Byte (unscaled).
STURH: Store Register Halfword (unscaled).
STXP: Store Exclusive Pair of registers.
STXR: Store Exclusive Register.
STXRB: Store Exclusive Register Byte.
STXRH: Store Exclusive Register Halfword.
SUB (extended register): Subtract (extended register).
SUB (immediate): Subtract (immediate).
NEG (shifted register): Negate (shifted register): an alias of
SUB (shifted register).
SUB (shifted register): Subtract (shifted register).
SUB (vector): Subtract (vector).
SUBHN, SUBHN2: Subtract returning High Narrow.
RETAA, RETAB: Return from
subroutine, with pointer authentication.
RET: Return from
subroutine.
CMP (extended register): Compare (extended register): an alias of
SUBS (extended register).
SUBS (extended register): Subtract (extended register), setting flags.
CMP (immediate): Compare (immediate): an alias of
SUBS (immediate).
SUBS (immediate): Subtract (immediate), setting flags.
CMP (shifted register): Compare (shifted register): an alias of
SUBS (shifted register).
NEGS: Negate, setting flags: an alias of
SUBS (shifted register).
SUBS (shifted register): Subtract (shifted register), setting flags.
Subtract (extended register), setting flags.
Subtract (extended register).
Subtract (immediate), setting flags.
Subtract (immediate).
FMSUB: Floating-point Fused Multiply-
Subtract (scalar).
FNMSUB: Floating-point Negated fused Multiply-
Subtract (scalar).
FSUB (scalar): Floating-point
Subtract (scalar).
Subtract (shifted register), setting flags.
Subtract (shifted register).
FSUB (vector): Floating-point
Subtract (vector).
Subtract (vector).
FMLS (by element): Floating-point fused Multiply-
Subtract from accumulator (by element).
FMLS (vector): Floating-point fused Multiply-
Subtract from accumulator (vector).
MLS (vector): Multiply-
Subtract from accumulator (vector).
MLS (by element): Multiply-
Subtract from accumulator (vector, by element).
SQDMLSL, SQDMLSL2 (by element): Signed saturating Doubling Multiply-
Subtract Long (by element).
SMLSL, SMLSL2 (vector): Signed Multiply-
Subtract Long (vector).
UMLSL, UMLSL2 (vector): Unsigned Multiply-
Subtract Long (vector).
SMLSL, SMLSL2 (by element): Signed Multiply-
Subtract Long (vector, by element).
UMLSL, UMLSL2 (by element): Unsigned Multiply-
Subtract Long (vector, by element).
FMLSL, FMLSL2 (by element): Floating-point fused Multiply-
Subtract Long from accumulator (by element).
FMLSL, FMLSL2 (vector): Floating-point fused Multiply-
Subtract Long from accumulator (vector).
SMSUBL: Signed Multiply-
Subtract Long.
SQDMLSL, SQDMLSL2 (vector): Signed saturating Doubling Multiply-
Subtract Long.
SSUBL, SSUBL2: Signed
Subtract Long.
UMSUBL: Unsigned Multiply-
Subtract Long.
USUBL, USUBL2: Unsigned
Subtract Long.
SQRDMLSH (by element): Signed Saturating Rounding Doubling Multiply
Subtract returning High Half (by element).
SQRDMLSH (vector): Signed Saturating Rounding Doubling Multiply
Subtract returning High Half (vector).
RSUBHN, RSUBHN2: Rounding
Subtract returning High Narrow.
Subtract returning High Narrow.
SSUBW, SSUBW2: Signed
Subtract Wide.
USUBW, USUBW2: Unsigned
Subtract Wide.
SBCS:
Subtract with Carry, setting flags.
SBC:
Subtract with Carry.
MSUB: Multiply-
Subtract.
SHSUB: Signed Halving
Subtract.
SQSUB: Signed saturating
Subtract.
UHSUB: Unsigned Halving
Subtract.
UQSUB: Unsigned saturating
Subtract.
UADDLV: Unsigned
sum Long across Vector.
SVC:
Supervisor Call.
SUQADD: Signed saturating Accumulate of Unsigned value.
SVC: Supervisor Call.
CASB, CASAB, CASALB, CASLB: Compare and
Swap byte in memory.
Swap byte in memory.
CASH, CASAH, CASALH, CASLH: Compare and
Swap halfword in memory.
Swap halfword in memory.
CASP, CASPA, CASPAL, CASPL: Compare and
Swap Pair of words or doublewords in memory.
CAS, CASA, CASAL, CASL: Compare and
Swap word or doubleword in memory.
Swap word or doubleword in memory.
SWP, SWPA, SWPAL, SWPL: Swap word or doubleword in memory.
SWPA, SWPAL, SWPL: Swap word or doubleword in memory.
SWPAB, SWPALB, SWPLB: Swap byte in memory.
SWPAH, SWPALH, SWPLH: Swap halfword in memory.
SWPAL, SWPL: Swap word or doubleword in memory.
SWPALB, SWPLB: Swap byte in memory.
SWPALH, SWPLH: Swap halfword in memory.
SWPB, SWPAB, SWPALB, SWPLB: Swap byte in memory.
SWPH, SWPAH, SWPALH, SWPLH: Swap halfword in memory.
SWPL: Swap word or doubleword in memory.
SWPLB: Swap byte in memory.
SWPLH: Swap halfword in memory.
SXTB: Signed Extend Byte: an alias of SBFM.
SXTH: Sign Extend Halfword: an alias of SBFM.
SXTL, SXTL2: Signed extend Long: an alias of SSHLL, SSHLL2.
SXTW: Sign Extend Word: an alias of SBFM.
DSB: Data
Synchronization Barrier.
ESB: Error
Synchronization Barrier.
ISB: Instruction
Synchronization Barrier.
PSB CSYNC: Profiling
Synchronization Barrier.
AT: Address Translate: an alias of
SYS.
DC: Data Cache operation: an alias of
SYS.
IC: Instruction Cache operation: an alias of
SYS.
TLBI: TLB Invalidate operation: an alias of
SYS.
SYS: System instruction.
SYSL: System instruction with result.
SYSL:
System instruction with result.
SYS:
System instruction.
MRS: Move
System Register.
MSR (register): Move general-purpose register to
System Register.
TBL:
Table vector Lookup.
TBL: Table vector Lookup.
TBNZ: Test bit and Branch if Nonzero.
TBX: Table vector lookup extension.
TBZ: Test bit and Branch if Zero.
LDNP (SIMD&FP): Load Pair of SIMD&FP registers, with Non-
temporal hint.
LDNP: Load Pair of Registers, with non-
temporal hint.
STNP (SIMD&FP): Store Pair of SIMD&FP registers, with Non-
temporal hint.
STNP: Store Pair of Registers, with non-
temporal hint.
Test (shifted register): an alias of ANDS (shifted register).
TBNZ:
Test bit and Branch if Nonzero.
TBZ:
Test bit and Branch if Zero.
Test bits (immediate): an alias of ANDS (immediate).
CMTST: Compare bitwise
Test bits nonzero (vector).
LD3 (single structure): Load single 3-element structure to one lane of
three registers).
LD3 (multiple structures): Load multiple 3-element structures to
three registers.
LD3R: Load single 3-element structure and Replicate to all lanes of
three registers.
ST3 (multiple structures): Store multiple 3-element structures from
three registers.
ST3 (single structure): Store single 3-element structure from one lane of
three registers.
LD1 (multiple structures): Load multiple single-element structures to one, two,
three, or four registers.
ST1 (multiple structures): Store multiple single-element structures from one, two,
three, or four registers.
EOR3:
Three-way Exclusive OR.
FCVTAS (scalar): Floating-point Convert to Signed integer, rounding to nearest with
ties to Away (scalar).
FCVTAU (scalar): Floating-point Convert to Unsigned integer, rounding to nearest with
ties to Away (scalar).
FRINTA (scalar): Floating-point Round to Integral, to nearest with
ties to Away (scalar).
FCVTAS (vector): Floating-point Convert to Signed integer, rounding to nearest with
ties to Away (vector).
FCVTAU (vector): Floating-point Convert to Unsigned integer, rounding to nearest with
ties to Away (vector).
FRINTA (vector): Floating-point Round to Integral, to nearest with
ties to Away (vector).
FCVTNS (scalar): Floating-point Convert to Signed integer, rounding to nearest with
ties to even (scalar).
FCVTNU (scalar): Floating-point Convert to Unsigned integer, rounding to nearest with
ties to even (scalar).
FRINTN (scalar): Floating-point Round to Integral, to nearest with
ties to even (scalar).
FCVTNS (vector): Floating-point Convert to Signed integer, rounding to nearest with
ties to even (vector).
FCVTNU (vector): Floating-point Convert to Unsigned integer, rounding to nearest with
ties to even (vector).
FRINTN (vector): Floating-point Round to Integral, to nearest with
ties to even (vector).
TLBI:
TLB Invalidate operation: an alias of SYS.
TLBI: TLB Invalidate operation: an alias of SYS.
FCVTMS (scalar): Floating-point Convert to Signed integer, rounding
toward Minus infinity (scalar).
FCVTMU (scalar): Floating-point Convert to Unsigned integer, rounding
toward Minus infinity (scalar).
FRINTM (scalar): Floating-point Round to Integral,
toward Minus infinity (scalar).
FCVTMS (vector): Floating-point Convert to Signed integer, rounding
toward Minus infinity (vector).
FCVTMU (vector): Floating-point Convert to Unsigned integer, rounding
toward Minus infinity (vector).
FRINTM (vector): Floating-point Round to Integral,
toward Minus infinity (vector).
FCVTPS (scalar): Floating-point Convert to Signed integer, rounding
toward Plus infinity (scalar).
FCVTPU (scalar): Floating-point Convert to Unsigned integer, rounding
toward Plus infinity (scalar).
FRINTP (scalar): Floating-point Round to Integral,
toward Plus infinity (scalar).
FCVTPS (vector): Floating-point Convert to Signed integer, rounding
toward Plus infinity (vector).
FCVTPU (vector): Floating-point Convert to Unsigned integer, rounding
toward Plus infinity (vector).
FRINTP (vector): Floating-point Round to Integral,
toward Plus infinity (vector).
FCVTZS (scalar, fixed-point): Floating-point Convert to Signed fixed-point, rounding
toward Zero (scalar).
FCVTZS (scalar, integer): Floating-point Convert to Signed integer, rounding
toward Zero (scalar).
FCVTZU (scalar, fixed-point): Floating-point Convert to Unsigned fixed-point, rounding
toward Zero (scalar).
FCVTZU (scalar, integer): Floating-point Convert to Unsigned integer, rounding
toward Zero (scalar).
FRINTZ (scalar): Floating-point Round to Integral,
toward Zero (scalar).
FCVTZS (vector, fixed-point): Floating-point Convert to Signed fixed-point, rounding
toward Zero (vector).
FCVTZS (vector, integer): Floating-point Convert to Signed integer, rounding
toward Zero (vector).
FCVTZU (vector, fixed-point): Floating-point Convert to Unsigned fixed-point, rounding
toward Zero (vector).
FCVTZU (vector, integer): Floating-point Convert to Unsigned integer, rounding
toward Zero (vector).
FRINTZ (vector): Floating-point Round to Integral,
toward Zero (vector).
FJCVTZS: Floating-point Javascript Convert to Signed fixed-point, rounding
toward Zero.
AT: Address
Translate: an alias of SYS.
TRN1:
Transpose vectors (primary).
TRN2:
Transpose vectors (secondary).
TRN1: Transpose vectors (primary).
TRN2: Transpose vectors (secondary).
BIT: Bitwise Insert if
True.
TST (immediate): Test bits (immediate): an alias of ANDS (immediate).
TST (shifted register): Test (shifted register): an alias of ANDS (shifted register).
LD2 (multiple structures): Load multiple 2-element structures to
two registers.
LD2 (single structure): Load single 2-element structure to one lane of
two registers.
LD2R: Load single 2-element structure and Replicate to all lanes of
two registers.
ST2 (multiple structures): Store multiple 2-element structures from
two registers.
ST2 (single structure): Store single 2-element structure from one lane of
two registers.
LD1 (multiple structures): Load multiple single-element structures to one,
two, three, or four registers.
ST1 (multiple structures): Store multiple single-element structures from one,
two, three, or four registers.
UABAL, UABAL2: Unsigned Absolute difference and Accumulate Long.
UABD: Unsigned Absolute Difference (vector).
UABDL, UABDL2: Unsigned Absolute Difference Long.
UADALP: Unsigned Add and Accumulate Long Pairwise.
UADDL, UADDL2: Unsigned Add Long (vector).
UADDLP: Unsigned Add Long Pairwise.
UADDLV: Unsigned sum Long across Vector.
UADDW, UADDW2: Unsigned Add Wide.
UBFIZ: Unsigned Bitfield Insert in Zero: an alias of UBFM.
LSL (immediate): Logical Shift Left (immediate): an alias of
UBFM.
LSR (immediate): Logical Shift Right (immediate): an alias of
UBFM.
UBFIZ: Unsigned Bitfield Insert in Zero: an alias of
UBFM.
UBFX: Unsigned Bitfield Extract: an alias of
UBFM.
UXTB: Unsigned Extend Byte: an alias of
UBFM.
UXTH: Unsigned Extend Halfword: an alias of
UBFM.
UBFM: Unsigned Bitfield Move.
UBFX: Unsigned Bitfield Extract: an alias of UBFM.
UCVTF (scalar, fixed-point): Unsigned fixed-point Convert to Floating-point (scalar).
UCVTF (scalar, integer): Unsigned integer Convert to Floating-point (scalar).
UCVTF (vector, fixed-point): Unsigned fixed-point Convert to Floating-point (vector).
UCVTF (vector, integer): Unsigned integer Convert to Floating-point (vector).
UDIV: Unsigned Divide.
UDOT (by element): Dot Product unsigned arithmetic (vector, by element).
UDOT (vector): Dot Product unsigned arithmetic (vector).
UHADD: Unsigned Halving Add.
UHSUB: Unsigned Halving Subtract.
UMULL: Unsigned Multiply Long: an alias of
UMADDL.
UMADDL: Unsigned Multiply-Add Long.
UMAX: Unsigned Maximum (vector).
UMAXP: Unsigned Maximum Pairwise.
UMAXV: Unsigned Maximum across Vector.
UMIN: Unsigned Minimum (vector).
UMINP: Unsigned Minimum Pairwise.
UMINV: Unsigned Minimum across Vector.
UMLAL, UMLAL2 (by element): Unsigned Multiply-Add Long (vector, by element).
UMLAL, UMLAL2 (vector): Unsigned Multiply-Add Long (vector).
UMLAL2 (by element): Unsigned Multiply-Add Long (vector, by element).
UMLAL2 (vector): Unsigned Multiply-Add Long (vector).
UMLSL, UMLSL2 (by element): Unsigned Multiply-Subtract Long (vector, by element).
UMLSL, UMLSL2 (vector): Unsigned Multiply-Subtract Long (vector).
UMLSL2 (by element): Unsigned Multiply-Subtract Long (vector, by element).
UMLSL2 (vector): Unsigned Multiply-Subtract Long (vector).
UMNEGL: Unsigned Multiply-Negate Long: an alias of UMSUBL.
MOV (to general): Move vector element to general-purpose register: an alias of
UMOV.
UMOV: Unsigned Move vector element to general-purpose register.
UMNEGL: Unsigned Multiply-Negate Long: an alias of
UMSUBL.
UMSUBL: Unsigned Multiply-Subtract Long.
UMULH: Unsigned Multiply High.
UMULL, UMULL2 (by element): Unsigned Multiply Long (vector, by element).
UMULL, UMULL2 (vector): Unsigned Multiply long (vector).
UMULL2 (by element): Unsigned Multiply Long (vector, by element).
UMULL2 (vector): Unsigned Multiply long (vector).
UMULL: Unsigned Multiply Long: an alias of UMADDL.
BFC: Bitfield Clear, leaving other bits
unchanged: an alias of BFM.
LDTR: Load Register (
unprivileged).
LDTRB: Load Register Byte (
unprivileged).
LDTRH: Load Register Halfword (
unprivileged).
LDTRSB: Load Register Signed Byte (
unprivileged).
LDTRSH: Load Register Signed Halfword (
unprivileged).
LDTRSW: Load Register Signed Word (
unprivileged).
STTR: Store Register (
unprivileged).
STTRB: Store Register Byte (
unprivileged).
STTRH: Store Register Halfword (
unprivileged).
LDUR (SIMD&FP): Load SIMD&FP Register (
unscaled offset).
PRFM (unscaled offset): Prefetch Memory (
unscaled offset).
STUR (SIMD&FP): Store SIMD&FP register (
unscaled offset).
unscaled offset): Prefetch Memory (unscaled offset).
LDUR: Load Register (
unscaled).
LDURB: Load Register Byte (
unscaled).
LDURH: Load Register Halfword (
unscaled).
LDURSB: Load Register Signed Byte (
unscaled).
LDURSH: Load Register Signed Halfword (
unscaled).
LDURSW: Load Register Signed Word (
unscaled).
STUR: Store Register (
unscaled).
STURB: Store Register Byte (
unscaled).
STURH: Store Register Halfword (
unscaled).
SQSHLU: Signed saturating Shift Left
Unsigned (immediate).
UABD:
Unsigned Absolute Difference (vector).
Unsigned Absolute difference and Accumulate Long.
UABA:
Unsigned Absolute difference and Accumulate.
Unsigned Absolute Difference Long.
Unsigned Add and Accumulate Long Pairwise.
Unsigned Add Long (vector).
Unsigned Add Long Pairwise.
Unsigned Add Wide.
UDOT (vector): Dot Product
unsigned arithmetic (vector).
UDOT (by element): Dot Product
unsigned arithmetic (vector, by element).
UBFX:
Unsigned Bitfield Extract: an alias of UBFM.
Unsigned Bitfield Insert in Zero: an alias of UBFM.
UBFM:
Unsigned Bitfield Move.
UDIV:
Unsigned Divide.
UXTB:
Unsigned Extend Byte: an alias of UBFM.
UXTH:
Unsigned Extend Halfword: an alias of UBFM.
Unsigned extend Long: an alias of USHLL, USHLL2.
Unsigned fixed-point Convert to Floating-point (scalar).
Unsigned fixed-point Convert to Floating-point (vector).
FCVTZU (scalar, fixed-point): Floating-point Convert to
Unsigned fixed-point, rounding toward Zero (scalar).
FCVTZU (vector, fixed-point): Floating-point Convert to
Unsigned fixed-point, rounding toward Zero (vector).
Unsigned Halving Add.
Unsigned Halving Subtract.
CMHI (register): Compare
unsigned Higher (vector).
CMHS (register): Compare
unsigned Higher or Same (vector).
Unsigned integer Convert to Floating-point (scalar).
Unsigned integer Convert to Floating-point (vector).
FCVTAU (scalar): Floating-point Convert to
Unsigned integer, rounding to nearest with ties to Away (scalar).
FCVTAU (vector): Floating-point Convert to
Unsigned integer, rounding to nearest with ties to Away (vector).
FCVTNU (scalar): Floating-point Convert to
Unsigned integer, rounding to nearest with ties to even (scalar).
FCVTNU (vector): Floating-point Convert to
Unsigned integer, rounding to nearest with ties to even (vector).
FCVTMU (scalar): Floating-point Convert to
Unsigned integer, rounding toward Minus infinity (scalar).
FCVTMU (vector): Floating-point Convert to
Unsigned integer, rounding toward Minus infinity (vector).
FCVTPU (scalar): Floating-point Convert to
Unsigned integer, rounding toward Plus infinity (scalar).
FCVTPU (vector): Floating-point Convert to
Unsigned integer, rounding toward Plus infinity (vector).
FCVTZU (scalar, integer): Floating-point Convert to
Unsigned integer, rounding toward Zero (scalar).
FCVTZU (vector, integer): Floating-point Convert to
Unsigned integer, rounding toward Zero (vector).
UMAX:
Unsigned Maximum (vector).
Unsigned Maximum across Vector.
STUMAXB, STUMAXLB: Atomic
unsigned maximum on byte in memory, without return: an alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
unsigned maximum on byte in memory.
STUMAXH, STUMAXLH: Atomic
unsigned maximum on halfword in memory, without return: an alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
unsigned maximum on halfword in memory.
STUMAX, STUMAXL: Atomic
unsigned maximum on word or doubleword in memory, without return: an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
unsigned maximum on word or doubleword in memory.
Unsigned Maximum Pairwise.
UMIN:
Unsigned Minimum (vector).
Unsigned Minimum across Vector.
STUMINB, STUMINLB: Atomic
unsigned minimum on byte in memory, without return: an alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
unsigned minimum on byte in memory.
STUMINH, STUMINLH: Atomic
unsigned minimum on halfword in memory, without return: an alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
unsigned minimum on halfword in memory.
STUMIN, STUMINL: Atomic
unsigned minimum on word or doubleword in memory, without return: an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
unsigned minimum on word or doubleword in memory.
Unsigned Minimum Pairwise.
UMOV:
Unsigned Move vector element to general-purpose register.
Unsigned Multiply High.
Unsigned Multiply long (vector).
Unsigned Multiply Long (vector, by element).
Unsigned Multiply Long: an alias of UMADDL.
Unsigned Multiply-Add Long (vector).
Unsigned Multiply-Add Long (vector, by element).
Unsigned Multiply-Add Long.
Unsigned Multiply-Negate Long: an alias of UMSUBL.
Unsigned Multiply-Subtract Long (vector).
Unsigned Multiply-Subtract Long (vector, by element).
Unsigned Multiply-Subtract Long.
SQRSHRUN, SQRSHRUN2: Signed saturating Rounded Shift Right
Unsigned Narrow (immediate).
SQSHRUN, SQSHRUN2: Signed saturating Shift Right
Unsigned Narrow (immediate).
SQXTUN, SQXTUN2: Signed saturating extract
Unsigned Narrow.
Unsigned Reciprocal Estimate.
Unsigned Reciprocal Square Root Estimate.
Unsigned Rounding Halving Add.
Unsigned Rounding Shift Left (register).
Unsigned Rounding Shift Right (immediate).
Unsigned Rounding Shift Right and Accumulate (immediate).
Unsigned saturating Accumulate of Signed value.
Unsigned saturating Add.
Unsigned saturating extract Narrow.
Unsigned saturating Rounded Shift Right Narrow (immediate).
Unsigned saturating Rounding Shift Left (register).
Unsigned saturating Shift Left (immediate).
Unsigned saturating Shift Left (register).
Unsigned saturating Shift Right Narrow (immediate).
Unsigned saturating Subtract.
USHL:
Unsigned Shift Left (register).
Unsigned Shift Left Long (immediate).
USHR:
Unsigned Shift Right (immediate).
USRA:
Unsigned Shift Right and Accumulate (immediate).
Unsigned Subtract Long.
Unsigned Subtract Wide.
Unsigned sum Long across Vector.
SUQADD: Signed saturating Accumulate of
Unsigned value.
UZP1:
Unzip vectors (primary).
UZP2:
Unzip vectors (secondary).
SHA1C: SHA1 hash
update (choose).
SHA1M: SHA1 hash
update (majority).
SHA1P: SHA1 hash
update (parity).
SHA256H: SHA256 hash
update (part 1).
SHA256H2: SHA256 hash
update (part 2).
SHA1SU0: SHA1 schedule
update 0.
SHA256SU0: SHA256 schedule
update 0.
SHA512SU0: SHA512 Schedule
Update 0.
SHA1SU1: SHA1 schedule
update 1.
SHA256SU1: SHA256 schedule
update 1.
SHA512SU1: SHA512 Schedule
Update 1.
SHA512H: SHA512 Hash
update part 1.
SHA512H2: SHA512 Hash
update part 2.
UQADD: Unsigned saturating Add.
UQRSHL: Unsigned saturating Rounding Shift Left (register).
UQRSHRN, UQRSHRN2: Unsigned saturating Rounded Shift Right Narrow (immediate).
UQSHL (immediate): Unsigned saturating Shift Left (immediate).
UQSHL (register): Unsigned saturating Shift Left (register).
UQSHRN, UQSHRN2: Unsigned saturating Shift Right Narrow (immediate).
UQSUB: Unsigned saturating Subtract.
UQXTN, UQXTN2: Unsigned saturating extract Narrow.
URECPE: Unsigned Reciprocal Estimate.
URHADD: Unsigned Rounding Halving Add.
URSHL: Unsigned Rounding Shift Left (register).
URSHR: Unsigned Rounding Shift Right (immediate).
URSQRTE: Unsigned Reciprocal Square Root Estimate.
URSRA: Unsigned Rounding Shift Right and Accumulate (immediate).
USHL: Unsigned Shift Left (register).
UXTL, UXTL2: Unsigned extend Long: an alias of
USHLL, USHLL2.
USHLL, USHLL2: Unsigned Shift Left Long (immediate).
UXTL, UXTL2: Unsigned extend Long: an alias of USHLL,
USHLL2.
USHR: Unsigned Shift Right (immediate).
FRINTI (scalar): Floating-point Round to Integral,
using current rounding mode (scalar).
FRINTX (scalar): Floating-point Round to Integral exact,
using current rounding mode (scalar).
FRINTI (vector): Floating-point Round to Integral,
using current rounding mode (vector).
FRINTX (vector): Floating-point Round to Integral exact,
using current rounding mode (vector).
PACGA: Pointer Authentication Code,
using Generic key.
AUTDA, AUTDZA: Authenticate Data address,
using key A.
AUTIA, AUTIA1716, AUTIASP, AUTIAZ, AUTIZA: Authenticate Instruction address,
using key A.
PACDA, PACDZA: Pointer Authentication Code for Data address,
using key A.
PACIA, PACIA1716, PACIASP, PACIAZ, PACIZA: Pointer Authentication Code for Instruction address,
using key A.
AUTDB, AUTDZB: Authenticate Data address,
using key B.
AUTIB, AUTIB1716, AUTIBSP, AUTIBZ, AUTIZB: Authenticate Instruction address,
using key B.
PACDB, PACDZB: Pointer Authentication Code for Data address,
using key B.
PACIB, PACIB1716, PACIBSP, PACIBZ, PACIZB: Pointer Authentication Code for Instruction address,
using key B.
USQADD: Unsigned saturating Accumulate of Signed value.
USRA: Unsigned Shift Right and Accumulate (immediate).
USUBL, USUBL2: Unsigned Subtract Long.
USUBW, USUBW2: Unsigned Subtract Wide.
UXTB: Unsigned Extend Byte: an alias of UBFM.
UXTH: Unsigned Extend Halfword: an alias of UBFM.
UXTL, UXTL2: Unsigned extend Long: an alias of USHLL, USHLL2.
UZP1: Unzip vectors (primary).
UZP2: Unzip vectors (secondary).
LSLV: Logical Shift Left
Variable.
LSRV: Logical Shift Right
Variable.
RORV: Rotate Right
Variable.
INS (element): Insert
vector element from another vector element.
INS (general): Insert
vector element from general-purpose register.
MOV (element): Move
vector element to another vector element: an alias of INS (element).
SMOV: Signed Move
vector element to general-purpose register.
UMOV: Unsigned Move
vector element to general-purpose register.
MOV (to general): Move
vector element to general-purpose register: an alias of UMOV.
MOV (scalar): Move
vector element to scalar: an alias of DUP (element).
DUP (element): Duplicate
vector element to vector or scalar.
INS (element): Insert vector element from another
vector element.
MOV (element): Move vector element to another
vector element: an alias of INS (element).
MOV (from general): Move general-purpose register to a
vector element: an alias of INS (general).
EXT: Extract
vector from pair of vectors.
TBX: Table
vector lookup extension.
TBL: Table
vector Lookup.
DUP (element): Duplicate vector element to
vector or scalar.
ABS: Absolute value (
vector).
ADD (vector): Add (
vector).
ADDP (vector): Add Pairwise (
vector).
AND (vector): Bitwise AND (
vector).
CLS (vector): Count Leading Sign bits (
vector).
CLZ (vector): Count Leading Zero bits (
vector).
CMEQ (register): Compare bitwise Equal (
vector).
CMEQ (zero): Compare bitwise Equal to zero (
vector).
CMGE (register): Compare signed Greater than or Equal (
vector).
CMGE (zero): Compare signed Greater than or Equal to zero (
vector).
CMGT (register): Compare signed Greater than (
vector).
CMGT (zero): Compare signed Greater than zero (
vector).
CMHI (register): Compare unsigned Higher (
vector).
CMHS (register): Compare unsigned Higher or Same (
vector).
CMLE (zero): Compare signed Less than or Equal to zero (
vector).
CMLT (zero): Compare signed Less than zero (
vector).
CMTST: Compare bitwise Test bits nonzero (
vector).
EOR (vector): Bitwise Exclusive OR (
vector).
FABD: Floating-point Absolute Difference (
vector).
FABS (vector): Floating-point Absolute value (
vector).
FACGE: Floating-point Absolute Compare Greater than or Equal (
vector).
FACGT: Floating-point Absolute Compare Greater than (
vector).
FADD (vector): Floating-point Add (
vector).
FADDP (vector): Floating-point Add Pairwise (
vector).
FCMEQ (register): Floating-point Compare Equal (
vector).
FCMEQ (zero): Floating-point Compare Equal to zero (
vector).
FCMGE (register): Floating-point Compare Greater than or Equal (
vector).
FCMGE (zero): Floating-point Compare Greater than or Equal to zero (
vector).
FCMGT (register): Floating-point Compare Greater than (
vector).
FCMGT (zero): Floating-point Compare Greater than zero (
vector).
FCMLE (zero): Floating-point Compare Less than or Equal to zero (
vector).
FCMLT (zero): Floating-point Compare Less than zero (
vector).
FCVTAS (vector): Floating-point Convert to Signed integer, rounding to nearest with ties to Away (
vector).
FCVTAU (vector): Floating-point Convert to Unsigned integer, rounding to nearest with ties to Away (
vector).
FCVTL, FCVTL2: Floating-point Convert to higher precision Long (
vector).
FCVTMS (vector): Floating-point Convert to Signed integer, rounding toward Minus infinity (
vector).
FCVTMU (vector): Floating-point Convert to Unsigned integer, rounding toward Minus infinity (
vector).
FCVTN, FCVTN2: Floating-point Convert to lower precision Narrow (
vector).
FCVTNS (vector): Floating-point Convert to Signed integer, rounding to nearest with ties to even (
vector).
FCVTNU (vector): Floating-point Convert to Unsigned integer, rounding to nearest with ties to even (
vector).
FCVTPS (vector): Floating-point Convert to Signed integer, rounding toward Plus infinity (
vector).
FCVTPU (vector): Floating-point Convert to Unsigned integer, rounding toward Plus infinity (
vector).
FCVTXN, FCVTXN2: Floating-point Convert to lower precision Narrow, rounding to odd (
vector).
FCVTZS (vector, fixed-point): Floating-point Convert to Signed fixed-point, rounding toward Zero (
vector).
FCVTZS (vector, integer): Floating-point Convert to Signed integer, rounding toward Zero (
vector).
FCVTZU (vector, fixed-point): Floating-point Convert to Unsigned fixed-point, rounding toward Zero (
vector).
FCVTZU (vector, integer): Floating-point Convert to Unsigned integer, rounding toward Zero (
vector).
FDIV (vector): Floating-point Divide (
vector).
FMAX (vector): Floating-point Maximum (
vector).
FMAXNM (vector): Floating-point Maximum Number (
vector).
FMAXNMP (vector): Floating-point Maximum Number Pairwise (
vector).
FMAXP (vector): Floating-point Maximum Pairwise (
vector).
FMIN (vector): Floating-point minimum (
vector).
FMINNM (vector): Floating-point Minimum Number (
vector).
FMINNMP (vector): Floating-point Minimum Number Pairwise (
vector).
FMINP (vector): Floating-point Minimum Pairwise (
vector).
FMLA (vector): Floating-point fused Multiply-Add to accumulator (
vector).
FMLAL, FMLAL2 (vector): Floating-point fused Multiply-Add Long to accumulator (
vector).
FMLS (vector): Floating-point fused Multiply-Subtract from accumulator (
vector).
FMLSL, FMLSL2 (vector): Floating-point fused Multiply-Subtract Long from accumulator (
vector).
FMOV (vector, immediate): Floating-point move immediate (
vector).
FMUL (vector): Floating-point Multiply (
vector).
FNEG (vector): Floating-point Negate (
vector).
FRINTA (vector): Floating-point Round to Integral, to nearest with ties to Away (
vector).
FRINTI (vector): Floating-point Round to Integral, using current rounding mode (
vector).
FRINTM (vector): Floating-point Round to Integral, toward Minus infinity (
vector).
FRINTN (vector): Floating-point Round to Integral, to nearest with ties to even (
vector).
FRINTP (vector): Floating-point Round to Integral, toward Plus infinity (
vector).
FRINTX (vector): Floating-point Round to Integral exact, using current rounding mode (
vector).
FRINTZ (vector): Floating-point Round to Integral, toward Zero (
vector).
FSQRT (vector): Floating-point Square Root (
vector).
FSUB (vector): Floating-point Subtract (
vector).
MLA (vector): Multiply-Add to accumulator (
vector).
MLS (vector): Multiply-Subtract from accumulator (
vector).
MOVI: Move Immediate (
vector).
MUL (vector): Multiply (
vector).
MVNI: Move inverted Immediate (
vector).
NEG (vector): Negate (
vector).
NOT: Bitwise NOT (
vector).
ORN (vector): Bitwise inclusive OR NOT (
vector).
RBIT (vector): Reverse Bit order (
vector).
REV16 (vector): Reverse elements in 16-bit halfwords (
vector).
REV32 (vector): Reverse elements in 32-bit words (
vector).
REV64: Reverse elements in 64-bit doublewords (
vector).
SADDL, SADDL2: Signed Add Long (
vector).
SCVTF (vector, fixed-point): Signed fixed-point Convert to Floating-point (
vector).
SCVTF (vector, integer): Signed integer Convert to Floating-point (
vector).
SDOT (vector): Dot Product signed arithmetic (
vector).
SMAX: Signed Maximum (
vector).
SMIN: Signed Minimum (
vector).
SMLAL, SMLAL2 (vector): Signed Multiply-Add Long (
vector).
SMLSL, SMLSL2 (vector): Signed Multiply-Subtract Long (
vector).
SMULL, SMULL2 (vector): Signed Multiply Long (
vector).
SQRDMLAH (vector): Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (
vector).
SQRDMLSH (vector): Signed Saturating Rounding Doubling Multiply Subtract returning High Half (
vector).
SUB (vector): Subtract (
vector).
UABD: Unsigned Absolute Difference (
vector).
UADDL, UADDL2: Unsigned Add Long (
vector).
UCVTF (vector, fixed-point): Unsigned fixed-point Convert to Floating-point (
vector).
UCVTF (vector, integer): Unsigned integer Convert to Floating-point (
vector).
UDOT (vector): Dot Product unsigned arithmetic (
vector).
UMAX: Unsigned Maximum (
vector).
UMIN: Unsigned Minimum (
vector).
UMLAL, UMLAL2 (vector): Unsigned Multiply-Add Long (
vector).
UMLSL, UMLSL2 (vector): Unsigned Multiply-Subtract Long (
vector).
UMULL, UMULL2 (vector): Unsigned Multiply long (
vector).
MVN: Bitwise NOT (
vector): an alias of NOT.
vector): Floating-point Convert to Signed integer, rounding to nearest with ties to Away (vector).
vector): Floating-point Convert to Signed integer, rounding to nearest with ties to even (vector).
vector): Floating-point Convert to Unsigned integer, rounding to nearest with ties to Away (vector).
vector): Floating-point Convert to Unsigned integer, rounding to nearest with ties to even (vector).
vector): Floating-point Convert to Unsigned integer, rounding toward Minus infinity (vector).
vector): Floating-point Convert to Unsigned integer, rounding toward Plus infinity (vector).
vector): Floating-point fused Multiply-Add Long to accumulator (vector).
vector): Floating-point fused Multiply-Subtract Long from accumulator (vector).
vector): Signed Multiply Long (vector).
vector): Signed Multiply-Add Long (vector).
vector): Signed Multiply-Subtract Long (vector).
vector): Signed saturating Doubling Multiply Long.
vector): Signed saturating Doubling Multiply-Add Long.
vector): Signed saturating Doubling Multiply-Subtract Long.
vector): Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (vector).
vector): Signed saturating Rounding Doubling Multiply returning High half.
vector): Signed Saturating Rounding Doubling Multiply Subtract returning High Half (vector).
vector): Unsigned Multiply long (vector).
vector): Unsigned Multiply-Add Long (vector).
vector): Unsigned Multiply-Subtract Long (vector).
MLA (by element): Multiply-Add to accumulator (
vector, by element).
MLS (by element): Multiply-Subtract from accumulator (
vector, by element).
MUL (by element): Multiply (
vector, by element).
SDOT (by element): Dot Product signed arithmetic (
vector, by element).
SMLAL, SMLAL2 (by element): Signed Multiply-Add Long (
vector, by element).
SMLSL, SMLSL2 (by element): Signed Multiply-Subtract Long (
vector, by element).
SMULL, SMULL2 (by element): Signed Multiply Long (
vector, by element).
UDOT (by element): Dot Product unsigned arithmetic (
vector, by element).
UMLAL, UMLAL2 (by element): Unsigned Multiply-Add Long (
vector, by element).
UMLSL, UMLSL2 (by element): Unsigned Multiply-Subtract Long (
vector, by element).
UMULL, UMULL2 (by element): Unsigned Multiply Long (
vector, by element).
vector, fixed-point): Floating-point Convert to Signed fixed-point, rounding toward Zero (vector).
vector, fixed-point): Floating-point Convert to Unsigned fixed-point, rounding toward Zero (vector).
vector, fixed-point): Signed fixed-point Convert to Floating-point (vector).
vector, fixed-point): Unsigned fixed-point Convert to Floating-point (vector).
BIC (vector, immediate): Bitwise bit Clear (
vector, immediate).
ORR (vector, immediate): Bitwise inclusive OR (
vector, immediate).
vector, immediate): Bitwise bit Clear (vector, immediate).
vector, immediate): Bitwise inclusive OR (vector, immediate).
vector, immediate): Floating-point move immediate (vector).
vector, integer): Floating-point Convert to Signed integer, rounding toward Zero (vector).
vector, integer): Floating-point Convert to Unsigned integer, rounding toward Zero (vector).
vector, integer): Signed integer Convert to Floating-point (vector).
vector, integer): Unsigned integer Convert to Floating-point (vector).
BIC (vector, register): Bitwise bit Clear (
vector, register).
MOV (vector): Move vector: an alias of ORR (
vector, register).
ORR (vector, register): Bitwise inclusive OR (
vector, register).
vector, register): Bitwise bit Clear (vector, register).
vector, register): Bitwise inclusive OR (vector, register).
ADDV: Add across
Vector.
DUP (general): Duplicate general-purpose register to
vector.
FMAXNMV: Floating-point Maximum Number across
Vector.
FMAXV: Floating-point Maximum across
Vector.
FMINNMV: Floating-point Minimum Number across
Vector.
FMINV: Floating-point Minimum across
Vector.
SADDLV: Signed Add Long across
Vector.
SMAXV: Signed Maximum across
Vector.
SMINV: Signed Minimum across
Vector.
UADDLV: Unsigned sum Long across
Vector.
UMAXV: Unsigned Maximum across
Vector.
UMINV: Unsigned Minimum across
Vector.
MOV (vector): Move
vector: an alias of ORR (vector, register).
TRN1: Transpose
vectors (primary).
UZP1: Unzip
vectors (primary).
ZIP1: Zip
vectors (primary).
TRN2: Transpose
vectors (secondary).
UZP2: Unzip
vectors (secondary).
ZIP2: Zip
vectors (secondary).
EXT: Extract vector from pair of
vectors.
WFI:
Wait For Interrupt.
EOR3: Three-
way Exclusive OR.
WFE: Wait For Event.
WFI: Wait For Interrupt.
MOV (inverted wide immediate): Move (inverted
wide immediate): an alias of MOVN.
MOV (wide immediate): Move (
wide immediate): an alias of MOVZ.
wide immediate): Move (inverted wide immediate): an alias of MOVN.
wide immediate): Move (wide immediate): an alias of MOVZ.
MOVK: Move
wide with keep.
MOVN: Move
wide with NOT.
MOVZ: Move
wide with zero.
SADDW, SADDW2: Signed Add
Wide.
SSUBW, SSUBW2: Signed Subtract
Wide.
UADDW, UADDW2: Unsigned Add
Wide.
USUBW, USUBW2: Unsigned Subtract
Wide.
FMOV (general): Floating-point Move to or from general-purpose register
without conversion.
FMOV (register): Floating-point Move register
without conversion.
STADD, STADDL: Atomic add on word or doubleword in memory,
without return: an alias of LDADD, LDADDA, LDADDAL, LDADDL.
STADDB, STADDLB: Atomic add on byte in memory,
without return: an alias of LDADDB, LDADDAB, LDADDALB, LDADDLB.
STADDH, STADDLH: Atomic add on halfword in memory,
without return: an alias of LDADDH, LDADDAH, LDADDALH, LDADDLH.
STCLR, STCLRL: Atomic bit clear on word or doubleword in memory,
without return: an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
STCLRB, STCLRLB: Atomic bit clear on byte in memory,
without return: an alias of LDCLRB, LDCLRAB, LDCLRALB, LDCLRLB.
STCLRH, STCLRLH: Atomic bit clear on halfword in memory,
without return: an alias of LDCLRH, LDCLRAH, LDCLRALH, LDCLRLH.
STEOR, STEORL: Atomic exclusive OR on word or doubleword in memory,
without return: an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
STEORB, STEORLB: Atomic exclusive OR on byte in memory,
without return: an alias of LDEORB, LDEORAB, LDEORALB, LDEORLB.
STEORH, STEORLH: Atomic exclusive OR on halfword in memory,
without return: an alias of LDEORH, LDEORAH, LDEORALH, LDEORLH.
STSET, STSETL: Atomic bit set on word or doubleword in memory,
without return: an alias of LDSET, LDSETA, LDSETAL, LDSETL.
STSETB, STSETLB: Atomic bit set on byte in memory,
without return: an alias of LDSETB, LDSETAB, LDSETALB, LDSETLB.
STSETH, STSETLH: Atomic bit set on halfword in memory,
without return: an alias of LDSETH, LDSETAH, LDSETALH, LDSETLH.
STSMAX, STSMAXL: Atomic signed maximum on word or doubleword in memory,
without return: an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
STSMAXB, STSMAXLB: Atomic signed maximum on byte in memory,
without return: an alias of LDSMAXB, LDSMAXAB, LDSMAXALB, LDSMAXLB.
STSMAXH, STSMAXLH: Atomic signed maximum on halfword in memory,
without return: an alias of LDSMAXH, LDSMAXAH, LDSMAXALH, LDSMAXLH.
STSMIN, STSMINL: Atomic signed minimum on word or doubleword in memory,
without return: an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
STSMINB, STSMINLB: Atomic signed minimum on byte in memory,
without return: an alias of LDSMINB, LDSMINAB, LDSMINALB, LDSMINLB.
STSMINH, STSMINLH: Atomic signed minimum on halfword in memory,
without return: an alias of LDSMINH, LDSMINAH, LDSMINALH, LDSMINLH.
STUMAX, STUMAXL: Atomic unsigned maximum on word or doubleword in memory,
without return: an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
STUMAXB, STUMAXLB: Atomic unsigned maximum on byte in memory,
without return: an alias of LDUMAXB, LDUMAXAB, LDUMAXALB, LDUMAXLB.
STUMAXH, STUMAXLH: Atomic unsigned maximum on halfword in memory,
without return: an alias of LDUMAXH, LDUMAXAH, LDUMAXALH, LDUMAXLH.
STUMIN, STUMINL: Atomic unsigned minimum on word or doubleword in memory,
without return: an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
STUMINB, STUMINLB: Atomic unsigned minimum on byte in memory,
without return: an alias of LDUMINB, LDUMINAB, LDUMINALB, LDUMINLB.
STUMINH, STUMINLH: Atomic unsigned minimum on halfword in memory,
without return: an alias of LDUMINH, LDUMINAH, LDUMINALH, LDUMINLH.
LDRSW (immediate): Load Register Signed
Word (immediate).
LDRSW (literal): Load Register Signed
Word (literal).
LDRSW (register): Load Register Signed
Word (register).
LDTRSW: Load Register Signed
Word (unprivileged).
LDURSW: Load Register Signed
Word (unscaled).
STADD, STADDL: Atomic add on
word or doubleword in memory, without return: an alias of LDADD, LDADDA, LDADDAL, LDADDL.
STCLR, STCLRL: Atomic bit clear on
word or doubleword in memory, without return: an alias of LDCLR, LDCLRA, LDCLRAL, LDCLRL.
STEOR, STEORL: Atomic exclusive OR on
word or doubleword in memory, without return: an alias of LDEOR, LDEORA, LDEORAL, LDEORL.
STSET, STSETL: Atomic bit set on
word or doubleword in memory, without return: an alias of LDSET, LDSETA, LDSETAL, LDSETL.
STSMAX, STSMAXL: Atomic signed maximum on
word or doubleword in memory, without return: an alias of LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL.
STSMIN, STSMINL: Atomic signed minimum on
word or doubleword in memory, without return: an alias of LDSMIN, LDSMINA, LDSMINAL, LDSMINL.
STUMAX, STUMAXL: Atomic unsigned maximum on
word or doubleword in memory, without return: an alias of LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL.
STUMIN, STUMINL: Atomic unsigned minimum on
word or doubleword in memory, without return: an alias of LDUMIN, LDUMINA, LDUMINAL, LDUMINL.
CAS, CASA, CASAL, CASL: Compare and Swap
word or doubleword in memory.
LDADD, LDADDA, LDADDAL, LDADDL: Atomic add on
word or doubleword in memory.
LDCLR, LDCLRA, LDCLRAL, LDCLRL: Atomic bit clear on
word or doubleword in memory.
LDEOR, LDEORA, LDEORAL, LDEORL: Atomic exclusive OR on
word or doubleword in memory.
LDSET, LDSETA, LDSETAL, LDSETL: Atomic bit set on
word or doubleword in memory.
LDSMAX, LDSMAXA, LDSMAXAL, LDSMAXL: Atomic signed maximum on
word or doubleword in memory.
LDSMIN, LDSMINA, LDSMINAL, LDSMINL: Atomic signed minimum on
word or doubleword in memory.
LDUMAX, LDUMAXA, LDUMAXAL, LDUMAXL: Atomic unsigned maximum on
word or doubleword in memory.
LDUMIN, LDUMINA, LDUMINAL, LDUMINL: Atomic unsigned minimum on
word or doubleword in memory.
SWP, SWPA, SWPAL, SWPL: Swap
word or doubleword in memory.
LDPSW: Load Pair of Registers Signed
Word.
SXTW: Sign Extend
Word: an alias of SBFM.
REV32 (vector): Reverse elements in 32-bit
words (vector).
CASP, CASPA, CASPAL, CASPL: Compare and Swap Pair of
words or doublewords in memory.
REV32: Reverse bytes in 32-bit
words.
BCAX: Bit Clear and
XOR.
XPACD, XPACI, XPACLRI: Strip Pointer Authentication Code.
XPACI, XPACLRI: Strip Pointer Authentication Code.
XPACLRI: Strip Pointer Authentication Code.
XTN, XTN2: Extract Narrow.
YIELD: YIELD.
FCVTZS (scalar, fixed-point): Floating-point Convert to Signed fixed-point, rounding toward
FCVTZS (scalar, integer): Floating-point Convert to Signed integer, rounding toward
Zero (scalar).
FCVTZU (scalar, fixed-point): Floating-point Convert to Unsigned fixed-point, rounding toward
Zero (scalar).
FCVTZU (scalar, integer): Floating-point Convert to Unsigned integer, rounding toward
Zero (scalar).
FRINTZ (scalar): Floating-point Round to Integral, toward
Zero (scalar).
CMEQ (zero): Compare bitwise Equal to
zero (vector).
CMGE (zero): Compare signed Greater than or Equal to
zero (vector).
CMGT (zero): Compare signed Greater than
zero (vector).
CMLE (zero): Compare signed Less than or Equal to
zero (vector).
CMLT (zero): Compare signed Less than
zero (vector).
FCMEQ (zero): Floating-point Compare Equal to
zero (vector).
FCMGE (zero): Floating-point Compare Greater than or Equal to
zero (vector).
FCMGT (zero): Floating-point Compare Greater than
zero (vector).
FCMLE (zero): Floating-point Compare Less than or Equal to
zero (vector).
FCMLT (zero): Floating-point Compare Less than
zero (vector).
FCVTZS (vector, fixed-point): Floating-point Convert to Signed fixed-point, rounding toward
Zero (vector).
FCVTZS (vector, integer): Floating-point Convert to Signed integer, rounding toward
Zero (vector).
FCVTZU (vector, fixed-point): Floating-point Convert to Unsigned fixed-point, rounding toward
Zero (vector).
FCVTZU (vector, integer): Floating-point Convert to Unsigned integer, rounding toward
Zero (vector).
FRINTZ (vector): Floating-point Round to Integral, toward
Zero (vector).
CLZ (vector): Count Leading
Zero bits (vector).
CLZ: Count leading
zero bits.
CBZ: Compare and Branch on
Zero.
FJCVTZS: Floating-point Javascript Convert to Signed fixed-point, rounding toward
Zero.
MOVZ: Move wide with
zero.
TBZ: Test bit and Branch if
Zero.
SBFIZ: Signed Bitfield Insert in
Zero: an alias of SBFM.
UBFIZ: Unsigned Bitfield Insert in
Zero: an alias of UBFM.
ZIP1:
Zip vectors (primary).
ZIP2:
Zip vectors (secondary).
ZIP1: Zip vectors (primary).
ZIP2: Zip vectors (secondary).
Internal version only: isa v27.02, AdvSIMD v26.0, pseudocode v34.2.2 ; Build timestamp: 2018-03-28T19:55
Copyright © 2010-2018 ARM Limited or its affiliates. All rights reserved. This document is Non-Confidential.
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