TLBI VMALLS12E1IS, TLB Invalidate by VMID, All at Stage 1 and 2, EL1, Inner Shareable

The TLBI VMALLS12E1IS characteristics are:

Purpose

Invalidate cached copies of translation table entries from TLBs that meet all the following requirements:

The invalidation applies to all PEs in the same Inner Shareable shareability domain as the PE that executes this instructions.

Note

For the EL1&0 translation regime, the invalidation applies to both:

This System instruction is part of the TLB maintenance instructions functional group.

Configuration

There are no configuration notes.

Attributes

TLBI VMALLS12E1IS is a 64-bit System instruction.

Field descriptions

TLBI VMALLS12E1IS ignores the value in the register specified by the instruction encoding. Software does not have to write a value to the register before issuing this instruction.

Executing the TLBI VMALLS12E1IS instruction

This instruction is executed using TLBI with the following syntax:

TLBI <tlbi_op>

This syntax uses the following encoding in the System instruction encoding space:

<tlbi_op> op0op1CRnCRmop2Rt
VMALLS12E1IS011001000001111011111

Accessibility

The instruction is executable as follows:

Control Accessibility
E2HTGENSEL0EL1EL2EL3
xx0 - - n/a WO
001 - - WOWO
011 - n/a WOWO
101 - - WOWO
111 - n/a WOWO

This table applies to all syntax that can be used to execute this instruction.

If SCR_EL3.NS==0, or EL2 is not implemented, this instruction executes as a TLBI VMALLE1IS.




18/04/2017 17:00

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