CTIOUTEN<n>, CTI Input Channel to Output Trigger Enable registers, n = 0 - 31

The CTIOUTEN<n> characteristics are:

Purpose

Defines which input channels generate output trigger n.

This register is part of the Cross-Trigger Interface registers functional group.

Usage constraints

This register is accessible as follows:

SLKDefault
RORW

Configuration

CTIOUTEN<n> is in the Debug power domain. RW fields in this register reset to architecturally UNKNOWN values. These apply only on an External debug reset. The register is not affected by a Warm reset and is not affected by a Cold reset.

If output trigger n is not connected, the behavior of CTIOUTEN<n> is IMPLEMENTATION DEFINED.

Attributes

CTIOUTEN<n> is a 32-bit register.

Field descriptions

The CTIOUTEN<n> bit assignments are:

313029282726252423222120191817161514131211109876543210
OUTEN<x>, bit [x]

OUTEN<x>, bit [x], for x = 0 to 31

Input channel <x> to output trigger <n> enable.

Bits [31:N] are RAZ/WI. N is the number of ECT channels implemented as defined by the CTIDEVID.NUMCHAN field.

Possible values of this bit are:

OUTEN<x>Meaning
0

An event on input channel <x> will not cause output trigger <n> to be asserted.

1

An event on input channel <x> will cause output trigger <n> to be asserted.

When this register has an architecturally-defined reset value, this field resets to a value that is architecturally UNKNOWN.

Accessing the CTIOUTEN<n>

CTIOUTEN<n> can be accessed through the external debug interface:

ComponentOffset
CTI0x0A0 + 4n



18/04/2017 17:00

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