PMDEVAFF1, Performance Monitors Device Affinity register 1

The PMDEVAFF1 characteristics are:

Purpose

Copy of the high half of the PE MPIDR_EL1 register that allows a debugger to determine which PE in a multiprocessor system the Performance Monitor component relates to.

This register is part of the Performance Monitors registers functional group.

Usage constraints

This register is accessible as follows:

SLKDefault
RORO

Configuration

PMDEVAFF1 is in the Debug power domain.

Implementation of this register is OPTIONAL.

Attributes

PMDEVAFF1 is a 32-bit register.

Field descriptions

The PMDEVAFF1 bit assignments are:

313029282726252423222120191817161514131211109876543210
MPIDR_EL1 high half

Bits [31:0]

MPIDR_EL1 high half. Read-only copy of the high half of MPIDR_EL1, as seen from the highest implemented Exception level.

Accessing the PMDEVAFF1

PMDEVAFF1 can be accessed through the external debug interface:

ComponentOffset
PMU 0xFAC



18/04/2017 17:00

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