The GICH_MISR characteristics are:
Indicates which maintenance interrupts are asserted.
This register is part of the GIC virtualised guest interface control registers functional group.
This register is accessible as follows:
Security disabled | Secure | Non-secure |
---|---|---|
RO | RO | RO |
This register is used only when System register access is not enabled. When System register access is enabled:
A maintenance interrupt is asserted only if at least one bit is set to 1 in this register and if GICH_HCR.En == 1.
Some or all RW fields of this register have defined reset values.
This register is available when the GIC implementation supports interrupt virtualization.
GICH_MISR is a 32-bit register.
The GICH_MISR bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | VGrp1D | VGrp1E | VGrp0D | VGrp0E | NP | LRENP | U | EOI |
Reserved, RES0.
vPE Group 1 Disabled.
VGrp1D | Meaning |
---|---|
0 |
vPE Group 1 Disabled maintenance interrupt not asserted. |
1 |
vPE Group 1 Disabled maintenance interrupt asserted. |
This maintenance interrupt is asserted when GICH_HCR.VGrp1DIE == 1 and GICH_VMCR.VENG1 == 0.
When this register has an architecturally-defined reset value, this field resets to 0.
vPE Group 1 Enabled.
VGrp1E | Meaning |
---|---|
0 |
vPE Group 1 Enabled maintenance interrupt not asserted. |
1 |
vPE Group 1 Enabled maintenance interrupt asserted. |
This maintenance interrupt is asserted when GICH_HCR.VGrp1EIE == 1 and GICH_VMCR.VENG1 == 1.
When this register has an architecturally-defined reset value, this field resets to 0.
vPE Group 0 Disabled.
VGrp0D | Meaning |
---|---|
0 |
vPE Group 0 Disabled maintenance interrupt not asserted. |
1 |
vPE Group 0 Disabled maintenance interrupt asserted. |
This maintenance interrupt is asserted when GICH_HCR.VGrp0DIE == 1 and GICH_VMCR.VENG0 == 0.
When this register has an architecturally-defined reset value, this field resets to 0.
vPE Group 0 Enabled.
VGrp0E | Meaning |
---|---|
0 |
vPE Group 0 Enabled maintenance interrupt not asserted. |
1 |
vPE Group 0 Enabled maintenance interrupt asserted. |
This maintenance interrupt is asserted when GICH_HCR.VGrp0EIE == 1 and GICH_VMCR.VENG0 == 1.
When this register has an architecturally-defined reset value, this field resets to 0.
No Pending.
NP | Meaning |
---|---|
0 |
No Pending maintenance interrupt not asserted. |
1 |
No Pending maintenance interrupt asserted. |
This maintenance interrupt is asserted when GICH_HCR.NPIE == 1 and no List register is in the pending state.
When this register has an architecturally-defined reset value, this field resets to 0.
List Register Entry Not Present.
LRENP | Meaning |
---|---|
0 |
List Register Entry Not Present maintenance interrupt not asserted. |
1 |
List Register Entry Not Present maintenance interrupt asserted. |
This maintenance interrupt is asserted when GICH_HCR.LRENPIE == 1 and GICH_HCR.EOICount is nonzero.
When this register has an architecturally-defined reset value, this field resets to 0.
Underflow.
U | Meaning |
---|---|
0 |
Underflow maintenance interrupt not asserted. |
1 |
Underflow maintenance interrupt asserted. |
This maintenance interrupt is asserted when GICH_HCR.UIE == 1 and zero or one of the List register entries are marked as a valid interrupt.
When this register has an architecturally-defined reset value, this field resets to 0.
End Of Interrupt.
EOI | Meaning |
---|---|
0 |
End Of Interrupt maintenance interrupt not asserted. |
1 |
End Of Interrupt maintenance interrupt asserted. |
This maintenance interrupt is asserted when at least one bit in GICH_EISR == 1.
When this register has an architecturally-defined reset value, this field resets to 0.
A List register is in the pending state only if the corresponding GICH_LR<n> value is 01, that is, pending. The active and pending state is not included.
GICH_MISR can be accessed through its memory-mapped interface:
Component | Offset |
---|---|
GIC Virtual interface control | 0x0010 |
18/04/2017 17:00
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