System Register XML
for ARMv8.2
(00bet3.2)

2nd May 2017


1. Introduction

This is the 00bet3.2 release of the System Register XML for ARMv8.2, describing:

The Proprietary Notice gives details of the terms and conditions under which this package is provided.

If you have comments on the content of this package, please send them by e-mail to support-aarchv8@arm.com. Give:

Please see the Documentation for more information on the general structure of these descriptions.


2. Contents

This Version 00bet3.2 [HTML] [PDF] [XML]

3. Release notes

Change history

This is the first Non-Confidential release of the XML.

Known issues


4. Documentation

General

A description within the XML contains the following sections:

Purpose
A short description of the purpose of the register in the ARMv8 Architecture.
Configuration
How the register is architecturally mapped onto another System register or a memory-mapped register. If the configuration of the PE affects the implementation of the register, then information about this is also included here. This section also summarizes the behavior of the register on a reset.
Attributes
The size of the register. For registers where the layouts of the fields differ based on configuration, or other state within the PE, this section also summarizes the different layouts.
Field descriptions
The register diagram, and a description of the behavior of each field within the register.

Memory-mapped registers

A memory-mapped register description also contains the following sections:

Usage constraints
The accessibility of the memory-mapped register.
Accessing the ...
The address or offset of the register in the memory map.

System registers

A System register description also contains an "Accessing the ..." section, that includes:

The accessibility of a System register is described in the "Accessibility" sub-section. The first column of this table is the same as the table describing the encoding of the instructions used to access the register. The columns following this are described below:

Configuration
If present, this column describes other configuration information (in addition to the Control fields) on which the accessibility depends. If the entry for the row is empty or the column is not present, there is no other configuration information.
Control
Every accessibility row include one or more control fields, and the settings on which the accessibility depends. Each setting is a binary value, and the value may include the character 'x', which indicates that the bit at this position in the value can be either '0' or '1'.
Accessibility
The Accessibility columns describe the permission at each Exception level for this row. Each value may be one of the following, or a reference to another register:
n/a
Access to the register at this Exception level is not possible. This is used in the following cases:
  • EL2 when NS==0. Secure EL2 does not exist!
  • EL1 when NS==1 and TGE==1. In this case all exceptions to EL1 are re-routed to EL2, so there is no execution at EL1.
RW
Read and write access permitted.
RO
Read access permitted, but no write access.
WO
Write access permitted, but no read access.
-
Access to the register is UNDEFINED.
When the cell is a reference to another register, this indicates that the attempt to access this register using the instruction will result in access to the referenced register.
Instance
Where the register is a banked register, this row describes which banked register is accessed.