The GICV_AHPPIR characteristics are:
Provides the INTID of the highest priority pending Group 1 virtual interrupt in the List registers.
This register corresponds to the physical CPU interface register GICC_AHPPIR.
This register is part of the GIC virtual CPU interface registers functional group.
This register is accessible as follows:
Security disabled | Secure | Non-secure |
---|---|---|
RO | RO | RO |
This register is used only when System register access is not enabled. When System register access is enabled:
This register is used for Group 1 interrupts only. GICV_HPPIR provides equivalent functionality for Group 0 interrupts.
The register does not return the INTID of an interrupt that is active and pending.
When affinity routing is enabled, it is a programming error to use memory-mapped registers to access the GIC.
This register is available when the GIC implementation supports interrupt virtualization.
GICV_AHPPIR is a 32-bit register.
The GICV_AHPPIR bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | INTID |
Reserved, RES0.
The INTID of the signaled interrupt.
INTIDs 1020-1023 are reserved and convey additional information such as spurious interrupts.
When affinity routing is not enabled:
A read of this register returns the spurious INTID 1023 if any of the following are true:
GICV_AHPPIR can be accessed through its memory-mapped interface:
Component | Offset |
---|---|
GIC Virtual CPU interface | 0x0028 |
02/05/2017 15:43
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