PAN, Privileged Access Never

The PAN characteristics are:

Purpose

When ARMv8.1-PAN is implemented, allows access to the Privileged Access Never bit.

When ARMv8.1-PAN is not implemented, this register is not implemented.

This register is part of the Process state registers functional group.

Configuration

This register is introduced in ARMv8.1.

Attributes

PAN is a 32-bit register.

Field descriptions

The PAN bit assignments are:

313029282726252423222120191817161514131211109876543210
000000000PAN0000000000000000000000

Bits [31:23]

Reserved, RES0.

PAN, bit [22]

Privileged Access Never. Defined values are:

PANMeaning
0

The translation system is the same as ARMv8.0.

1

Disables privileged read and write accesses to addresses accessible at EL0.

The value of this bit is usually preserved on taking an exception, except in the following situations:

Bits [21:0]

Reserved, RES0.

Accessing the PAN

This register can be read using MRS with the following syntax:

MRS <Xt>, <systemreg>

This register can be written using MSR (register) with the following syntax:

MSR <systemreg>, <Xt>

This syntax uses the following encoding in the System instruction encoding space:

<systemreg> op0op1CRnCRmop2
PAN1100001000010011

This register can be modified using MSR (immediate) with the following syntax:

MSR <pstatefield>, <imm>

This syntax uses the following encoding in the System instruction encoding space:

<pstatefield> op0op1CRnop2
PAN000000100100

Accessibility

The register is accessible as follows:

Control Accessibility
E2HTGENSEL0EL1EL2EL3
xx0 - RW n/a RW
x01 - RWRWRW
x11 - n/a RWRW

This table applies to all instructions that can access this register.




02/05/2017 15:43

Copyright © 2010-2017 ARM Limited or its affiliates. All rights reserved. This document is Non-Confidential.