The CNTFRQ characteristics are:
This register is provided so that software can discover the frequency of the system counter. The instance of the register in the CNTCTLBase frame must be programmed with this value as part of system initialization. The value of the register is not interpreted by hardware.
This register is part of the Generic Timer registers functional group.
This register is accessible as follows:
Default |
---|
RO |
CNTFRQ must be implemented as an RW register in the CNTCTLBase frame.
In a system that recognizes two Security states, the instance of the register in the CNTCTLBase frame is only accessible by Secure accesses.
CNTFRQ can be implemented as a RO register in any implemented CNTBaseN frame, and in the corresponding CNTEL0BaseN frame.
'CNTCTLBase status and control fields for the CNTBaseN and CNTEL0BaseN frames' in Chapter I1 of the ARMv8 ARM describes the status fields that identify whether a CNTBaseN frame is implemented, and for an implemented frame:
For an implemented CNTBaseN frame:
For an implemented CNTEL0BaseN frame:
The power domain of CNTFRQ is IMPLEMENTATION DEFINED.
On a reset of the reset domain in which an RW instance of this register is implemented, RW fields in the register reset to UNKNOWN values. The register is not affected by a reset of any other reset domain. For more information see 'Power and reset domains for the system level implementation of the Generic Timer' in Chapter I1 of the ARMv8 ARM.
CNTFRQ is a 32-bit register.
The CNTFRQ bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Clock frequency |
Clock frequency. Indicates the system counter clock frequency, in Hz.
CNTFRQ can be accessed through its memory-mapped interface:
Component | Frame | Offset |
---|---|---|
Timer | CNTBaseN | 0x010 |
Timer | CNTEL0BaseN | 0x010 |
Timer | CNTCTLBase | 0x000 |
02/05/2017 15:43
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