The GICR_TYPER characteristics are:
Provides information about the configuration of this Redistributor.
This register is part of the GIC Redistributor registers functional group.
This register is accessible as follows:
Security disabled | Secure | Non-secure |
---|---|---|
RO | RO | RO |
A copy of this register is provided for each Redistributor.
GICR_TYPER is a 64-bit register.
The GICR_TYPER bit assignments are:
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
Affinity_Value | |||||||||||||||||||||||||||||||
0 | 0 | 0 | 0 | 0 | 0 | CommonLPIAff | Processor_Number | 0 | 0 | DPGS | Last | DirectLPI | 0 | VLPIS | PLPIS | ||||||||||||||||
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
The identity of the PE associated with this Redistributor.
Bits [63:56] provide Aff3, the Affinity level 3 value for the Redistributor.
Bits [55:48] provide Aff2, the Affinity level 2 value for the Redistributor.
Bits [47:40] provide Aff1, the Affinity level 1 value for the Redistributor.
Bits [39:32] provide Aff0, the Affinity level 0 value for the Redistributor.
Reserved, RES0.
The affinity level at which Redistributors share a LPI Configuration table.
CommonLPIAff | Meaning |
---|---|
00 |
All Redistributors must share an LPI Configuration table. |
01 |
All Redistributors with the same Aff3 value must share an LPI Configuration table. |
10 |
All Redistributors with the same Aff3.Aff2 value must share an LPI Configuration table. |
11 |
All Redistributors with the same Aff3.Aff2.Aff1 value must share an LPI Configuration table. |
A unique identifier for the PE. When GITS_TYPER.PTA == 0, an ITS uses this field to identify the interrupt target.
When affinity routing is disabled for a Security state, this field indicates which GICD_ITARGETSR<n> corresponds to this Redistributor.
Reserved, RES0.
Sets support for GICR_CTLR.DPG* bits.
DPGS | Meaning |
---|---|
0 |
GICR_CTLR.DPG* bits are not supported. |
1 |
GICR_CTLR.DPG* bits are supported. |
Indicates whether this Redistributor is the highest-numbered Redistributor in a series of contiguous Redistributor pages.
Last | Meaning |
---|---|
0 |
This Redistributor is not the highest-numbered Redistributor in a series of contiguous Redistributor pages. |
1 |
This Redistributor is the highest-numbered Redistributor in a series of contiguous Redistributor pages. |
Indicates whether this Redistributor supports direct injection of LPIs.
DirectLPI | Meaning |
---|---|
0 |
This Redistributor does not support direct injection of LPIs. The GICR_SETLPIR, GICR_CLRLPIR, GICR_INVLPIR, GICR_INVALLR, and GICR_SYNCR registers are either not implemented, or have an IMPLEMENTATION DEFINED purpose. |
1 |
This Redistributor supports direct injection of LPIs. The GICR_SETLPIR, GICR_CLRLPIR, GICR_INVLPIR, GICR_INVALLR, and GICR_SYNCR registers are implemented. |
Reserved, RES0.
Indicates whether the GIC implementation supports virtual LPIs and the direct injection of virtual LPIs.
VLPIS | Meaning |
---|---|
0 |
The implementation does not support virtual LPIs or the direct injection of virtual LPIs. |
1 |
The implementation supports virtual LPIs and the direct injection of virtual LPIs. |
In GICv3 implementations this field is RES0.
Indicates whether the GIC implementation supports physical LPIs.
PLPIS | Meaning |
---|---|
0 |
The implementation does not support physical LPIs. |
1 |
The implementation supports physical LPIs. |
GICR_TYPER can be accessed through its memory-mapped interface:
Component | Frame | Offset |
---|---|---|
GIC Redistributor | RD_base | 0x0008-0x000C |
02/05/2017 15:43
Copyright © 2010-2017 ARM Limited or its affiliates. All rights reserved. This document is Non-Confidential.