ELR_EL2, Exception Link Register (EL2)

The ELR_EL2 characteristics are:

Purpose

When taking an exception to EL2, holds the address to return to.

This register is part of the Special-purpose registers functional group.

Configuration

AArch64 System register ELR_EL2 is architecturally mapped to AArch32 System register ELR_hyp.

Attributes

ELR_EL2 is a 64-bit register.

Field descriptions

The ELR_EL2 bit assignments are:

6362616059585756555453525150494847464544434241403938373635343332
Return address
Return address
313029282726252423222120191817161514131211109876543210

Bits [63:0]

Return address.

An exception return from EL2 using AArch64 makes ELR_EL2 become UNKNOWN.

When EL2 is in AArch32 Execution state and an exception is taken from EL0, EL1, or EL2 to EL3 and AArch64 execution, the upper 32-bits of ELR_EL2 are either set to 0 or hold the same value that they did before AArch32 execution. Which option is adopted is determined by an implementation, and might vary dynamically within an implementation. Correspondingly software must regard the value as being an UNKNOWN choice between the two values.

Accessing the ELR_EL2

This register can be read using MRS with the following syntax:

MRS <Xt>, <systemreg>

This register can be written using MSR (register) with the following syntax:

MSR <systemreg>, <Xt>

This syntax uses the following encoding in the System instruction encoding space:

<systemreg> op0op1CRnCRmop2
ELR_EL21110001000000001
ELR_EL11100001000000001

Accessibility

The register is accessible as follows:

<systemreg> Control Accessibility
E2HTGENSEL0EL1EL2EL3
ELR_EL2xx0 - - n/a RW
ELR_EL2001 - - RWRW
ELR_EL2011 - n/a RWRW
ELR_EL2101 - - RWRW
ELR_EL2111 - n/a RWRW
ELR_EL1xx0 - ELR_EL1 n/a ELR_EL1
ELR_EL1001 - ELR_EL1 ELR_EL1 ELR_EL1
ELR_EL1011 - n/a ELR_EL1 ELR_EL1
ELR_EL1101 - ELR_EL1 RW ELR_EL1
ELR_EL1111 - n/a RW ELR_EL1

When HCR_EL2.E2H is 1, without explicit synchronization, access from EL2 using the mnemonic ELR_EL2 or ELR_EL1 are not guaranteed to be ordered with respect to accesses using the other mnemonic.




02/05/2017 15:43

Copyright © 2010-2017 ARM Limited or its affiliates. All rights reserved. This document is Non-Confidential.