SysReg_v83A_xml-00bet4 (old) | htmldiff from-SysReg_v83A_xml-00bet4 | (new) SysReg_v83A_xml-00bet5 |
ASICCTL: CTI External Multiplexer Control register
CNTACR<n>: Counter-timer Access Control Registers
CNTCR: Counter Control Register
CNTCV: Counter Count Value register
CNTEL0ACR: Counter-timer EL0 Access Control Register
CNTFID0: Counter Frequency ID
CNTFID<n>: Counter Frequency IDs, n > 0
CNTFRQ: Counter-timer Frequency
CNTNSAR: Counter-timer Non-secure Access Register
CNTPCT: Counter-timer Physical Count
CNTP_CTL: Counter-timer Physical Timer Control
CNTP_CVAL: Counter-timer Physical Timer CompareValue
CNTP_TVAL: Counter-timer Physical Timer TimerValue
CNTSR: Counter Status Register
CNTTIDR: Counter-timer Timer ID Register
CNTVCT: Counter-timer Virtual Count
CNTVOFF: Counter-timer Virtual Offset
CNTVOFF<n>: Counter-timer Virtual Offsets
CNTV_CTL: Counter-timer Virtual Timer Control
CNTV_CVAL: Counter-timer Virtual Timer CompareValue
CNTV_TVAL: Counter-timer Virtual Timer TimerValue
CTIAPPCLEAR: CTI Application Trigger Clear register
CTIAPPPULSE: CTI Application Pulse register
CTIAPPSET: CTI Application Trigger Set register
CTIAUTHSTATUS: CTI Authentication Status register
CTICHINSTATUS: CTI Channel In Status register
CTICHOUTSTATUS: CTI Channel Out Status register
CTICIDR0: CTI Component Identification Register 0
CTICIDR1: CTI Component Identification Register 1
CTICIDR2: CTI Component Identification Register 2
CTICIDR3: CTI Component Identification Register 3
CTICLAIMCLR: CTI Claim Tag Clear register
CTICLAIMSET: CTI Claim Tag Set register
CTICONTROL: CTI Control register
CTIDEVAFF0: CTI Device Affinity register 0
CTIDEVAFF1: CTI Device Affinity register 1
CTIDEVARCH: CTI Device Architecture register
CTIDEVID: CTI Device ID register 0
CTIDEVID1: CTI Device ID register 1
CTIDEVID2: CTI Device ID register 2
CTIDEVTYPE: CTI Device Type register
CTIGATE: CTI Channel Gate Enable register
CTIINEN<n>: CTI Input Trigger to Output Channel Enable registers
CTIINTACK: CTI Output Trigger Acknowledge register
CTIITCTRL: CTI Integration mode Control register
CTILAR: CTI Lock Access Register
CTILSR: CTI Lock Status Register
CTIOUTEN<n>: CTI Input Channel to Output Trigger Enable registers
CTIPIDR0: CTI Peripheral Identification Register 0
CTIPIDR1: CTI Peripheral Identification Register 1
CTIPIDR2: CTI Peripheral Identification Register 2
CTIPIDR3: CTI Peripheral Identification Register 3
CTIPIDR4: CTI Peripheral Identification Register 4
CTITRIGINSTATUS: CTI Trigger In Status register
CTITRIGOUTSTATUS: CTI Trigger Out Status register
CounterID<n>: Counter ID registers
DBGAUTHSTATUS_EL1: Debug Authentication Status register
DBGBCR<n>_EL1: Debug Breakpoint Control Registers
DBGBVR<n>_EL1: Debug Breakpoint Value Registers
DBGCLAIMCLR_EL1: Debug Claim Tag Clear register
DBGCLAIMSET_EL1: Debug Claim Tag Set register
DBGDTRRX_EL0: Debug Data Transfer Register, Receive
DBGDTRTX_EL0: Debug Data Transfer Register, Transmit
DBGWCR<n>_EL1: Debug Watchpoint Control Registers
DBGWVR<n>_EL1: Debug Watchpoint Value Registers
EDAA32PFR: External Debug AArch32 Processor Feature Register
EDACR: External Debug Auxiliary Control Register
EDCIDR0: External Debug Component Identification Register 0
EDCIDR1: External Debug Component Identification Register 1
EDCIDR2: External Debug Component Identification Register 2
EDCIDR3: External Debug Component Identification Register 3
EDCIDSR: External Debug Context ID Sample Register
EDDEVAFF0: External Debug Device Affinity register 0
EDDEVAFF1: External Debug Device Affinity register 1
EDDEVARCH: External Debug Device Architecture register
EDDEVID: External Debug Device ID register 0
EDDEVID1: External Debug Device ID register 1
EDDEVID2: External Debug Device ID register 2
EDDEVTYPE: External Debug Device Type register
EDDFR: External Debug Feature Register
EDECCR: External Debug Exception Catch Control Register
EDECR: External Debug Execution Control Register
EDESR: External Debug Event Status Register
EDITCTRL: External Debug Integration mode Control register
EDITR: External Debug Instruction Transfer Register
EDLAR: External Debug Lock Access Register
EDLSR: External Debug Lock Status Register
EDPCSR: External Debug Program Counter Sample Register
EDPFR: External Debug Processor Feature Register
EDPIDR0: External Debug Peripheral Identification Register 0
EDPIDR1: External Debug Peripheral Identification Register 1
EDPIDR2: External Debug Peripheral Identification Register 2
EDPIDR3: External Debug Peripheral Identification Register 3
EDPIDR4: External Debug Peripheral Identification Register 4
EDPRCR: External Debug Power/Reset Control Register
EDPRSR: External Debug Processor Status Register
EDRCR: External Debug Reserve Control Register
EDSCR: External Debug Status and Control Register
EDVIDSR: External Debug Virtual Context Sample Register
EDWAR: External Debug Watchpoint Address Register
GICC_ABPR: CPU Interface Aliased Binary Point Register
GICC_AEOIR: CPU Interface Aliased End Of Interrupt Register
GICC_AHPPIR: CPU Interface Aliased Highest Priority Pending Interrupt Register
GICC_AIAR: CPU Interface Aliased Interrupt Acknowledge Register
GICC_APR<n>: CPU Interface Active Priorities Registers
GICC_BPR: CPU Interface Binary Point Register
GICC_CTLR: CPU Interface Control Register
GICC_DIR: CPU Interface Deactivate Interrupt Register
GICC_EOIR: CPU Interface End Of Interrupt Register
GICC_HPPIR: CPU Interface Highest Priority Pending Interrupt Register
GICC_IAR: CPU Interface Interrupt Acknowledge Register
GICC_IIDR: CPU Interface Identification Register
GICC_NSAPR<n>: CPU Interface Non-secure Active Priorities Registers
GICC_PMR: CPU Interface Priority Mask Register
GICC_RPR: CPU Interface Running Priority Register
GICC_STATUSR: CPU Interface Status Register
GICD_CLRSPI_NSR: Clear Non-secure SPI Pending Register
GICD_CLRSPI_SR: Clear Secure SPI Pending Register
GICD_CPENDSGIR<n>: SGI Clear-Pending Registers
GICD_CTLR: Distributor Control Register
GICD_ICACTIVER<n>: Interrupt Clear-Active Registers
GICD_ICENABLER<n>: Interrupt Clear-Enable Registers
GICD_ICFGR<n>: Interrupt Configuration Registers
GICD_ICPENDR<n>: Interrupt Clear-Pending Registers
GICD_IGROUPR<n>: Interrupt Group Registers
GICD_IGRPMODR<n>: Interrupt Group Modifier Registers
GICD_IIDR: Distributor Implementer Identification Register
GICD_IPRIORITYR<n>: Interrupt Priority Registers
GICD_IROUTER<n>: Interrupt Routing Registers
GICD_ISACTIVER<n>: Interrupt Set-Active Registers
GICD_ISENABLER<n>: Interrupt Set-Enable Registers
GICD_ISPENDR<n>: Interrupt Set-Pending Registers
GICD_ITARGETSR<n>: Interrupt Processor Targets Registers
GICD_NSACR<n>: Non-secure Access Control Registers
GICD_SETSPI_NSR: Set Non-secure SPI Pending Register
GICD_SETSPI_SR: Set Secure SPI Pending Register
GICD_SGIR: Software Generated Interrupt Register
GICD_SPENDSGIR<n>: SGI Set-Pending Registers
GICD_STATUSR: Error Reporting Status Register
GICD_TYPER: Interrupt Controller Type Register
GICH_APR<n>: Active Priorities Registers
GICH_EISR: End Interrupt Status Register
GICH_ELRSR: Empty List Register Status Register
GICH_HCR: Hypervisor Control Register
GICH_LR<n>: List Registers
GICH_MISR: Maintenance Interrupt Status Register
GICH_VMCR: Virtual Machine Control Register
GICH_VTR: Virtual Type Register
GICR_CLRLPIR: Clear LPI Pending Register
GICR_CTLR: Redistributor Control Register
GICR_ICACTIVER0: Interrupt Clear-Active Register 0
GICR_ICENABLER0: Interrupt Clear-Enable Register 0
GICR_ICFGR0: Interrupt Configuration Register 0
GICR_ICFGR1: Interrupt Configuration Register 1
GICR_ICPENDR0: Interrupt Clear-Pending Register 0
GICR_IGROUPR0: Interrupt Group Register 0
GICR_IGRPMODR0: Interrupt Group Modifier Register 0
GICR_IIDR: Redistributor Implementer Identification Register
GICR_INVALLR: Redistributor Invalidate All Register
GICR_INVLPIR: Redistributor Invalidate LPI Register
GICR_IPRIORITYR<n>: Interrupt Priority Registers
GICR_ISACTIVER0: Interrupt Set-Active Register 0
GICR_ISENABLER0: Interrupt Set-Enable Register 0
GICR_ISPENDR0: Interrupt Set-Pending Register 0
GICR_NSACR: Non-secure Access Control Register
GICR_PENDBASER: Redistributor LPI Pending Table Base Address Register
GICR_PROPBASER: Redistributor Properties Base Address Register
GICR_SETLPIR: Set LPI Pending Register
GICR_STATUSR: Error Reporting Status Register
GICR_SYNCR: Redistributor Synchronize Register
GICR_TYPER: Redistributor Type Register
GICR_VPENDBASER: Virtual Redistributor LPI Pending Table Base Address Register
GICR_VPROPBASER: Virtual Redistributor Properties Base Address Register
GICR_WAKER: Redistributor Wake Register
GICV_ABPR: Virtual Machine Aliased Binary Point Register
GICV_AEOIR: Virtual Machine Aliased End Of Interrupt Register
GICV_AHPPIR: Virtual Machine Aliased Highest Priority Pending Interrupt Register
GICV_AIAR: Virtual Machine Aliased Interrupt Acknowledge Register
GICV_APR<n>: Virtual Machine Active Priorities Registers
GICV_BPR: Virtual Machine Binary Point Register
GICV_CTLR: Virtual Machine Control Register
GICV_DIR: Virtual Machine Deactivate Interrupt Register
GICV_EOIR: Virtual Machine End Of Interrupt Register
GICV_HPPIR: Virtual Machine Highest Priority Pending Interrupt Register
GICV_IAR: Virtual Machine Interrupt Acknowledge Register
GICV_IIDR: Virtual Machine CPU Interface Identification Register
GICV_PMR: Virtual Machine Priority Mask Register
GICV_RPR: Virtual Machine Running Priority Register
GICV_STATUSR: Virtual Machine Error Reporting Status Register
GITS_BASER<n>: ITS Translation Table Descriptors
GITS_CBASER: ITS Command Queue Descriptor
GITS_CREADR: ITS Read Register
GITS_CTLR: ITS Control Register
GITS_CWRITER: ITS Write Register
GITS_IIDR: ITS Identification Register
GITS_TRANSLATER: ITS Translation Register
GITS_TYPER: ITS Type Register
MIDR_EL1: Main ID Register
OSLAR_EL1: OS Lock Access Register
PMAUTHSTATUS: Performance Monitors Authentication Status register
PMCCFILTR_EL0: Performance Monitors Cycle Counter Filter Register
PMCCNTR_EL0: Performance Monitors Cycle Counter
PMCEID0: Performance Monitors Common Event Identification register 0
PMCEID1: Performance Monitors Common Event Identification register 1
PMCEID2: Performance Monitors Common Event Identification register 2
PMCEID3: Performance Monitors Common Event Identification register 3
PMCFGR: Performance Monitors Configuration Register
PMCID1SR: CONTEXTIDR_EL1 Sample Register
PMCID2SR: CONTEXTIDR_EL2 Sample Register
PMCIDR0: Performance Monitors Component Identification Register 0
PMCIDR1: Performance Monitors Component Identification Register 1
PMCIDR2: Performance Monitors Component Identification Register 2
PMCIDR3: Performance Monitors Component Identification Register 3
PMCNTENCLR_EL0: Performance Monitors Count Enable Clear register
PMCNTENSET_EL0: Performance Monitors Count Enable Set register
PMCR_EL0: Performance Monitors Control Register
PMDEVAFF0: Performance Monitors Device Affinity register 0
PMDEVAFF1: Performance Monitors Device Affinity register 1
PMDEVARCH: Performance Monitors Device Architecture register
PMDEVID: Performance Monitors Device ID register
PMDEVTYPE: Performance Monitors Device Type register
PMEVCNTR<n>_EL0: Performance Monitors Event Count Registers
PMEVTYPER<n>_EL0: Performance Monitors Event Type Registers
PMINTENCLR_EL1: Performance Monitors Interrupt Enable Clear register
PMINTENSET_EL1: Performance Monitors Interrupt Enable Set register
PMITCTRL: Performance Monitors Integration mode Control register
PMLAR: Performance Monitors Lock Access Register
PMLSR: Performance Monitors Lock Status Register
PMOVSCLR_EL0: Performance Monitors Overflow Flag Status Clear register
PMOVSSET_EL0: Performance Monitors Overflow Flag Status Set register
PMPCSR: Program Counter Sample Register
PMPIDR0: Performance Monitors Peripheral Identification Register 0
PMPIDR1: Performance Monitors Peripheral Identification Register 1
PMPIDR2: Performance Monitors Peripheral Identification Register 2
PMPIDR3: Performance Monitors Peripheral Identification Register 3
PMPIDR4: Performance Monitors Peripheral Identification Register 4
PMSWINC_EL0: Performance Monitors Software Increment register
PMVIDSR: VMID Sample Register
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SysReg_v83A_xml-00bet4 (old) | htmldiff from-SysReg_v83A_xml-00bet4 | (new) SysReg_v83A_xml-00bet5 |