The GICR_STATUSR characteristics are:
Provides software with a mechanism to detect:
This register is part of the GIC Redistributor registers functional group.
In an implementation that supports two Security states, there are separate Secure and Non-secure instances of this register:
Security disabled | Secure | Non-secure | |
---|---|---|---|
GICR_STATUSR(S) | RW | RW | - |
GICR_STATUSR(NS) | RW | - | RW |
This is an optional register. If the register is not implemented, the location is RAZ/WI.
A copy of this register is provided for each Redistributor.
If the GIC implementation supports two Security states this register is Banked to provide Secure and Non-secure copies.
GICR_STATUSR is a 32-bit register.
The GICR_STATUSR bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | WROD | RWOD | WRD | RRD |
Reserved, RES0.
Write to an RO location.
WROD | Meaning |
---|---|
0 |
Normal operation. |
1 |
A write to an RO location has been detected. |
When a violation is detected, software must write 1 to this register to reset it.
Read of a WO location.
RWOD | Meaning |
---|---|
0 |
Normal operation. |
1 |
A read of a WO location has been detected. |
When a violation is detected, software must write 1 to this register to reset it.
Write to a reserved location.
WRD | Meaning |
---|---|
0 |
Normal operation. |
1 |
A write to a reserved location has been detected. |
When a violation is detected, software must write 1 to this register to reset it.
Read of a reserved location.
RRD | Meaning |
---|---|
0 |
Normal operation. |
1 |
A read of a reserved location has been detected. |
When a violation is detected, software must write 1 to this register to reset it.
GICR_STATUSR can be accessed through its memory-mapped interface:
Component | Frame | Offset |
---|---|---|
GIC Redistributor | RD_base | 0x0010 |
28/09/2017 08:24
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