JMCR, Jazelle Main Configuration Register

The JMCR characteristics are:

Purpose

A Jazelle register, which provides control of the Jazelle extension.

This register is part of the Legacy feature registers functional group.

Configuration

There is one instance of this register that is used in both Secure and Non-secure states.

Attributes

JMCR is a 32-bit register.

Field descriptions

The JMCR bit assignments are:

313029282726252423222120191817161514131211109876543210
00000000000000000000000000000000

Bits [31:0]

RAZ/WI at EL1, EL2, and EL3. It is IMPLEMENTATION DEFINED whether this field is RAZ/WI or UNDEFINED at EL0.

Accessing the JMCR

This register can be read using MRC with the following syntax:

MRC <syntax>

This register can be written using MCR with the following syntax:

MCR <syntax>

This syntax uses the following encoding in the System instruction encoding space:

<syntax> opc1opc2CRncoprocCRm
p14, 7, <Rt>, c2, c0, 0111000001011100000

Accessibility

The register is accessible as follows:

Control Accessibility
E2HTGENSEL0EL1EL2EL3
xx0implementation definedRW n/a RW
x01implementation definedRWRWRW
x11implementation defined n/a RWRW

This table applies to all instructions that can access this register.

For accesses from EL0 it is IMPLEMENTATION DEFINED whether the register is RW or UNDEFINED.




28/09/2017 08:24

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