The PMAUTHSTATUS characteristics are:
Provides information about the state of the IMPLEMENTATION DEFINED authentication interface for Performance Monitors.
This register is part of the Performance Monitors registers functional group.
This register is accessible as follows:
Default |
---|
RO |
PMAUTHSTATUS is in the Debug power domain.
This register is OPTIONAL, and is required for CoreSight compliance. ARM recommends that this register is implemented.
PMAUTHSTATUS is a 32-bit register.
The PMAUTHSTATUS bit assignments are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | SNID | SID | NSNID | NSID |
Reserved, RES0.
Holds the same value as DBGAUTHSTATUS_EL1.SNID.
Secure invasive debug. Possible values of this field are:
SID | Meaning |
---|---|
00 |
Not implemented. |
All other values are reserved.
Holds the same value as DBGAUTHSTATUS_EL1.NSNID.
Non-secure invasive debug. Possible values of this field are:
NSID | Meaning |
---|---|
00 |
Not implemented. |
All other values are reserved.
PMAUTHSTATUS can be accessed through the external debug interface:
Component | Offset |
---|---|
PMU | 0xFB8 |
28/09/2017 08:24
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