UAO, User Access Override

The UAO characteristics are:

Purpose

When ARMv8.2-UAO is implemented, allows access to the User Access Override bit.

When ARMv8.2-UAO is not implemented, this register is not implemented.

This register is part of the Special-purpose registers functional group.

Configuration

This register is introduced in ARMv8.2.

Attributes

UAO is a 32-bit register.

Field descriptions

The UAO bit assignments are:

313029282726252423222120191817161514131211109876543210
00000000UAO00000000000000000000000

Bits [31:24]

Reserved, RES0.

UAO, bit [23]

User Access Override. Defined values are:

UAOMeaning
0

The behavior of LDTR* and STTR* instructions is as defined in the base ARMv8 architecture.

1

When executed at EL1, or at EL2 with HCR_EL2.{E2H, TGE} == {1, 1}, LDTR* and STTR* instructions behave as the equivalent LDR* and STR* instructions.

When executed at EL3, or at EL2 with HCR_EL2.E2H == 0 or HCR_EL2.TGE == 0, the LDTR* and STTR* instructions behave as the equivalent LDR* and STR* instructions, regardless of the setting of the PSTATE.UAO bit.

Bits [22:0]

Reserved, RES0.

Accessing the UAO

This register can be read using MRS with the following syntax:

MRS <Xt>, <systemreg>

This register can be written using MSR (register) with the following syntax:

MSR <systemreg>, <Xt>

This syntax uses the following encoding in the System instruction encoding space:

<systemreg> op0op1CRnCRmop2
UAO1100001000010100

This register can be modified using MSR (immediate) with the following syntax:

MSR <pstatefield>, <imm>

This syntax uses the following encoding in the System instruction encoding space:

<pstatefield> op0op1CRnop2
UAO000000100011

Accessibility

The register is accessible as follows:

Control Accessibility
E2HTGENSEL0EL1EL2EL3
xx0 - RW n/a RW
x01 - RWRWRW
x11 - n/a RWRW

This table applies to all instructions that can access this register.




28/09/2017 08:24

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