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The CNTHV_TVAL_EL2 characteristics are:
Holds the timer value for the EL2 virtual timer.
AArch64 System register CNTHV_TVAL_EL2 bits [31:0] are architecturally mapped to AArch32 System register CNTHV_TVAL[31:0].
This register is present only when FEAT_VHE is implemented and (EL3 is implemented or (EL3 is not implemented and FEAT_SEL2 is not implemented)).implemented. Otherwise, direct accesses to CNTHV_TVAL_EL2 are UNDEFINED.
If EL2 is not implemented, this register is RES0 from EL3.
CNTHV_TVAL_EL2 is a 64-bit register.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | |||||||||||||||||||||||||||||||
TimerValue |
Reserved, RES0.
The TimerValue view of the EL2 virtual timer.
On a read of this register:
On a write of this register, CNTHV_CVAL_EL2 is set to (CNTVCT_EL0 + TimerValue), where TimerValue is treated as a signed 32-bit integer.
When CNTHV_CTL_EL2.ENABLE is 1, the timer condition is met when (CNTVCT_EL0 - CNTHV_CVAL_EL2) is greater than or equal to zero. This means that TimerValue acts like a 32-bit downcounter timer. When the timer condition is met:
When CNTHV_CTL_EL2.ENABLE is 0, the timer condition is not met, but CNTVCT_EL0 continues to count, so the TimerValue view appears to continue to count down.
The reset behavior of this field is:
When HCR_EL2.E2H is 1, without explicit synchronization, access from EL2 using the mnemonic CNTHV_TVAL_EL2 or CNTV_TVAL_EL0 are not guaranteed to be ordered with respect to accesses using the other mnemonic.
Accesses to this register use the following encodings in the System register encoding space:
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b100 | 0b1110 | 0b0011 | 0b000 |
if PSTATE.EL == EL0 then
UNDEFINED;
elsif PSTATE.EL == EL1 then
if EL2Enabled() && HCR_EL2.NV == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
else
UNDEFINED;
elsif PSTATE.EL == EL2 then
if CNTHV_CTL_EL2.ENABLE == '0' then
return bits(64) UNKNOWNCNTHV_TVAL_EL2;
else
return CNTHV_CVAL_EL2 - PhysicalCountInt();
elsif PSTATE.EL == EL3 then
if CNTHV_CTL_EL2.ENABLE == '0' then
return bits(64) UNKNOWNCNTHV_TVAL_EL2;
else
return CNTHV_CVAL_EL2 - PhysicalCountInt();
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b100 | 0b1110 | 0b0011 | 0b000 |
if PSTATE.EL == EL0 then
UNDEFINED;
elsif PSTATE.EL == EL1 then
if EL2Enabled() && HCR_EL2.NV == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
else
UNDEFINED;
elsif PSTATE.EL == EL2 then
CNTHV_CVAL_EL2CNTHV_TVAL_EL2 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt();];
elsif PSTATE.EL == EL3 then
CNTHV_CVAL_EL2CNTHV_TVAL_EL2 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt();];
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b011 | 0b1110 | 0b0011 | 0b000 |
if PSTATE.EL == EL0 then
if !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CNTKCTL_EL1.EL0VTEN == '0' then
if EL2Enabled() && HCR_EL2.TGE == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
else
AArch64.SystemAccessTrap(EL1, 0x18);
elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && CNTHCTL_EL2.EL0VTEN == '0' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif EL2Enabled() && HCR_EL2.<E2H,TGE> != '11' && CNTHCTL_EL2.EL1TVT == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '0' && IsFeatureImplemented(FEAT_SEL2) then
if CNTHVS_CTL_EL2.ENABLE == '0' then
return bits(64) UNKNOWNCNTHVS_TVAL_EL2;
else
return CNTHVS_CVAL_EL2 - PhysicalCountInt();
elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '1' then
if CNTHV_CTL_EL2.ENABLE == '0' then
return bits(64) UNKNOWNCNTHV_TVAL_EL2;
else
return CNTHV_CVAL_EL2 - PhysicalCountInt();
elsif HaveEL(EL2) && (!EL2Enabled() || HCR_EL2.<E2H,TGE> != '11') then
if CNTV_CTL_EL0.ENABLE == '0' then
return bits(64) UNKNOWN;
else
return CNTV_CVAL_EL0 - (PhysicalCountInt() - CNTVOFF_EL2);
else
if CNTV_CTL_EL0.ENABLE == '0' then
return bits(64) UNKNOWNCNTV_TVAL_EL0;
else
return CNTV_CVAL_EL0 - PhysicalCountInt();
elsif PSTATE.EL == EL1 then
if EL2Enabled() && CNTHCTL_EL2.EL1TVT == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif HaveEL(EL2) then
if CNTV_CTL_EL0.ENABLE == '0' then
return bits(64) UNKNOWN;
else
return CNTV_CVAL_EL0 - (PhysicalCountInt() - CNTVOFF_EL2);
else
if CNTV_CTL_EL0.ENABLE == '0' then
return bits(64) UNKNOWNCNTV_TVAL_EL0;
else
return CNTV_CVAL_EL0 - PhysicalCountInt();
elsif PSTATE.EL == EL2 then
if HCR_EL2.E2H == '1' && SCR_EL3.NS == '0' && IsFeatureImplemented(FEAT_SEL2) then
if CNTHVS_CTL_EL2.ENABLE == '0' then
return bits(64) UNKNOWNCNTHVS_TVAL_EL2;
else
return CNTHVS_CVAL_EL2 - PhysicalCountInt();
elsif HCR_EL2.E2H == '1' && SCR_EL3.NS == '1' then
if CNTHV_CTL_EL2.ENABLE == '0' then
return bits(64) UNKNOWNCNTHV_TVAL_EL2;
else
return CNTHV_CVAL_EL2 - PhysicalCountInt();
elsif HCR_EL2.E2H == '0' then
if CNTV_CTL_EL0.ENABLE == '0' then
return bits(64) UNKNOWN;
else
return CNTV_CVAL_EL0 - (PhysicalCountInt() - CNTVOFF_EL2);
else
if CNTV_CTL_EL0.ENABLE == '0' then
return bits(64) UNKNOWNCNTV_TVAL_EL0;
else
return CNTV_CVAL_EL0 - PhysicalCountInt();
elsif PSTATE.EL == EL3 then
if CNTV_CTL_EL0.ENABLE == '0' then
return bits(64) UNKNOWNCNTV_TVAL_EL0;
elsif HaveEL(EL2) && !ELUsingAArch32(EL2) then
return CNTV_CVAL_EL0 - (PhysicalCountInt() - CNTVOFF_EL2);
elsif HaveEL(EL2) && ELUsingAArch32(EL2) then
return CNTV_CVAL_EL0 - (PhysicalCountInt() - CNTVOFF);
else
return CNTV_CVAL_EL0 - PhysicalCountInt();
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b011 | 0b1110 | 0b0011 | 0b000 |
if PSTATE.EL == EL0 then
if !(EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') && CNTKCTL_EL1.EL0VTEN == '0' then
if EL2Enabled() && HCR_EL2.TGE == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
else
AArch64.SystemAccessTrap(EL1, 0x18);
elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && CNTHCTL_EL2.EL0VTEN == '0' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif EL2Enabled() && HCR_EL2.<E2H,TGE> != '11' && CNTHCTL_EL2.EL1TVT == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '0' && IsFeatureImplemented(FEAT_SEL2) then
CNTHVS_CVAL_EL2CNTHVS_TVAL_EL2 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt();];
elsif EL2Enabled() && HCR_EL2.<E2H,TGE> == '11' && SCR_EL3.NS == '1' then
CNTHV_CVAL_EL2CNTHV_TVAL_EL2 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt();];
elsif HaveEL(EL2) && (!EL2Enabled() || HCR_EL2.<E2H,TGE> != '11') then
CNTV_CVAL_EL0 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt() - CNTVOFF_EL2;
else
CNTV_CVAL_EL0CNTV_TVAL_EL0 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt();];
elsif PSTATE.EL == EL1 then
if EL2Enabled() && CNTHCTL_EL2.EL1TVT == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
elsif HaveEL(EL2) then
CNTV_CVAL_EL0 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt() - CNTVOFF_EL2;
else
CNTV_CVAL_EL0CNTV_TVAL_EL0 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt();];
elsif PSTATE.EL == EL2 then
if HCR_EL2.E2H == '1' && SCR_EL3.NS == '0' && IsFeatureImplemented(FEAT_SEL2) then
CNTHVS_CVAL_EL2CNTHVS_TVAL_EL2 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt();];
elsif HCR_EL2.E2H == '1' && SCR_EL3.NS == '1' then
CNTHV_CVAL_EL2CNTHV_TVAL_EL2 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt();];
elsif HCR_EL2.E2H == '0' then
CNTV_CVAL_EL0 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt() - CNTVOFF_EL2;
else
CNTV_CVAL_EL0CNTV_TVAL_EL0 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt();];
elsif PSTATE.EL == EL3 then
ifCNTV_TVAL_EL0 HaveEL(EL2) && !ELUsingAArch32(EL2) then
CNTV_CVAL_EL0 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt() - CNTVOFF_EL2;
elsif HaveEL(EL2) && ELUsingAArch32(EL2) then
CNTV_CVAL_EL0 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt() - CNTVOFF;
else
CNTV_CVAL_EL0 = SignExtend((X[t]<31:0>),64) + PhysicalCountInt();];
3020/09/2021 1412:5237; 092b4e1bbfbb45a293b198f9330c5f529ead2b0fd4a233ffbdfb36e47856c443a7ce9a85f5e501ca
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