(old) | htmldiff from- | (new) |
Halting breakpoint causes a software breakpoint to occur.
Halting breakpoint is always unconditional, even inside an IT block.
It has encodings from the following instruction sets: A32 ( A1 ) and T32 ( T1 ) .
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!= 1111 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | imm12 | 0 | 1 | 1 | 1 | imm4 | |||||||||||||||||
cond |
if EDSCR.HDE == '0' || !HaltingAllowed() then UNDEFINED; if cond != '1110' then UNPREDICTABLE; // HLT must be encoded with AL condition
If cond != '1110', then one of the following behaviors must occur:
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1 | 0 | 1 | 1 | 1 | 0 | 1 | 0 | 1 | 0 | imm6 |
if EDSCR.HDE == '0' || !HaltingAllowed() then UNDEFINED;
For more information about the constrained unpredictable behavior of this instruction, see Architectural Constraints on UNPREDICTABLE behaviors.
<q> | See Standard assembler syntax fields. An HLT instruction must be unconditional. |
EncodingSpecificOperations();
boolean is_async = FALSE;EncodingSpecificOperations();
Halt(DebugHalt_HaltInstruction, is_async););
Internal version only: isa v01_27v01_26, pseudocode v2022-03_relv2021-12_to_suppress_diffs_in_2022_03_RC1
; Build timestamp: 2022-03-29T102022-03-08T10:4611
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