TRBDEVID, Device Configuration Register

The TRBDEVID characteristics are:

Purpose

Provides discovery information for the component.

For additional information, see the CoreSight Architecture Specification.

Configuration

This register is present only when FEAT_TRBE_EXT is implemented. Otherwise, direct accesses to TRBDEVID are RES0.

TRBDEVID is in the Core power domain.

Attributes

TRBDEVID is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0MPAM

Bits [31:4]

Reserved, RES0.

MPAM, bits [3:0]

MPAM extensions. Indicates support for Memory Partitioning and Monitoring (MPAM) and the Trace Buffer MPAM extensions.

MPAMMeaning
0b0000

MPAM not implemented by Trace Buffer Unit.

0b0001

MPAM implemented by Trace Buffer Unit, using default PARTID and PMG values.

0b0010

Trace Buffer MPAM extensions implemented.

When FEAT_MPAM is not implemented by the PE, this field reads as 0b0000.

When FEAT_MPAM is implemented by the PE, the value 0b0000 is not permitted.

FEAT_TRBE_MPAM implements the functionality identified by the value 0b0010.

Accessing TRBDEVID

TRBDEVID can be accessed through the external debug interface:

ComponentOffsetInstance
TRBE0xFC8TRBDEVID

This interface is accessible as follows:


30/09/2022 15:58; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96f

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