The MFAR_EL3 characteristics are:
Records the faulting physical address for a Granule Protection Check, synchronous External Abort, or SError exception taken to EL3.
This register is present only when FEAT_PFAR is implemented or FEAT_RME is implemented. Otherwise, direct accesses to MFAR_EL3 are UNDEFINED.
MFAR_EL3 is a 64-bit register.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
NS | NSE | RES0 | FPA[55:52] | FPA[51:48] | FPA[47:12] | ||||||||||||||||||||||||||
FPA[47:12] | RES0 |
An exception return at EL3 makes MFAR_EL3 UNKNOWN.
Together with the NSE field, reports the physical address space of the access that triggered the exception.
NSE | NS | Meaning |
---|---|---|
0b0 | 0b0 | When Secure state is implemented, Secure. Otherwise reserved. |
0b0 | 0b1 | Non-secure. |
0b1 | 0b0 | Root. |
0b1 | 0b1 | Realm. |
The reset behavior of this field is:
Together with the NS field, reports the physical address space of the access that triggered the exception.
For a description of the values derived by evaluating NS and NSE together, see MFAR_EL3.NS.
The reset behavior of this field is:
Reserved, RES0.
When FEAT_D128 is implemented, extension to FPA[47:12].
The reset behavior of this field is:
Reserved, RES0.
When FEAT_LPA is implemented, extension to FPA[47:12].
The reset behavior of this field is:
Reserved, RES0.
Bits [47:12] of the faulting physical address.
For implementations with fewer than 48 physical address bits, the corresponding upper bits in this field are RES0.
When recording an address for a synchronous External Abort or SError exception, the recorded address can be any address within the same naturally-aligned fault granule as the faulting physical address, where the size of the fault granule is IMPLEMENTATION DEFINED, but must be no larger than:
The reset behavior of this field is:
Reserved, RES0.
MFAR_EL3 is not valid and reads UNKNOWN if ESR_EL3.PFV is recorded as 0 and ESR_EL3.EC is recorded indicating an Abort or SError exception.
Accesses to this register use the following encodings in the System register encoding space:
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b110 | 0b0110 | 0b0000 | 0b101 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then X[t, 64] = MFAR_EL3;
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b110 | 0b0110 | 0b0000 | 0b101 |
if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then MFAR_EL3 = X[t, 64];
30/09/2022 15:58; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96f
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