(old) htmldiff from-(new)

PMDEVID, Performance Monitors Device ID register

The PMDEVID characteristics are:

Purpose

Provides information about features of the Performance Monitors implementation.

Configuration

This register is present only when FEAT_PMUv3_EXT32 is implemented. Otherwise, direct accesses to PMDEVID are RES0.

If FEAT_DoPD is implemented, this register is in the Core power domain.

If FEAT_DoPD is not implemented, this register is in the Debug power domain.

This register is required from Armv8.2 and in any implementation that includes FEAT_PCSRv8p2. Otherwise, its location is RES0.

Note

Before Armv8.2, the PC Sample-based Profiling Extension can be implemented in the external debug register space, as indicated by the value of EDDEVID.PCSample.

Attributes

PMDEVID is a 32-bit register.

This register is part of the PMU block.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0PMSSPCSamplePCSample

Bits [31:84]

Reserved, RES0.

PMSS, bits [7:4]

PMU Snapshot extension. Defined values are:

PMSSMeaning
0b0000

PMU snapshot extension not implemented.

0b0001

PMU snapshot extension implemented.

All other values are reserved.

FEAT_PMUv3_SS implements the functionality identified by the value 0b0001.

PCSample, bits [3:0]

Indicates the level of PC Sample-based Profiling support using Performance Monitors registers. Defined values are:

PCSampleMeaning
0b0000

PC Sample-based Profiling Extension is not implemented in the Performance Monitors register space.

0b0001

PC Sample-based Profiling Extension is implemented in the Performance Monitors register space.

0b0010

As 0b0001, and adds support for PMPCSCTL.

All other values are reserved.

FEAT_PCSRv8p2 implements the functionality identified by the value 0b0001.

FEAT_PCSRv8p9 implements the functionality identified by the value 0b0010.

If FEAT_PCSRv8p2 is not implemented, then the only permitted value is 0b0000.

From Armv8.2, when FEAT_PCSRv8p2 is implemented, the value 0b0000 is not permitted.

From Armv8.9, when FEAT_PCSRv8p9 is implemented, the value 0b0001 is not permitted.

Accessing PMDEVID

PMDEVID can be accessed through the external debug interface:

ComponentOffsetInstance
PMU0xFC8PMDEVID

This interface is accessible as follows:

Accessing PMDEVID

Accesses to this register use the following encodings in the external debug interface:

BlockAccess at address 0xFC8

PMDEVID can be accessed through the PMU block as follows:

FrameOffset
PMU0xFC8

3005/0907/2022 1517:5708; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96fb0421fa9a8865165f9b91af9b4a566111f866305

Copyright © 2010-2022 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.

(old) htmldiff from-(new)