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MECIDR_EL2, MEC Identification Register

The MECIDR_EL2 characteristics are:

Purpose

MEC identification register. Describes the supported MECID width by this PE.

Configuration

This register is present only when FEAT_MEC is implemented and (EL2 is implemented or EL3 is implemented). Otherwise, direct accesses to MECIDR_EL2 are UNDEFINED.

Attributes

MECIDR_EL2 is a 64-bit register.

Field descriptions

6362616059585756555453525150494847464544434241403938373635343332
313029282726252423222120191817161514131211109876543210
RES0
RES0MECIDWidthm1

Bits [63:4]

Reserved, RES0.

MECIDWidthm1, bits [3:0]

The number of bits of MECID supported by the PE, minus 1.

The maximum permitted value is 0xF which indicates a MECID width of 16 bits and 2ˆ16 MECIDs.

MECIDWidth is defined as MECIDWidthm1 + 1.

The reset behavior of this field is:

Accessing MECIDR_EL2

For accesses from EL2 and EL3, this register is RO.

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, MECIDR_EL2

op0op1CRnCRmop2
0b110b1000b10100b10000b111

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && HCR_EL2.NV == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else UNDEFINED; elsif PSTATE.EL == EL2 then X[t, 64] = MECIDR_EL2; elsif PSTATE.EL == EL3 then X[t, 64] = MECIDR_EL2;


30/09/2022 15:58; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96f

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