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The TRCVIIECTLR characteristics are:
Use this to select, or read, the Address Range Comparators for the ViewInst include/exclude function.
External register TRCVIIECTLR bits [31:0] are architecturally mapped to AArch64 System register TRCVIIECTLR[31:0].
This register is present only when FEAT_ETE is implemented, FEAT_TRC_EXT is implemented and UInt(TRCIDR4.NUMACPAIRS) > 0. Otherwise, direct accesses to TRCVIIECTLR are RES0.
TRCVIIECTLR is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | EXCLUDE[7] | EXCLUDE[6] | EXCLUDE[5] | EXCLUDE[4] | EXCLUDE[3] | EXCLUDE[2] | EXCLUDE[1] | EXCLUDE[0] | RES0 | INCLUDE[7] | INCLUDE[6] | INCLUDE[5] | INCLUDE[4] | INCLUDE[3] | INCLUDE[2] | INCLUDE[1] | INCLUDE[0] |
Reserved, RES0.
Exclude Address Range Comparator <m>. Selects whether Address Range Comparator <m> is in use with the ViewInst exclude function.
EXCLUDE[<m>] | Meaning |
---|---|
0b0 | The address range that Address Range Comparator <m> defines, is not selected for the ViewInst exclude function. |
0b1 | The address range that Address Range Comparator <m> defines, is selected for the ViewInst exclude function. |
This bit is RES0 if m >= TRCIDR4.NUMACPAIRS.
The reset behavior of this field is:
Reserved, RES0.
Include Address Range Comparator <m>.
Selects whether Address Range Comparator <m> is in use with the ViewInst include function.
Selecting no comparators for the ViewInst include function indicates that all instructions are included by default.
The ViewInst exclude function then indicates which ranges are excluded.
INCLUDE[<m>] | Meaning |
---|---|
0b0 | The address range that Address Range Comparator <m> defines, is not selected for the ViewInst include function. |
0b1 | The address range that Address Range Comparator <m> defines, is selected for the ViewInst include function. |
This bit is RES0 if m >= TRCIDR4.NUMACPAIRS.
The reset behavior of this field is:
Must be programmed if TRCIDR4.NUMACPAIRS > 0b0000.
Writes are CONSTRAINED UNPREDICTABLE if the trace unit is not in the Idle state.
Component | Offset | Instance |
---|---|---|
ETE | 0x084 | TRCVIIECTLR |
This interface is accessible as follows:
3005/0907/2022 1517:5808; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96fb0421fa9a8865165f9b91af9b4a566111f866305
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