System Register XML
for A-Profile Architecture
(2022-09)

3 Oct 2022


Introduction

This is the 2022-09 release of the System Register XML for A-profile Architecture:

The Proprietary Notice gives details of the terms and conditions under which this package is provided.

The Feature list lists the feature names used in A-profile architecture.

If you have comments on the content of this package, please send them by e-mail to support-aarchv8@arm.com. Give:

Please see the Documentation for more information on the general structure of these descriptions.


Contents

This Version 2022-09 [HTML] [PDF] [XML]
Change Markups
2022-09 from 2022-06
[HTML] [PDF]
Previous Versions
2022-06
[HTML]


Product Status

This release covers multiple versions of the architecture. The content relating to different versions is given different quality ratings.

The information relating to the 2022 Extensions of the A-profile Architecture, and features FEAT_MEC and FEAT_PMUv3_EXT64 is at Alpha quality. Alpha quality means that most major features of the specification are described in this release, but some features and details might be missing.

The information relating to SME2 and previously released features, including FEAT_PMUv3_EXT32, is at Beta quality. Beta quality means that all major features of the specification are described, but some details might be missing.

Release notes

Change history

Many simple clarifications and corrections are also present, but are too small to be listed here. Some minor formatting changes are supressed and not highlighted in the diff output.

Known issues

All issues identified in the below list will be fixed in a future release.

Potential upcoming changes

Arm is constantly exploring ways to make the architecture presentation precise and clear. Towards this, the following changes are expected in future releases:


Documentation

General

A description within the XML contains the following sections:

Purpose
A short description of the purpose of the register in the Arm Architecture.
Configuration
How the register is architecturally mapped onto another System register or a memory-mapped register. If the configuration of the PE affects the implementation of the register, then information about this is also included here.
Attributes
The size of the register.
Field descriptions
The register diagram and a description of the behavior of each field within the register.

Memory-mapped registers

A memory-mapped register description also contains the following sections:

Accessing ...
The address or offset of the register in the memory map, and the accessibility.

System registers

A System register description also contains an "Accessing ..." section, that includes: