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The EDDEVID1 characteristics are:
Provides extra information for external debuggers about features of the debug implementation.
If FEAT_DoPD is implemented, this register is in the Core power domain.
If FEAT_DoPD is not implemented, this register is in the Debug power domain.
EDDEVID1 is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | HSR | PCSROffset |
Reserved, RES0.
Indicates support for the External Debug Halt Status Register, ( EDHSR.). Defined values are:
HSR | Meaning |
---|---|
0b0000 | EDHSR |
0b0001 | EDHSR |
0b0010 | As 0b0001, but extends EDHSR to include the VNCR, CM, and WnR fields. |
All other values are reserved.
When FEAT_SME and FEAT_Debugv8p9 are not implemented, the only permitted value is 0b0000.
If FEAT_SME is implemented, the permitted values are 0b0000 and 0b0001.
WhenIf FEAT_Debugv8p9FEAT_SME is not implemented, the valuesonly permitted value is 0b0000 and 0b0001 are not permitted..
Indicates the offset applied to PC samples returned by reads of EDPCSR. Permitted values of this field in Armv8 are:
PCSROffset | Meaning |
---|---|
0b0000 | EDPCSR not implemented. |
0b0010 | EDPCSR implemented, and samples have no offset applied and do not sample the instruction set state in AArch32 state. |
When FEAT_PCSRv8p2 is implemented, the only permitted value is 0b0000.
FEAT_PCSRv8p2 implements the PC Sample-based Profiling Extension in the Performance Monitors register space, as indicated by the value of PMU.PMDEVID.PCSample.PMDEVID.PCSample.
Component | Offset | Instance |
---|---|---|
Debug | 0xFC4 | EDDEVID1 |
This interface is accessible as follows:
3005/0907/2022 1517:5707; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96fb0421fa9a8865165f9b91af9b4a566111f866305
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