The AMCIDR0 characteristics are:
Provides information to identify an activity monitors component.
For more information, see 'About the Component identification scheme'.
The power domain of AMCIDR0 is IMPLEMENTATION DEFINED.
Implementation of this register is OPTIONAL.
This register is present only when FEAT_AMUv1 is implemented.
AMCIDR0 is a 32-bit register.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
RES0 | PRMBL_0 |
Reserved, RES0.
Preamble.
Reads as 0x0D.
Access to this field is RO.
Component | Offset | Instance |
---|---|---|
AMU | 0xFF0 | AMCIDR0 |
Accesses to this interface are RO.
30/09/2022 15:58; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96f
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