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TRBCIDR1, Component Identification Register 1

The TRBCIDR1 characteristics are:

Purpose

Provides discovery information about the component.

For additional information, see the CoreSight Architecture Specification.

Configuration

This register is present only when FEAT_TRBE_EXT is implemented. Otherwise, direct accesses to TRBCIDR1 are RES0.

TRBCIDR1 is in the Core power domain.

Attributes

TRBCIDR1 is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0CLASSPRMBL_1

Bits [31:8]

Reserved, RES0.

CLASS, bits [7:4]

Component class.

CLASSMeaning
0b1001

CoreSight peripheral.

Other values are defined by the CoreSight Architecture.

Access to this field is RO.

PRMBL_1, bits [3:0]

Component identification preamble, segment 1.

Reads as 0b0000.

Access to this field is RO.

Accessing TRBCIDR1

TRBCIDR1 can be accessed through the external debug interface:

ComponentOffsetInstance
TRBE0xFF4TRBCIDR1

This interface is accessible as follows:


30/09/2022 15:58; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96f

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