SPMROOTCR_EL3, System Performance Monitors Root and Realm Control Register

The SPMROOTCR_EL3 characteristics are:

Purpose

Controls observability of Root and Realm events by the System Performance Monitor.

Configuration

This register is present only when FEAT_RME is implemented and FEAT_SPMU is implemented. Otherwise, direct accesses to SPMROOTCR_EL3 are UNDEFINED.

Attributes

SPMROOTCR_EL3 is a 64-bit register.

Field descriptions

6362616059585756555453525150494847464544434241403938373635343332
313029282726252423222120191817161514131211109876543210
IMPLEMENTATION DEFINED
IMPLRES0NAORES0RLORTO

IMPLEMENTATION DEFINED, bits [63:32]

IMPLEMENTATION DEFINED observation controls. Additional IMPLEMENTATION DEFINED bits to control certain types of filter or events.

IMPL, bit [31]

Indicates SPMROOTCR_EL3 is present.

The reset behavior of this field is:

Access to this field is RO.

Bits [30:4]

Reserved, RES0.

NAO, bit [3]
When the System PMU can count or monitor non-attributable events:

Non-attributable Observation. Controls whether events or monitorable characteristics not attributable with any source can be monitored.

NAOMeaning
0b0

Events not attributable with any event source are not counted.

0b1

Counting non-attributable events is not prevented by this bit.

When both SPMROOTCR_EL3 and SPMSCR_EL1 are implemented, non-attributable events are counted only if both SPMROOTCR_EL3.NAO is 1 and SPMSCR_EL1.{NAO, SO} is nonzero.

SPMROOTCR_EL3.NAO has the opposite reset polarity to SPMSCR_EL1.NAO.

The reset behavior of this field is:


Otherwise:

Reserved, RES0.

Bit [2]

Reserved, RES0.

RLO, bit [1]

Realm Observation. Controls whether events or monitorable characteristics attributable to a Realm event source can be monitored.

RLOMeaning
0b0

Events attributable to a Realm event source are not counted.

0b1

Events attributable to a Realm event source are counted.

The reset behavior of this field is:

RTO, bit [0]

Root Observation. Controls whether events or monitorable characteristics attributable to a Root event source can be monitored.

RTOMeaning
0b0

Events attributable to a Root event source are not counted.

0b1

Events attributable to a Root event source are counted.

The reset behavior of this field is:

Accessing SPMROOTCR_EL3

To access SPMROOTCR_EL3 for System PMU <s>, set SPMSELR_EL0.SYSPMUSEL to s.

Accesses to this register use the following encodings in the System register encoding space:

MRS <Xt>, SPMROOTCR_EL3

op0op1CRnCRmop2
0b100b1100b10010b11100b111

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then X[t, 64] = SPMROOTCR_EL3[UInt(SPMSELR_EL0.SYSPMUSEL)];

MSR SPMROOTCR_EL3, <Xt>

op0op1CRnCRmop2
0b100b1100b10010b11100b111

if PSTATE.EL == EL0 then UNDEFINED; elsif PSTATE.EL == EL1 then UNDEFINED; elsif PSTATE.EL == EL2 then UNDEFINED; elsif PSTATE.EL == EL3 then SPMROOTCR_EL3[UInt(SPMSELR_EL0.SYSPMUSEL)] = X[t, 64];


30/09/2022 15:57; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96f

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