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ERRDEVID, Device Configuration Register

The ERRDEVID characteristics are:

Purpose

Provides discovery information for the component.

Configuration

ERRDEVID is implemented only as part of a memory-mapped group of error records.

Attributes

ERRDEVID is a 32-bit register.

Field descriptions

313029282726252423222120191817161514131211109876543210
RES0PFGNUMAGENTMSINUM

Bits [31:2216]

Reserved, RES0.

PFG, bit [21]
When RAS System Architecture v2 is implemented:

Common Fault Injection Mechanism. Describes whether any Common Fault Injection Mechanism registers are implemented in the same page as this register.

PFGMeaning
0b0

Any Common Fault Injection Mechanism registers are implemented in the same page as this register.

0b1

Any Common Fault Injection Mechanism registers are implemented in a separate fault injection group page.

Accessing this field has the following behavior:


Otherwise:

Reserved, RAZ.

AGENT, bit [20]
When RAS System Architecture v2 is implemented:

RAS agent. Describes whether the error record group containing ERRDEVID is part of a RAS agent that is not a System RAS agent.

AGENTMeaning
0b0

The error record group containing ERRDEVID is a System RAS agent. That is, it directly generates any supported RAS interrupts.

0b1

The error record group containing ERRDEVID is not a System RAS agent. That is, it generates any supported RAS interrupts by signaling them to another RAS agent.

Accessing this field has the following behavior:


Otherwise:

Reserved, RAZ.

MSI, bits [19:16]

Message Signaled Interrupt registers. Describes whether the MSI registers are implemented.

MSIMeaning
0b0000

It is IMPLEMENTATION DEFINED whether any MSI registers are implemented.

0b0001

An IMPLEMENTATION DEFINED form of MSI registers are implemented.

0b0010

The recommended layout form of MSI registers are implemented.

0b1111

MSI registers are not implemented.

All other values are reserved.

Accessing this field has the following behavior:

NUM, bits [15:0]

Highest numbered index of the error records in this group, plus one. Each implemented record is owned by a node. A node might own multiple records.

This manual describes a group of error records accessed via a standard 4KB memory-mapped peripheral. For a 4KB peripheral, up to 24 error records can be accessed if the Common Fault Injection Model is implemented, and up to 56 otherwise.

This field has an IMPLEMENTATION DEFINED value.

Access to this field is RO.

Accessing ERRDEVID

ERRDEVID can be accessed through the memory-mapped interfaces:

ComponentOffsetInstance
RAS0xFC8ERRDEVID

Accesses to this interface are RO.


3005/0907/2022 1517:5808; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96fb0421fa9a8865165f9b91af9b4a566111f866305

Copyright © 2010-2022 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.

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