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The PMDEVARCH characteristics are:
Identifies the programmers' model architecture of the Performance Monitor component.
This register is present only when FEAT_PMUv3_EXT is implemented. Otherwise, direct accesses to PMDEVARCH are RES0.
If FEAT_DoPD is implemented, this register is in the Core power domain. If FEAT_DoPD is not implemented, this register is in the Debug power domain.
PMDEVARCH is a 32-bit register.
This register is part of the PMU block.
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ARCHITECT | PRESENT | REVISION | ARCHVER | ARCHPART |
Defines the architecture of the component. For Performance Monitors, this is Arm Limited.
Bits [31:28] are the JEP106 continuation code, 0x4.
Bits [27:21] are the JEP106 ID code, 0x3B.
Reads as 0b01000111011.
Access to this field is RO.
Indicates that the DEVARCH is present.
Reads as 0b1.
Access to this field is RO.
Defines the architecture revision. For architectures defined by Arm this is the minor revision.
For Performance Monitors, the revision defined by Armv8 is 0x0.
All other values are reserved.
Reads as 0b0000.
Access to this field is RO.
Architecture Version. Defines the architecture version of the component.
ARCHVER | Meaning |
---|---|
0b0010 | Performance Monitors Extension version 3, PMUv3. |
All other values are reserved.
PMDEVARCH.ARCHVER and PMDEVARCH.ARCHPART are also defined as a single field, PMDEVARCH.ARCHID, so that PMDEVARCH.ARCHVER is PMDEVARCH.ARCHID[15:12].
Access to this field is RO.
Architecture Part. Defines the architecture of the component.
ARCHPART | Meaning | Applies when |
---|---|---|
0xA16 | Armv8-A PE performance monitors. | |
0xA26 | Armv8-A PE performance monitors, including the 64-bit programmers' model extension. | From Armv8.8 |
PMDEVARCH.ARCHVER and PMDEVARCH.ARCHPART are also defined as a single field, PMDEVARCH.ARCHID, so that PMDEVARCH.ARCHPART is PMDEVARCH.ARCHID[11:0].
This field has an IMPLEMENTATION DEFINED value.
Access to this field is RO.
This interface is accessible as follows:
Accesses to this register use the following encodings in the external debug interface:
PMDEVARCH can be accessed through the PMU block as follows:
Frame | Offset |
---|---|
PMU | 0xFBC |
3005/0907/2022 1517:5707; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96fb0421fa9a8865165f9b91af9b4a566111f866305
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