The ID_AA64DFR1_EL1 characteristics are:
Provides top level information about the debug system in AArch64 state.
There are no configuration notes.
ID_AA64DFR1_EL1 is a 64-bit register.
63 | 62 | 61 | 60 | 59 | 58 | 57 | 56 | 55 | 54 | 53 | 52 | 51 | 50 | 49 | 48 | 47 | 46 | 45 | 44 | 43 | 42 | 41 | 40 | 39 | 38 | 37 | 36 | 35 | 34 | 33 | 32 |
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ABL_CMPs | RES0 | EBEP | ITE | ABLE | PMICNTR | SPMU | |||||||||||||||||||||||||
CTX_CMPs | WRPs | BRPs | SYSPMUID |
Number of breakpoints that support address linking, minus 1.
The values 0x40 to 0xFF are reserved.
The value of this field is never greater than either ID_AA64DFR1_EL1.WRPs or ID_AA64DFR1_EL1.BRPs.
Reserved, RES0.
Reserved, RES0.
Exception-based event profiling. Defined values are:
EBEP | Meaning |
---|---|
0b0000 |
Exception-based event profiling not implemented. |
0b0001 |
Exception-based event profiling implemented. |
All other values are reserved.
FEAT_EBEP implements the functionality identified by the value 0b0001.
Instrumentation Trace Extension. Defined values are:
ITE | Meaning |
---|---|
0b0000 |
Instrumentation Trace Extension not implemented. |
0b0001 |
Instrumentation Trace Extension implemented. |
All other values are reserved.
FEAT_ITE implements the functionality identified by the value 0b0001.
If FEAT_ITE is not implemented, then the only permitted value is 0b0000.
From Armv9.4, when FEAT_ITE is implemented, the value 0b0000 is not permitted.
Address Breakpoint Linking Extension. Defined values are:
ABLE | Meaning |
---|---|
0b0000 |
Address Breakpoint Linking Extension not implemented. |
0b0001 |
Address Breakpoint Linking Extension implemented. |
All other values are reserved.
FEAT_ABLE implements the functionality identified by the value 0b0001.
If FEAT_ABLE is not implemented, then the only permitted value is 0b0000.
From Armv9.4, when FEAT_ABLE is implemented, the value 0b0000 is not permitted.
PMU fixed-function instruction counter. Defined values are:
PMICNTR | Meaning |
---|---|
0b0000 |
PMU fixed-function instruction counter not implemented. |
0b0001 |
PMU fixed-function instruction counter implemented. |
All other values are reserved.
FEAT_PMUv3_ICNTR implements the functionality identified by the value 0b0001.
If FEAT_PMUv3 is not implemented, then the only permitted value is 0b0000.
System PMU extension.
SPMU | Meaning |
---|---|
0b0000 |
System PMU extension not implemented. |
0b0001 |
System PMU extension implemented. |
All other values are reserved.
FEAT_SPMU implements the functionality identified by the value 0b0001.
Number of breakpoints that are context-aware, minus 1.
The value 0x00 means 16 breakpoints that are context-aware are implemented. Otherwise, this field is the number of breakpoints that are context-aware, minus 1.
The values 0x01 to 0x0F and 0x40 to 0xFF are reserved.
The value of this field is never greater than ID_AA64DFR1_EL1.BRPs.
Reserved, RES0.
Number of watchpoints, minus 1.
The value 0x00 means 16 watchpoints are implemented. Otherwise, this field is the number of watchpoints, minus 1.
The values 0x01 to 0x0F and 0x40 to 0xFF are reserved.
Reserved, RES0.
Number of breakpoints, minus 1.
The value 0x00 means 16 breakpoints are implemented. Otherwise, this field is the number of breakpoints, minus 1.
The values 0x01 to 0x0F and 0x40 to 0xFF are reserved.
Reserved, RES0.
System PMU ID. Indicates the largest value of SPMSELR_EL0.SYSPMUSEL.
Since System PMUs might not be contiguously accessible, this field does not necessarily indicate the total number of accessible System PMUs.
The values 0x20 to 0xFF are reserved.
Reserved, RES0.
Accesses to this register use the following encodings in the System register encoding space:
op0 | op1 | CRn | CRm | op2 |
---|---|---|---|---|
0b11 | 0b000 | 0b0000 | 0b0101 | 0b001 |
if PSTATE.EL == EL0 then if IsFeatureImplemented(FEAT_IDST) then if EL2Enabled() && HCR_EL2.TGE == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else AArch64.SystemAccessTrap(EL1, 0x18); else UNDEFINED; elsif PSTATE.EL == EL1 then if EL2Enabled() && HCR_EL2.TID3 == '1' then AArch64.SystemAccessTrap(EL2, 0x18); else X[t, 64] = ID_AA64DFR1_EL1; elsif PSTATE.EL == EL2 then X[t, 64] = ID_AA64DFR1_EL1; elsif PSTATE.EL == EL3 then X[t, 64] = ID_AA64DFR1_EL1;
30/09/2022 15:57; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96f
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