PMDEVAFF, Performance Monitors Device Affinity register

The PMDEVAFF characteristics are:

Purpose

Copy of the PE MPIDR_EL1 register that allows a debugger to determine which PE in a multiprocessor system the Performance Monitor component relates to.

Configuration

This register is present only when FEAT_PMUv3_EXT64 is implemented. Otherwise, direct accesses to PMDEVAFF are RES0.

Attributes

PMDEVAFF is a 64-bit register.

This register is part of the PMU block.

Field descriptions

6362616059585756555453525150494847464544434241403938373635343332
313029282726252423222120191817161514131211109876543210
MPIDR_EL1
MPIDR_EL1

MPIDR_EL1, bits [63:0]

MPIDR_EL1. Read-only copy of MPIDR_EL1, as seen from the highest implemented Exception level.

Accessing PMDEVAFF

Accesses to this register use the following encodings in the external debug interface:

BlockAccess at address 0xFA8

PMDEVAFF can be accessed through the PMU block as follows:

FrameOffset
PMU0xFA8

30/09/2022 15:57; 21c5a6dd0fdaf10a712e2f2d6fffbdbd66d4d96f

Copyright © 2010-2022 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.