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Move 8-bit floating-point immediate to vector elements (predicated).
Move a floating-point immediate into each active element in the destination vector. Inactive elements in the destination vector register remain unmodified.
This is an alias of FCPY. This means:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
0 | 0 | 0 | 0 | 0 | 1 | 0 | 1 | size | 0 | 1 | Pg | 1 | 1 | 0 | imm8 | Zd |
FMOV <Zd>.<T>, <Pg>/M, #<const>
is equivalent to
FCPY <Zd>.<T>, <Pg>/M, #<const>
and is always the preferred disassembly.
<Zd> | Is the name of the destination scalable vector register, encoded in the "Zd" field. |
<T> |
Is the size specifier,
encoded in
size:
|
<Pg> | Is the name of the governing scalable predicate register, encoded in the "Pg" field. |
The description of FCPY gives the operational pseudocode for this instruction.
This instruction might be immediately preceded in program order by a MOVPRFX instruction.instruction Thethat conforms to all of the following requirements, otherwise the behavior of either or both instructions is MOVPRFXunpredictable instruction must conform to all of the following requirements, otherwise the behavior of the:
Internal version only: isa v31.05bv31.04, AdvSIMD v29.02, pseudocode v2019-12_rc3_1v2019-09_rc2_1, sve v2019-12_rc3v2019-09_rc3
; Build timestamp: 2019-12-13T112019-09-27T17:0228
Copyright © 2010-2019 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.
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