SSBB

Speculative Store Bypass Barrier is a memory barrier which prevents speculative loads from bypassing earlier stores to the same virtual address under certain conditions.

The semantics of the Speculative Store Bypass Barrier are:

313029282726252423222120191817161514131211109876543210
11010101000000110011000010011111
CRmopc

System

SSBB

// No additional decoding required

Operation

SpeculativeStoreBypassBarrierToVA();


Internal version only: isa v32.03, AdvSIMD v29.02, pseudocode v2020-03, sve v2020-03_rc1 ; Build timestamp: 2020-04-15T14:44

Copyright © 2010-2020 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.