AESIMC

AES inverse mix columns.

313029282726252423222120191817161514131211109876543210
0100111000101000011110RnRd
D

AESIMC <Vd>.16B, <Vn>.16B

integer d = UInt(Rd); integer n = UInt(Rn); if !HaveAESExt() then UNDEFINED;

Assembler Symbols

<Vd>

Is the name of the SIMD&FP destination register, encoded in the "Rd" field.

<Vn>

Is the name of the SIMD&FP source register, encoded in the "Rn" field.

Operation

AArch64.CheckFPAdvSIMDEnabled(); bits(128) operand = V[n]; bits(128) result; result = AESInvMixColumns(operand); V[d] = result;

Operational information

If PSTATE.DIT is 1:


Internal version only: isa v32.13, AdvSIMD v29.05, pseudocode v2020-12, sve v2020-12 ; Build timestamp: 2020-12-16T16:53

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