(old) | htmldiff from- | (new) |
Move immediate value to Special Register moves an immediate value to selected bits of the PSTATE. For more information, see Process state, PSTATE.
The bits that can be written by this instruction are:
31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
1 | 1 | 0 | 1 | 0 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | op1 | 0 | 1 | 0 | 0 | CRm | op2 | 1 | 1 | 1 | 1 | 1 |
MSR <pstatefield>, #<imm>
if op1 == '000' && op2 == '000' then SEE "CFINV";
if op1 == '000' && op2 == '001' then SEE "XAFLAG";
if op1 == '000' && op2 == '010' then SEE "AXFLAG";
AArch64.CheckSystemAccess('00', op1, '0100', CRm, op2, '11111', '0');
bits(2) min_EL;
boolean need_secure = FALSE;
case op1 of
when '00x'
min_EL = EL1;
when '010'
min_EL = EL1;
when '011'
min_EL = EL0;
when '100'
min_EL = EL2;
when '101'
if ! UNDEFINED;
when '110'
min_EL =HaveVirtHostExt() then
UNDEFINED;
min_EL = EL2;
when '110'
min_EL = EL3;
when '111'
min_EL = EL1;
need_secure = TRUE;
if UInt(PSTATE.EL) < UInt(min_EL) || (need_secure && !IsSecure()) then
UNDEFINED;
bits(4) operand = CRm;
PSTATEField field;
case op1:op2 of
when '000 011'
if !HaveUAOExt() then
UNDEFINED;
field = PSTATEField_UAO;
when '000 100'
if !HavePANExt() then
UNDEFINED;
field = PSTATEField_PAN;
when '000 101' field = PSTATEField_SP;
when '011 010'
if !HaveDITExt() then
UNDEFINED;
field = PSTATEField_DIT;
when '011 011'
case CRm of
when '000x'
if !HaveCSRExt() then
UNDEFINED;
field = PSTATEField_CSR;
when '011 011'
UNDEFINED;
otherwise
UNDEFINED;
when '011 100'
if !HaveMTEExt() then
UNDEFINED;
field = PSTATEField_TCO;
when '011 110' field = PSTATEField_DAIFSet;
when '011 111' field = PSTATEField_DAIFClr;
when '011 001'
if !HaveSSBSExt() then
UNDEFINED;
field = PSTATEField_SSBS;
otherwise UNDEFINED;
// Check that an AArch64 MSR/MRS access to the DAIF flags is permitted
if PSTATE.EL == EL0 && field IN {PSTATEField_DAIFSet, PSTATEField_DAIFClr} then
if !ELUsingAArch32(EL1) && ((EL2Enabled() && HCR_EL2.<E2H,TGE> == '11') || SCTLR_EL1.UMA == '0') then
if EL2Enabled() && !ELUsingAArch32(EL2) && HCR_EL2.TGE == '1' then
AArch64.SystemAccessTrap(EL2, 0x18);
else
AArch64.SystemAccessTrap(EL1, 0x18);
<pstatefield> |
Is a PSTATE field name,
encoded in
op1:op2:
|
<imm> | Is a 4-bit unsigned immediate, in the range 0 to 15, encoded in the "CRm" field. |
case field of
when PSTATEField_SSBS
PSTATE.SSBS = operand<0>;
when PSTATEField_SP
PSTATE.SP = operand<0>;
when PSTATEField_DAIFSet
PSTATE.D = PSTATE.D OR operand<3>;
PSTATE.A = PSTATE.A OR operand<2>;
PSTATE.I = PSTATE.I OR operand<1>;
PSTATE.F = PSTATE.F OR operand<0>;
when PSTATEField_DAIFClr
PSTATE.D = PSTATE.D AND NOT(operand<3>);
PSTATE.A = PSTATE.A AND NOT(operand<2>);
PSTATE.I = PSTATE.I AND NOT(operand<1>);
PSTATE.F = PSTATE.F AND NOT(operand<0>);
when PSTATEField_PAN
PSTATE.PAN = operand<0>;
when PSTATEField_UAO
PSTATE.UAO = operand<0>;
when PSTATEField_DIT
PSTATE.DIT = operand<0>;
when PSTATEField_TCO
PSTATE.TCO = operand<0>;PSTATE.TCO = operand<0>;
whenPSTATEField_CSR
PSTATE.CSR = operand<0>;
Internal version only: isa v32.13v32.12, AdvSIMD v29.05v29.04, pseudocode v2020-12v2020-09_xml, sve v2020-12v2020-09_rc2b
; Build timestamp: 2020-12-16T142020-09-30T19:4116
Copyright © 2010-2020 Arm Limited or its affiliates. All rights reserved. This document is Non-Confidential.
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