Architectures

This page gives information on software standards related to the Arm architecture, including BBR, SCMI and SDEI.

This page provides information on system architecture standards related to the development of chiplets or systems that are composed from chiplets.

SystemReady is a compliance band in the Arm SystemReady Program. The band enables generic off-the-shelf standard operating systems (Windows, Linux, VMWare, and BSD environments) to install and run out-of-the-box on Arm SoCs.

Arm SystemReady Devicetree is a compliance band in the Arm SystemReady Program enabling embedded Linux and BSD environments on embedded Arm SoCs.

SystemReady Pre-Silicon is an enablement program that helps silicon vendors achieve BSA and SBSA compliance prior to taping out.

Arm’s most efficient GPU architecture offers improved visuals within the same power budget. Enjoy immersive mobile experiences for longer than on previous generations.

The Arm Application-profile (A-profile) architecture targets high-performance markets, such as PC, mobile, gaming, and enterprise.

Information on the A64 instruction set, used in AArch64.

This page gives information on the various components of the Architecture Compliance Suites (ACS).

The Morello prototype architecture introduces a potential to change the way we design and program processors to improve built-in security.

This page gives information and resources on Architecture Specification Language (ASL) and any associated specifications.

Advanced Microcontroller Bus Architecture (AMBA) is a freely available, open standard for the connection and management of functional blocks in a system-on-chip (SoC).

The Advanced Configuration and Power Interface (ACPI) specification is an industry standard, provided by the UEFI forum, where Arm is a board member.

A Generic Interrupt Controller (GIC) takes interrupts from peripherals, prioritizes them, and delivers them to the appropriate processor core. 

Arm CoreSight architecture documents consist of a set of architectural specifications to support the integration of various IP components in a standardised way.  

Information on the NEON vector extension for the A-profile and R-profile Arm architecture.

View the Application Binary Interface (ABI) for the Arm Architecture.

Information on the A32 (Arm) instruction set.

This page provides information on Embedded Base Boot Requirements (EBBR). 

Firmware Framework for M-Profile is a software architecture specification for developing secure programming environments in microcontroller-based systems.

Adaptive Scalable Texture Compression (ASTC) technology developed by Arm and AMD is a major step forward in terms of image quality, reducing memory bandwidth and thus energy use.

Arm Custom Instructions enable bespoke data processing operations inside Arm Cortex-M processors to enhance performance, efficiency and product differentiation.

Overview of the Firmware Framework for the A-profile (FF-A).

The Arm Real-time (R-profile) architecture provides high-performing processors for timing sensitive and safety-critical environments.

Arm Helium technology delivers outstanding performance for ML and DSP applications in small, low power Arm Cortex-M processors.

Digital Signal Processing (DSP) extensions to the Arm instruction sets.

The Arm Frame Buffer Compression (AFBC) protocol is a lossless image compression format that minimizes the amount of data transferred between IP blocks within a SoC.

The Arm Microcontroller-profile (M-profile) architecture is for embedded applications where a small footprint and the lowest power consumption is required.

Explore developer resources, software and tools for Arm C Language Extensions (ACLE).

This page provides information on software standards related to the Arm architecture including BSA, SBSA, SBMR.

The successor to the Midgard architecture with an improved design for energy and area efficiency.

A unified shader core architecture, implemented by Mali-T6xx, Mali-T7xx, and Mali-T8xx family of products.

The second generation of Arm GPU scalar architecture for high-performance, high-efficient GPUs.

The first programmable shader core architecture developed by Arm, supporting an OpenGL ES 2.0 feature set.

This page gives information on the Platform Security firmware Update for the A-Profile Architecture (PSA FWU).

SMMU support allows systems to share A-profile page tables with peripherals.

This page provides information Secure Monitor Calling Convention (SMCCC). 

Information on the Scalable Vector Extensions (SVE) and SVE2 for the A-Profile Arm architecture.

Unified Extensible Firmware Interface (UEFI) for Arm and resources for UEFI drivers. 

This page provides information on Software Delegated Exception Interface (SDEI).

This page provides information on Power State Coordination Interface (PSCI). 

The System Control and Management Interface (SCMI) specification describes a set of standard interfaces for power, performance and system management.

Information on the T32 (Thumb) instruction set.

Previews of rules-based content for Arm A-profile architecture.