A-Profile Architecture Specifications
CPU (processor) architecture
The Arm Architecture Reference Manual (ArmARM) provides a definitive description of the Arm architecture. This includes the instruction set, exception model and debug architecture for both the AArch32 and AArch64 Execution states.
- Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile
- Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile: Known issues
- Arm® Architecture Reference Manual Supplement - The Scalable Vector Extension (SVE), for Armv8-A
- Arm® Architecture Reference Manual Supplement Memory System Resource Partitioning and Monitoring (MPAM), for Armv8-A
- Arm® Reliability, Availability, and Serviceability (RAS) Specification - Armv8, for the Armv8-A architecture profile
- Arm® Architecture Reference Manual Armv7-A and Armv7-R edition
- Armv5 Architecture Reference Manual
Generic Interrupt Controller (GIC) architecture
- Arm® Generic Interrupt Controller Architecture Specification GIC architecture version 3.0 and 4.0
- Arm® Generic Interrupt Controller Architecture version 2.0 - Architecture Specification
System MMU (SMMU) architecture
- Arm® System Memory Management Unit Architecture Specification, SMMU architecture version 3
- Arm® System Memory Management Unit Architecture Specification - SMMU architecture version 2.0
System and software specifications
- Arm® Functional Fixed Hardware Specification
- Trusted Board Boot Requirements Client (TBBR-CLIENT) Armv8-A Documentation
- Arm® Server Base Security Guide
- Arm® Paravirtualized Time for Arm-based Systems
- SMC CALLING CONVENTION (SMCCC)
- Trusted Base System Architecture, Client (4th Edition) – System Hardware on Arm
- Trusted Board Boot Requirements Client (TBBR-Client) Armv8-A
- SVE impact on secure firmware
Platform design documents
- Arm® System Control and Management Interface - Platform Design Document
- Software Delegated Exception Interface (SDEI) - Platform Design Document
- IO Remapping Table - Platform Design Document
- ACPI for CoreSight™ 1.0 Platform Design Document - Platform Design Document
- ACPI for the Armv8 RAS Extensions 1.0 - Platform Design Document