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Memory system and memory partitioning

If the ARM®v8‑M Security Extension is implemented the 4GB memory space is partitioned into Non-secure and Secure memory regions.

Non-secure (NS)
Non-secure transactions are those that originate from masters operating as, or deemed to be, Non-secure or from Secure masters accessing a Non-secure address. Non-secure transactions are only permitted to access NS addresses, and the system must ensure that NS transactions are denied access to Secure addresses.

The Secure memory space is further divided into two types, Non-secure Callable and Secure.

Non-secure Callable (NSC)
NSC is a special type of Secure location. This type of memory is the only type which an ARMv8‑M processor permits to hold a Secure Gateway (SG) instruction that enables software to transition from Non-secure to Secure state. The inclusion of NSC memory locations removes the need for Secure software creators to allow for the accidental inclusion of SG instructions, or data sharing encoding values, in normal Secure memory by restricting the functionality of the SG instruction to NSC memory only.
Secure
Secure addresses are used for memory and peripherals that are only accessible by Secure software or Secure masters.

Secure transactions are those that originate from masters operating as, or deemed to be, Secure when targeting a Secure address.

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