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Select-based gate

Interconnects perform address decoding and use address decoding to select which peripheral a transaction is targeted to, which results in the generation of a select signal for each peripheral.

In the case where a Non-secure transaction targets a peripheral that is not assigned to Non-secure, the transaction is rejected. The rejection might be performed by the gate itself or by using the selection of a default-slave like component to handle the transaction.

At reset the select-based gate is set to configure all peripherals as Secure. During initialization, the Secure software can make Non-secure any peripherals that it does not require.

Note:

The requirement that a peripheral register cannot be fetched by an instruction is intended to prevent storing an SG instruction in a peripheral and then branching to that location. This requirement can be met by having the peripheral, or interconnect block, reject fetch transactions to the peripheral.