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A.2. EXPB

Figure A.2 shows the pin numbers of the socket EXPB on the underside of the interface module.

Figure A.2. EXPB socket pin numbering

EXPB socket pin numbering

Table A.2 describes the signals on the pins labeled F[31:0], H[31:0], and J[16:0].

EXPB signal description

Pin label

Name

Description

F[31:24]Not used-
F[23:0]F[23:0]Stepper motor controller signals.

H[31:29]

Not used-
H28SYSCLKSystem clock from the logic module
H[27:0]Not used-

J[15:14]

Not used-

J13

nCFGEN

Sets motherboard into configuration mode

J12

nSRST

Multi-ICE reset (open collector)

J11

Not used-

J10

RTCK

Returned JTAG test clock

J9

Not used-

J8

nTRST

JTAG reset

J7

TDO

JTAG test data out

J6

TDI

JTAG test data in

J5

TMS

JTAG test mode select

J4

TCK

JTAG test clock

J[3:0]

Not used-
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