This interface module provides two connectors for SPI ports. They are connected directly to the logic module FPGA and are used by the SSP PrimeCell (PL022) in the example configuration.
Table 3.3 shows the assignment of the SPI signals to the logic module signals on the EXPIM connector.
|SPI_TXD||IM_BBANK32||SPI transmit data|
|SPI_RXD||IM_BBANK33||SPI receive data|
|SPI_nCS0||IM_BBANK34||SPI chip select 0|
|SPI_nCS1||IM_BBANK35||SPI chip select 1|
|SPI_nCS2||IM_BBANK36||SPI chip select 2|
Three chip select signals are provided to allow connection of three separate SPI devices. The SPI signals are routed to two connectors, J11 and J13, for ease of connection to different SPI devices, although both are connected to the same set of signals.
Figure 3.3 shows the pinout of the SPI connectors.