The embedded core is the ARM922T. This is a member of the ARM9 Thumb family of Harvard architecture cores. It uses a five-stage pipeline and supports 32-bit ARM and 16-bit Thumb instruction sets, that you can use to balance between high code density and performance. The core contains:
data and instruction MMUs
8KB instruction and data caches
write-back page address TAG RAM
write data buffer
embedded Trace module
AMBA bus interface to the AHB.
For more information about this core, see ARM922T (Rev 0) Technical Reference Manual.