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4.2.3. Excalibur EPXA10 memory map

The memory map provided by the Excalibur chip contains 15 memory regions that must be configured for size and start address using the range definition registers provided by the stripe. For the Integrator, 14 regions are used and the size and start address parameters must be programmed as shown in Table 4.1.

Excalibur memory map for the CM image
Excalibur definedIntegrator defined
Memory regionSize limitsRequired sizeBase addressEnd address
EBI0 (only at boot)16KB - 32MB2MB0x000000000x001FFFFF
SDRAM016KB - 256MB64MB0x000000000x03FFFFFF
SDRAM116KB - 256MB64MB0x040000000x07FFFFFF
Embedded SRAM0128KB128KB0x080000000x0801FFFF
Embedded SRAM1128KB128KB0x080200000x0803FFFF
Stripe registers16KB16KB0x0B0000000x0B003FFF
EBI116KB - 32MB8MB0x0F0000000x0F7FFFFF
EBI216KB - 32MB8MB0x0F8000000x0FFFFFFF
EBI3The chip select EBI3 from the Excalibur is unconnected. This region must always be disabled.
PLD016KB - 2GB256MB0x100000000x1FFFFFFF
PLD116KB - 2GB512MB0x200000000x3FFFFFFF
PLD216KB - 2GB1GB0x400000000x7FFFFFFF
PLD316KB - 2GB2GB0x800000000xFFFFFFFF

The range definition registers are described in the Excalibur ARM-Based Embedded Processor PLD Hardware Reference Manual.