This document is organized into the following chapters:
- Chapter 1 Introduction
Read this chapter for an introduction to the Logic Tile.
- Chapter 2 Getting Started
Read this chapter for a description of how to set up and start using the Logic Tile.
- Chapter 3 Hardware Description
Read this chapter for a description of the hardware architecture of the Logic Tile. This includes clocks, resets, and debug features.
- Chapter 4 Configuring the FPGA and PLD
Read this chapter for a description of how a Xilinx FPGA is configured at power-up, the configuration options available, and how to download your own FPGA configurations.
- Appendix A Pinouts and Specifications
See this appendix for signal descriptions and connector pinouts.