Instruction Sets

An Instruction Set Architecture (ISA) is part of the abstract model of a computer. It defines how software controls the CPU.

The Arm ISA family allows developers to write software and firmware that conforms to the Arm specifications, secure in the knowledge that any Arm-based processor will execute it in the same way. This is the foundation of the Arm portability and compatibility promise, underlying the Arm ecosystem.

The Arm architecture supports three instruction sets: A64, A32 and T32.

Instruction Set Block Diagram.

A64 and A32 have fixed instruction lengths of 32 bits.

T32 was introduced as a supplementary set of 16-bit instructions that supported better code density for user code. Over time, T32 evolved into a 16- and 32-bit mixed-length instruction set. As a result, the compiler can balance performance and code size trade-off in a single instruction set.

A64 instruction set

The A64 instruction set, introduced in Armv8-A to support the 64-bit architecture.

A32 instruction set

The A32 instruction set, referred to as ‘ARM’ in Armv6 and Armv7 architectures.

T32 instruction set

The T32 instruction set, referred to as ‘Thumb’ in Armv6 and Armv7 architectures.

Floating Point

The Arm architecture provides high-performance and high-efficiency hardware support for floating-point operations.

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Extensions signal processing capabilities for Cortex-A, Cortex-R and Cortex-M.

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