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SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumint32_t[__arm_]sqshl(int32_t value, const int shift)Shift / Left / Vector saturating shift left
Description
Signed saturating shift left by 1 to 32 bits of a 32 bit value stored in a general-purpose register.
Results
Rda result
This intrinsic compiles to the following instructions:

SQSHL Rda,#shift

Argument Preparation
value register: Rdashift minimum: 1; maximum: 32
Architectures
MVE