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SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumint64_t[__arm_]srshrl(int64_t value, const int shift)64-bit arithmetic / Rounding shift right long
Description
Signed rounding shift right by 1 to 32 bits of a 64 bit value stored in two general-purpose registers.
Results
[RdaHi,RdaLo] result
This intrinsic compiles to the following instructions:

SRSHRL RdaLo,RdaHi,#shift

Argument Preparation
value register: [RdaHi,RdaLo]shift minimum: 1; maximum: 32
Architectures
MVE