[__arm_]vaddq_m[_n_f32]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | float32x4_t | [__arm_]vaddq_m[_n_f32] | (float32x4_t inactive, float32x4_t a, float32_t b, mve_pred16_t p) | Vector arithmetic / Add / Addition | |
Description Add the value of the elements in the first source vector register to either the respective elements in the second source vector register or a general-purpose register. The result is then written to the destination vector register. Results Qd result This intrinsic compiles to the following instructions: VMSR VPST VADDT.F32 Argument Preparation inactive register: Qda register: Qnb register: Rmp register: Rp Architectures MVE | |||||
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